SN54ALS563A, SN74ALS563B OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989 • • • • 3-State Buffer-Type Outputs Drive Bus-Lines Directly Bus Structured Pinout Package Options include Plastic Small Outline Package, Ceramic Chip Carriers and Standard Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability SN54ALS563A . . . J PACKAGE SN74ALS563B . . . DW OR N PACKAGE (TOP VIEW) OC 1D 2D 3D 4D 5D 6D 7D 8D GND description A buffered output-control input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased high-logic level provide the capability to drive the bus lines in a bus-organized system without need for interface or pull-up components. 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q C SN54ALS563A . . . FK PACKAGE (TOP VIEW) 2D 1D OC VCC 1Q The eight latches are transparent D-type latches. While the enable (C) is high the Q outputs will follow the complements of data (D) inputs. When the enable is taken low the output will be latched at the inverses of the levels that were set up at the D inputs. 20 2 3D 4D 5D 6D 7D 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2Q 3Q 4Q 5Q 6Q 8D GND C 8Q 7Q These 8-bit latches feature three-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 FUNCTION TABLE (each latch) INPUTS ENABLE C D OC L H H The output control (OC) does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. L The SN54ALS563A is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74ALS563B is characterized for operation from 0°C to 70°C. OUTPUT Q L H H H L L X Q0 H X X Z Copyright 1989, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ALS563A, SN74ALS563B OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989 logic symbol† OC C 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 logic diagram (positive logic) EN OC C1 C 19 1D 3 18 4 17 5 16 6 15 7 14 8 13 9 12 1 11 1Q 1D 2Q 3Q 2D 4Q 2 C1 D1 19 3 C1 D1 18 4 C1 D1 17 5 C1 D1 16 6 C1 D1 15 7 C1 D1 14 8 C1 D1 13 9 C1 D1 12 1Q 2Q 5Q 6Q 3D 3Q 7Q 8Q 4D † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for DW, J, and N packages. 5D 6D 7D 8D 4Q 5Q 6Q 7Q 8Q absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Operating free-air temperature range: SN54ALS563A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74ALS563B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C recommended operating conditions SN54ALS563A SN74ALS563B MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply Voltage VIL IOH Low-level input voltage 0.7 0.8 High-level output current –1 – 2.6 mA IOL tw Low-level output current 24 mA Pulse duration, C high 15 15 ns tsu th Setup time, data before C↓ 10 10 ns TA Operating free-air temperature 2 High-level input voltage 2 2 12 Hold time, data after C↓ 10 – 55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V 10 125 0 V V ns 70 °C SN54ALS563A, SN74ALS563B OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS SDAS163 – D2661, DECEMBER 1982 – REVISED JANUARY 1989 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK SN54ALS563A TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V to 5.5 V, II = – 18 mA IOH = – 0.4 mA VCC = 4.5 V, VCC = 4.5 V, IOL = – 1 mA IOH = – 2.6 mA VOL VCC = 4.5 V, VCC = 4.5 V, IOL = 12 mA IOL = 24 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.4 V II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL IO‡ VCC = 5.5 V, VCC = 5.5 V, VI = 0.4 V VO = 2.25 V VOH ICC VCC = 5.5 V SN74ALS563B TYP† MAX MIN MIN – 1.2 VCC – 2 2.4 – 1.2 UNIT V VCC – 2 V 3.3 2.4 0.25 – 30 3.2 0.4 0.25 0.4 0.35 0.5 V µA 20 20 – 20 – 20 µA 0.1 0.1 mA 20 20 µA – 0.1 – 0.1 mA – 112 mA – 112 – 30 Outputs high 10 17 10 17 Outputs low 16 26 16 26 mA Outputs disabled 17 29 17 29 † All typical Values are at VCC = 5 V, TA = 25°C. ‡ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS. switching characteristics (see Note 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 5 V, CL = 50pF, R1 = 500 Ω, R2 = 500 Ω, TA = 25°C ’ALS563 TYP tPLH tPHL D Q tPLH tPHL C Q tPZH tPZL OC Q tPHZ tPLZ OC Q VCC = 4.5 V to 5.5 V, CL = 50pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX§ SN54ALS563A SN74ALS563B MIN MAX MIN MAX 10 3 21 3 18 8 3 15 3 14 8 8 29 6 22 14 8 22 6 21 8 4 21 3 18 10 4 21 4 18 5 2 12 1 10 7 3 18 1 15 UNIT ns ns ns ns § For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 1: Load circuit and voltage waveforms are shown in Section 1 of the ALS/AS Logic Data Book, 1986. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. 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