SN54BCT573, SN74BCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS071A – AUGUST 1990 – REVISED NOVEMBER 1993 • • • SN54BCT573 . . . J OR W PACKAGE SN74BCT573 . . . DW OR N PACKAGE (TOP VIEW) State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Full Parallel Access for Loading Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (J, N) OE 1D 2D 3D 4D 5D 6D 7D 8D GND description These 8-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q LE 2D 1D OE VCC SN54BCT573 . . . FK PACKAGE (TOP VIEW) The eight latches of the ′BCT573 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs will follow the data (D) inputs. When the latch enable is taken low, the Q outputs will be latched at the logic levels that were set up at the D inputs. 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2Q 3Q 4Q 5Q 6Q 8D GND LE 8Q 7Q 3D 4D 5D 6D 7D 1Q • A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output enable (OE) does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54BCT573 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74BCT573 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each latch) INPUTS OE LE D OUTPUT Q L H H H L H L L L L X Q0 H X X Z Copyright 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–1 SN54BCT573, SN74BCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS071A – AUGUST 1990 – REVISED NOVEMBER 1993 logic symbol† OE LE 1D 2D 3D 4D 5D 6D 7D 8D 1 11 2 logic diagram (positive logic) EN OE C1 19 1D 3 18 4 17 5 16 6 15 7 14 8 13 9 12 LE 1 11 1Q C1 2Q 3Q 1D 2 19 1Q 1D 4Q 5Q 6Q 7Q To Seven Other Channels 8Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . – 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30 mA Current into any output in the low state, IO: SN54BCT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74BCT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Operating free-air temperature range: SN54BCT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C SN74BCT573 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. recommended operating conditions SN54BCT573 SN74BCT573 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 0.8 V Input clamp current –18 –18 mA IOH IOL High-level output current –12 –15 mA Low-level output current 48 64 mA TA Operating free-air temperature 70 °C 2–2 High-level input voltage 2 – 55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2 125 0 V V SN54BCT573, SN74BCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS071A – AUGUST 1990 – REVISED NOVEMBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH SN54BCT573 TYP† MAX TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V MIN II = –18 mA IOH = – 3 mA SN74BCT573 TYP† MAX MIN –1.2 IOH = –12 mA IOH = –15 mA 2.4 3.3 2 3.2 –1.2 2.4 V 3.3 V 2 0.38 UNIT 3.1 VOL VCC = 4 4.5 5V IOL = 48 mA IOL = 64 mA 0.55 II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 5.5 V VI = 2.7 V 0.4 0.4 20 20 µA IIL IOS‡ VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 – 0.6 – 0.6 mA IOZH IOZL VCC = 5.5 V, VCC = 5.5 V, VO = 2.7 V VO = 0.5 V ICCL ICCH VCC = 5.5 V, VCC = 5.5 V, Outputs open Outputs open ICCZ Ci VCC = 5.5 V, VCC = 5 V, Outputs open 0.42 –100 – 225 –100 V mA – 225 mA 50 50 µA – 50 – 50 µA 62 62 mA 8 8 mA 8 mA 8 VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V 0.55 5.5 Co VCC = 5 V, 7.5 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 5.5 pF 7.5 pF timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C MIN MAX SN54BCT573 MIN MAX SN74BCT573 MIN UNIT MAX tw tsu Pulse duration, LE high 4 4 4 ns Setup time, data before LE↓ 1 2.5 1 ns th Hold time, data after LE↓ 4 4 4 ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Note 2) FROM (INPUT) TO (OUTPUT) tPLH tPHL D Q tPLH tPHL LE Q tPZH tPZL OE Q tPHZ tPLZ OE Q PARAMETER VCC = 5 V, TA = 25°C MIN SN54BCT573 TYP MAX MIN MAX SN74BCT573 MIN MAX 2 5 7.2 1 9.8 2 8.4 2.8 5.9 8.2 1.5 10.3 2.8 9.6 2.4 6.1 7.2 2 9.7 2.4 8.1 2.9 5.2 7.1 2 8.8 2.9 7.8 3 6.2 8.5 2.5 11 3 10.4 4.3 7.1 9.3 3.5 11.5 4.3 11 2.2 3.9 5.6 1.5 7.2 2.2 6 1.7 3.6 5.2 1 7 1.7 6 UNIT ns ns ns ns NOTE 2: Load circuits and voltage waveforms are shown in Section 1. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2–3 SN54BCT573, SN74BCT573 OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCBS071A – AUGUST 1990 – REVISED NOVEMBER 1993 2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated