CMOS IC For Switching Power SupplyFA3621F Control FA3621F ■ Description ■ Dimensions, mm FA3621F is a control IC for 6-channel DC-DC converter. This IC can directly drive a Nch/Pch-MOSFET. This IC is suitable to reduce converter size because it has many functions in a small package LQFP-48. Á LQFP-48 9.0±0.3 1.45 max 0.10±0.06 7.0 7.8 8.0 13 7.0 24 25 37 36 48 1 12 0.5±0.1 0.2±0.06 0.5±0.2 • 6-channel PWM control with MOSFET direct driving : 5-channel for Pch-MOSFET, 1channel for Nch-MOSFET • Low input voltage: 4.5V to 20V • ±1.5% high accuracy bandgap reference • Low power consumption by means of CDMOS Standby mode: 10µA(max.) Operating mode: 6mA(max.) • Soft start function for each channel • ON/OFF function for each channel • Timer latch for short protection • Overheat protection • Undervoltage lockout • Wide range of operation frequency: 50kHz to 1MHz • Package: LQFP-48(Thin and small) 9.0±0.3 ■ Features ±0.05 0.127 ˚ 0~7 ■ Application • VTR-camera, digital-steel-camera and portable equipment 1 FA3621F ■ Block diagram CREF VREG 12 5 2.67V Bias VREF FB1 IN1– 4 1V Bias Buffer 46 29 UVLO Drive bias 17 OHP 37 IN2– FB3 IN3– IN3+ FB4 VDRV Over- heat protection 16 Pch driver 41 OUT1 40 Error Amp. FB2 VCC1 VCC2 (OPEN) 48 15 47 14 Pch driver 43 Pch driver 44 Pch driver 45 Pch driver 38 DT1 DT2 OUT2 13 10 11 OUT3 7 9 IN4– IN4+ FB5 8 OUT4 18 20 IN5– IN5+ 19 OUT5 Hi FB6 IN6– Pch driver 24 23 21 39 Nch driver OUT6b OUT6a Hi CP 6 TIMER LATCH 22 OHP UVLO 42 36 2 2 3 1 CTI RT 32 31 30 25 26 OSC CT2 CNT1 CNT2 CNT3/4 CNT5 CNT6 35 34 33 28 27 Soft start CS1 CS2 CS3/4 CS5 CS6 ON/OFF GND1 GND2 SYN FA3621F Pin No. Pin symbol Description Pin No. Pin symbol Description 1 RT Oscillator timing resistor 25 CS5 Soft start for Ch. 5 2 CT2 (Not connect any component) 26 CS6 Soft start for Ch. 6 3 CT1 VREF Oscillator timing capacitor 27 Reference voltage output 28 CNT6 CNT5 Ch. 6 ON/OFF function 4 5 CREF Capacitor for reference voltage output 29 VCC2 Power supply for output stage 6 CP Timing capacitor for timer latch delay 30 CS3/4 Soft start for Ch. 3 & Ch. 4 7 FB4 Ch. 4 output of error amplifier 31 CS2 Soft start for Ch. 2 8 Ch. 4 non-inverting input to error amplifier 32 Ch. 4 inverting input to error amplifier 33 CS1 CNT3/4 Soft start for Ch. 1 9 IN4+ IN4– 10 IN3– Ch. 3 inverting input to error amplifier 34 CNT2 Ch. 2 ON/OFF function 11 IN3+ Ch. 3 non-inverting input to error amplifier 35 CNT1 Ch. 1 ON/OFF function 12 VREG Regulated voltage output 36 SYN (Connect to GND1/ GND2 terminal) 13 Ch. 3 output of error amplifier 37 Ch. 2 inverting input to error amplifier 38 VDRV OUT5 Bias for logic circuit of outputs 14 FB3 IN2– 15 FB2 Ch. 2 output of error amplifier 39 OUT6a Ch. 6 output (for Nch-MOSFET) 16 IN1– Ch. 1 inverting input to error amplifier 40 (OPEN) (Not connect any component) 17 FB1 Ch. 1 output of error amplifier 41 OUT1 Ch. 1 output (for Pch-MOSFET) 18 FB5 IN5+ Ch. 5 output of error amplifier 42 Ch. 5 non-inverting input to error amplifier 43 GND2 OUT2 Ground 19 20 IN5– Ch. 5 inverting input to error amplifier 44 OUT3 Ch. 3 output (for Pch-MOSFET) 21 IN6– Ch. 6 inverting input to error amplifier 45 OUT4 Ch. 4 output (for Pch-MOSFET) 22 GND1 Ground 46 VCC1 Power supply for control circuit 23 OUT6b ON/OFF switch for ch.6 power supply 47 DT2 (Connect to DT1) 24 FB6 Ch. 6 output of error amplifier 48 DT1 (Connect to DT2) Ch. 5 ON/OFF function Ch. 3 & Ch. 4 ON/OFF function Ch. 5 output (for Pch-MOSFET) Ch. 2 output (for Pch-MOSFET) ■ Absolute maximum ratings Item Symbol Rating Unit Power supply voltage VCC IOUT IOUT IOUT6b 20.0 V –200 mA 200 mA –500 mA –0.3 to +2.8 V Ambient temperature VANA VLOG Pd TJ TOP Storage temperature Tstg Source peak current Sink peak current Output peak current of OUT6b Input voltage for analog input Input voltage for logic input Total power dissipation * Junction temperature –0.3 to +5.5 V 550 mW 125 °C –20 to +85 °C –40 to +125 °C * Ta < 25°C ■ Recommended operating conditions Item Symbol Min. Max. Unit Power supply voltage VCC VLOG 4.5 18.0 V 0.0 5.25 V fOSC RT CT CREF IREF 50 1000 kHz 6.8 100 kΩ 68 1000 Input voltage for logic input Oscillation frequency Oscillator timing resistor Oscillator timing capacitor CREF terminal by-pass capacitor VREF terminal output current –60 pF µF 0.01 0 µA 3 FA3621F ■ Electrical characteristics (Ta=25°C, Vcc1=Vcc2=6V, CT=100pF, RT=18kΩ) Reference voltage section Item Symbol Output voltage Line regulation VREF VRLIN Output voltage variation due to temperature change Test condition Min. Typ. Max. Unit 0.985 1.00 1.015 V VCC=4.5 to 18V 3 10 mV VRTa Ta=–20 to +85°C ±0.5 Item Symbol Test condition Output voltage VREG % Regulated voltage section Min. Typ. Max. Unit 2.40 2.67 2.95 V Unit Oscillator section Item Symbol Test condition Min. Typ. Max. Oscillation frequency fOSC fdV fdT RT=18kΩ, CT=100pF VCC=4.5 to 18V Ta=–20 to +25°C 414 460 506 kHz ±1 ±3 % Frequency variation due to supply voltage change Frequency variation due to temperature change ±1.5 % ±1.5 Ta=+25 to +85°C Error amplifier section Item Symbol Input offset voltage Output sink current VIOF VICOM AVOL fT IFBL VFB=1.0V Output source current IFBH VFB=0V Item Symbol Test condition Maximum duty cycle Dmax Input common mode voltage range Open-loop gain Unity-gain bandwidth Test condition Min. Typ. 0.2 70 1.5 Max. Unit 10 mV 1.7 V 75 dB 1.2 MHz 2.8 mA –0.25 –0.15 mA PWM control section Min. Typ. Max. Unit 100 % Max. Unit Soft-start circuit section 1 (CS1, CS2, CS3/4) Item Symbol Test condition Input threshold voltage VCSO VCS100 ICS Duty cycle=0% Item Symbol Test condition Input threshold voltage VCSO VCS100 ICS Duty cycle=0% 0.79 V Duty cycle=100% 1.40 V 0 µA Charge current Min. Typ. 0.78 Duty cycle=100% V 1.38 V –7.5 –5.1 –2.5 µA Min. Typ. Max. Unit Soft-start circuit section 2 (CS5, CS6) Charge current 4 FA3621F Short-circuit protection section Item Symbol Threshold voltage at CP Charge current at CP VCPTH ICP Threshold voltage at error amplifier output VFBTL Test condition Min. Typ. Max. Unit 1.90 2.16 2.42 V –2.30 –1.15 –3.45 2.16 µA V Overheat protection section Item Symbol Operating temperature TOH ∆TOH Hysteresis width Test condition Min. Typ. Max. Unit 125 135 145 °C 45 50 55 °C Min. Typ. ON/OFF logic input section Item Symbol Input voltage for ON mode VDH VDL Input voltage for OFF mode Test condition Max. Unit 1.0 5.25 V 0 0.4 V Output section 1 (OUT1) Item Symbol Test condition L-level ON resistance H-level ON resistance RONL RONH Rise time tr Fall time tf IO=10mA IO=–10mA CLOAD=1000pF CLOAD=1000pF Min. Typ. Max. Unit 6 10 Ω 6 10 Ω 30 50 ns 45 70 ns Output section 2 (OUT2, OUT3, OUT4, OUT5, OUT6a ) Item Symbol Test condition L-level ON resistance RONL RONH IO=10mA IO=–10mA Rise time tr Fall time tf CLOAD=1000pF CLOAD=1000pF Item Symbol Test condition ON resistance RON6b IO=–10mA Item Symbol Test condition Standby current ICCO ICC H-level ON resistance Min. Typ. Max. Unit 10 15 Ω 10 15 Ω 40 60 ns 55 80 ns Output section 3 (OUT6b ) Min. Typ. Max. Unit 1 2 Ω Overall device Operating-state supply current Duty cycle=0%, RL= ∞ Min. Typ. Max. Unit 3 10 µA 4 6 mA 5 FA3621F ■ Characteristic curves (Ta = 25°C) Oscillation frequency (fOSC) vs. timing resistor resistance (RT) Oscillation frequency (fOSC) vs. ambient temperature (Ta) 1000 520 CT =6 500 10 F fosc [kHz] fosc [kHz] 8p 0p F 100 47 0p 68 F 0p 480 460 440 F 420 10 400 20 100 50 10 20 0 40 RT [kΩ] 100 100 90 90 80 80 70 60 50 40 30 60 50 40 30 20 10 10 0.7 0.8 0.9 1 1.1 100 70 20 0.6 80 Output duty cycle vs. FB terminal voltage (VFB) Output duty cycle [%] Output duty cycle [%] Output duty cycle vs. CS terminal voltage (VCS ) 0 0.5 60 Ta [°C] 1.2 1.3 1.4 0 0.5 1.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 VFB [V] VCS [V] Reference voltage (VREF) vs ambient temperatare (Ta) Supply current (Icc) vs Supply voltage (Vcc) 20 1.06 18 16 1.04 1.02 Icc [mA] VREF [V] 14 12 30% ycle= c Duty 10 8 1 6 Duty cycle=0% 4 0.98 Duty cycle=100% 2 0.96 20 0 0 20 40 Ta [°C] 6 60 80 100 0 5 10 Vcc [V] 15 20 FA3621F H-level output voltage (VCC-VOH) vs. output source current (ISOURCE) for OUT1 L-level output voltage(VOL ) vs. output sink current (ISINK) for OUT1 2.2 2 2 1.8 1.8 1.6 1.6 1.4 1.4 VOL [V] VCC– VOH [V] 2.2 1.2 1 1.2 1 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0 0 100 50 150 0 200 3.5 3 3 2.5 2.5 2 2 VOL [V] VCC– VOH [V] L-level output voltage(VOL ) vs. output sink current (ISINK ) for OUT2, 3, 4, 5, 6a 3.5 1.5 1.5 1 1 0.5 0.5 0 100 50 200 150 ISINK [mA] H-level output voltage (VCC-VOH) vs. output source current (ISOURCE) for OUT2, 3, 4, 5, 6a 0 100 50 0 ISOURCE [mA] 150 200 0 0 100 50 ISOURCE [mA] 200 150 ISINK [mA] H-level output voltage (VCC-VOH) vs. output source current (ISOURCE) for OUT6b Error amplifier voltage gain(Av) / phase(θ) vs. frequency(f) Condition: open loop 180 160 1.4 140 120 100 1 AV [dB] [deg] VCC– VOH [V] 1.2 0.8 80 60 Av 40 0.6 20 0 0.4 – 20 0.2 – 40 – 60 0 0 100 200 300 ISOURCE [mA] 400 500 10 100 1K 10K 100K 1M 10M ƒ [HZ] 7 FA3621F ■ Application circuit Parts tolerances characteristics are not defined in the circuit design sample shown above. When designing an actual circuit for a product, you must determine parts tolerances and characteristics for safe and economical operation. 8