bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 INTEGRATED CHARGE CONTROLLER FOR LEAD-ACID BATTERIES • • • FEATURES 1 • • • Regulates Both Voltage and Current During Charging Precision Temperature-Compensated Reference: – Maximizes Battery Capacity Over Temperature – Ensures Safety While Charging Over Temperature Optimum Control to Maximize Battery Capacity and Life Supports Different Configurations Minimum External Components Available in 16-Pin PDIP and SOIC (DW) APPLICATIONS • • • • Emergency Lighting Systems Security and Alarm Systems Telecommunication Backup Power Uninterruptible Power Supplies DESCRIPTION The bq24450 contains all the necessary circuitry to optimally control the charging of valve-regulated lead-acid batteries. The IC controls the charging current as well as the charging voltage to safely and efficiently charge the battery, maximizing battery capacity and life. Depending on the application, the IC can be configured as a simple constant-voltage float charge controller or a dual-voltage float-cum-boost charge controller. The built-in precision voltage reference is especially temperature-compensated to track the characteristics of lead-acid cells, and maintains optimum charging voltage over an extended temperature range without using any external components. The ICs low current consumption allows for accurate temperature monitoring by minimizing self-heating effects. The IC can support a wide range of battery capacities and charging currents, limited only by the selection of the external pass transistor. The versatile driver for the external pass transistor supports both NPN and PNP types and provides at least 25mA of base drive. In addition to the voltage- and current-regulating amplifiers, the IC features comparators that monitor the charging voltage and current. These comparators feed into an internal state machine that sequences the charge cycle. Some of these comparator outputs are made available as status signals at external pins of the IC. These status and control pins can be connected to a processor, or they can be connected up in flexible ways for standalone applications. TYPICAL APPLICATION SCHEMATIC RISNS QEXT VRLA Battery External Supply 3 2 ISNSP ISNSM 5 IN 1 ISNS 16 4 RT 15 DRVC DRVE PRE-CHG 11 IFB RA CE 12 8 9 RB VFB 13 bq24450 BSTOP STAT1 10 STAT2 GND COMP 6 14 PGOOD 7 RD RC CCOMP A dual-level Float-cum-Boost Charger with Pre-Charge 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION DEVICE PACKAGE PACKING ORDERABLE PART NUMBER MARKING PDIP (N) Tube of 25 bq24450N bq24450N Tube of 50 bq24450D bq24450D Reel of 2500 bq24450DR bq24450D SOIC (D) ABSOLUTE MAXIMUM RATINGS (1) (2) (3) over operating free-air temperature range (unless otherwise noted) Input Voltage Voltage VALUE UNIT IN –0.3 to 40 V PGOOD, STAT1, STAT2, ISNS –0.3 to 40 V VFB, IFB, ISNSP, ISNSM –0.3 to 40 V BSTOP –0.3 to 40 V PRE-CHG (with respect to IN) –32 V ISNS 80 mA STAT1, STAT2, PGOOD 20 mA Output Current PRE-CHG –40 mA Input Current DRVC 80 mA Output Current DRVE –80 mA Input Current Power Dissipation at TA = 25°C 1000 mW Junction temperature, TJ –40 to 150 °C Storage temperature, TSTG –65 to 150 °C (1) (2) (3) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the ground terminal (pin 6) unless otherwise noted. Positive currents are into, and negative currents out of, the specified terminal. RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) VIN IN voltage range ISTAT1, ISTAT2, IPGOOD Input current, open-collector status pins IISNS Input current, open-collector ISNS comparator output TJ Junction Temperature 2 MIN MAX 5 40 V 5 mA 25 mA 70 °C –40 Submit Documentation Feedback UNITS Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 ELECTRICAL CHARACTERISTICS Over junction temperature range –40°C ≤ TJ ≤ 70°C, VIN = 10V, TJ = TA. (Positive currents are into, and negative currents out of, the specified terminal) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT UVLO Input power detected threshold VIN increasing from 0V to 5V 4.5 4.8 V VHYS-UVLO Hysteresis on UVLO VIN decreasing from 5V to 0V 4.2 200 300 mV VIN = 10V 1.6 3.3 IIN Operating current VIN = 40V 1.8 3.6 VIN = 40V, TA = –40°C to 85°C 1.8 4 2.300 2.325 mA INTERNAL REFERENCE (VREF) VREF Reference voltage level dVREF/dT Temperature coefficient of VREF ΔVREF Line regulation of VREF Measured as regulating level on VFB pin when device is in FLOAT mode. TJ = 25°C 2.275 –3.5 VIN = 5V to 40V 3 V mV/°C 8 mV VOLTAGE AMPLIFIER IVFB Input bias current VVFB = 2.30V AOV Open-loop gain Driver current = 1mA VO Output voltage swing (above GND or below VIN) –500 –200 50 65 nA dB 200 mV CURRENT LIMIT AMPLIFIER IIFB Input bias current VILIM Threshold voltage (wrt VIN) ΔVILIM Sensitivity of VILIM to VIN 225 VIN = 5V to 40V 0.2 1 µA 250 275 mV 0.03 0.25 %/V 2 2.2 DRIVER TRANSISTOR VCE Minimum collector to emitter differential VDRVC = VIN, IDRVE = 10mA IDRVE-MAX Maximum output current VDRVC – VDRVE = 2 V V 25 40 mA –40 –25 mA PRE-CHG IPRE Maximum output current VPRE = VIN - 3V VPRE Maximum output voltage (VIN – VPRE-CHG) IPRE = –10mA VPRE-REV PRE-CHG reverse hold-off voltage VIN = 0 V, IPRE = –10µA 2 2.6 V 6.3 7 V 1.01 ENABLE COMPARATOR VTH-CE Threshold voltage (x VREF) 0.99 1.00 ICE Input bias current –500 –200 V/V nA CURRENT SENSE COMPARATOR IIB-ISNS Input bias current IOS-ISNS Input offset current 100 500 10 200 VISNS Threshold voltage (VISNSP – VISNSM) nA 25 30 mV ΔVISNS/ΔVIN Threshold sensitivity to VIN ΔVISNS/ΔVCM Threshold sensitivity to common-mode voltage VIN = 5V to 40V 0.05 0.35 %/V VCM = 2V to VIN 0.05 0.35 IISNS Maximum sink current, ISNS pin VISNS = 2 V %/V 25 40 VISNS-SAT Saturation voltage, ISNS pin IISNS = 10 mA mA 200 450 mV 20 nA VOLTAGE SENSE COMPARATOR VVSNS Threshold voltage (x VREF) L1 = RESET L1 = SET 0.94 0.95 0.96 0.895 0.90 0.910 1 1.3 INPUT LOGIC LEVELS – BSTOP VTH-BS Threshold voltage IPU-BS Internal pull-up current 0.7 VBSTOP = VTH-BS V µA 10 OUTPUT LOGIC LEVELS – STAT1, STAT2, PGOOD ISINK-MAX Maximum sink current VSAT Output saturation voltage Ilkg Leakage current VPIN = 2V, output transistor ON 2.5 5 mA ISINK = 1.6 mA 250 450 mV ISINK = 50 µA 30 50 mV 1 3 µA VPIN = 40V, output transistor OFF Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 3 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com IFB ISNSP ISNSM DRVC DRVE 12W Driver + 25 mV Q1 VIN ISNS + 250mV COMP Current Sense Comparator Current Limit VREF Voltage Loop VIN Q5 VREF IN VIN Voltage Reference o 2.3V at 25 C -3.5 mV/C VFB VVFB PRE-CHG Enable Comparator UVLO CE Q2 VIN Q3 VREF Q4 PGOOD Q7 VVFB S1 Voltage Sense Comparator S0 0.95VREF 0.90VREF STAT1 Q8 STAT2 R R Q L1 L2 S BSTOP Q Q9 S GN Figure 1. Simplified Block Diagram 4 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 PIN FUNCTIONS PIN # NAME I/O DESCRIPTION 1 ISNS O Output of the current-sense comparator. Open-Collector. 2 ISNSM I Negative input of the current-sense comparator. 3 ISNSP I Positive input of the current-sense comparator. 4 IFB I Input for the current-regulating loop. External resistor between IN and IFB sets the charging current value. 5 IN I Supply voltage pin. Connect to external DC source. 6 GND – Ground terminal. 7 PGOOD O Open-collector output, indicates supply status at IN pin. Active low. 8 BSTOP I Control input. Taking this pin from low to high transitions the charger from Boost Mode to Float Mode. Internally pulled up through a 10µA current source. 9 STAT2 O 10 STAT1 O 11 PRE-CHG O Can be used to trickle-charge the battery till its voltage rises to a safe value. PRE-CHG will source current as long as the control voltage on the CE pin is below VREF. If using, connect to battery pack through external resistor. 12 CE I Charge enable control. If the voltage on the CE pin is below VREF, the driver transistor will be off and the PRE-CHG pin will source current. 13 VFB I Voltage feedback pin. Connect to battery through external resistive divider. 14 COMP I/O Compensation terminal for voltage loop. Connect a capacitor from this pin to GND. 15 DRVE O Emitter of the internal (NPN) driver transistor. 16 DRVC I Collector of the internal (NPN) driver transistor. Open-collector status outputs. See table below. PINOUT STAT1 STAT2 Hi-Z Hi-Z CONDITION Float Mode On Hi-Z Bulk Charge On On Boost Mode DW PACKAGE (TOP VIEW) ISNS 1 16 DRVC ISNSM 2 15 DRVE ISNSP 3 14 COMP IFB 4 13 VFB IN 5 12 CE GND 6 11 PRE-CHG PGOOD 7 10 STAT1 BSTOP 8 9 STAT2 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 5 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com TYPICAL OPERATING PERFORMANCE Compensated Voltage Reference vs Temperature 2.6 2.5 VREF - Voltage Reference − V VIN = 10V Specified Error Band 2.4 2.3 2.2 Specified Error Band 2.1 2 -40 -30 -20 -10 0 10 20 30 40 50 60 70 o T − Temperature − C Figure 2. - 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 DETAILED FUNCTIONAL DESCRIPTION The bq24450 contains all the necessary circuitry to optimally control the charging of sealed lead-acid batteries. The IC controls the charging current as well as the charging voltage to safely and efficiently charge the battery, maximizing battery capacity and life. Depending on the application, the IC can be configured in various ways: examples are a constant-voltage float charger, a dual-voltage float-cum-boost charger or a dual step current charger. Only an external pass transistor and minimum number of external passive components are required along with the IC to implement a charger for sealed lead-acid batteries. The IC's internal driver transistor Q1 (see Figure 1) supports NPN as well as PNP pass transistors, and provides enough drive current (25mA specified) to support a wide range of charging rates. The driver transistor is controlled by a voltage regulating loop and a current limiting-limiting loop (see Figure 1). The current-limiting loop reduces drive when the voltage between the IN pin and the IFB pin increases towards VILIM (250mV typical). The voltage regulating loop tries to maintain the voltage on the VFB pin at VREF. Together, these two loops constitute a current-limited precision constant-voltage system, which is the heart of any lead-acid charger. The voltage regulating amplifier needs an external compensation circuit which depends on the type of external pass transistor (see Application Information section). An important feature of the bq24450 is the precision reference voltage. The reference voltage is specially temperature compensated to track the temperature characteristics of lead-acid cells. Additionally, the IC operates with low supply current, only 1.6mA, minimizing on-chip dissipation and permitting the accurate sensing of the operating environmental temperature by avoiding self-heating effects. To take full advantage of the temperature-compensated reference, the IC should be in the same thermal environment as the battery. An undervoltage lock-out circuit is also provided (see Figure 1). This circuit disables the driver transistor as long as the input voltage is below UVLO (4.5V typical). The UVLO circuit also drives an open-collector output PGOOD. Voltage-sense and current-sense comparators are available in the IC. The current-sense comparator is uncommitted. Its open-collector output is OFF when the difference between the ISNSP and ISNSM pins is less than VISNS (25mV typical), and ON when the difference is more than VISNS. Depending on the application, this comparator may be used to switch to float charging after the boost phase is over. The voltage sense comparator can be used to sense the voltage level of the battery to initiate a new charge cycle. Latches L1 and L2 constitute a state-machine to control the charging sequence. The internal inputs to the state-machine come from the UVLO circuit and the voltage-sense comparator. One external input is provided, the BSTOP pin. The outputs of the L1 and L2 latches are available at the STAT1 and STAT2 pins. The BSTOP pin is internally pulled up through a 10µA current source. The states of the state-machine are: Q(L1) Q(L2) STAT1 STAT2 Condition State # LOW HIGH ON OFF Bulk Charge State 1 LOW LOW ON ON Boost Mode State 2 HIGH HIGH OFF OFF Float Mode State 3 A small bias current source is available at the PRE-CHG pin to provide pre-charge to deeply discharged batteries. The PRE-CHG pin sources current when the voltage at the CE pin is below VREF. Driver transistor Q1 is turned OFF when the PRE-CHG current is ON. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 7 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com DETAILED OPERATION AND APPLICATION INFORMATION A Simple Dual-Level Float-Cum-Boost Charger Figure 3 shows the bq24450 configured as a simple dual-level float-cum-boost charger. Figure 4 shows the sequence of events that occur in a normal charge cycle. At (1) in Figure 4, power is switched ON. As long as the input voltage VIN is below the undervoltage lockout threshold UVLO, Q2 is ON, disabling the driver transistor Q1. As the input voltage VIN ramps up and rises above UVLO Q2 turns OFF. This enables Q1 and thus the external transistor QEXT. At the same time, Q7 turns ON, latch L1 is forced to RESET and latch L2 is SET (see Figure 1 for the internals of the Charging State Logic). The voltage regulating amplifier tries to force the voltage at the VFB pin to VREF by turning Q1 and thus QEXT fully ON, but the current limiting amplifier limits the charging current ICHG to IMAX-CHG such that the voltage across RISNS is VILIM – 250mV typical. Thus IMAX-CHG is given by: IMAX-CHG = VILIM ÷ RISNS As ICHG flows into the battery, the battery terminal voltage increases. The voltage at the VFB pin is the battery voltage scaled by the resistive divider formed by RA and RB//RC (because Q8 is ON). At (3), the voltage on the VFB pin exceeds 0.95VREF, and the output of the voltage sense comparator goes HIGH. This forces L2 to RESET, and STAT2 turns ON. The battery voltage VBI at this point when STAT2 indicates boost is given by: VBI = 0.95VREF × A + RB//RC) ÷ RB//RC Other than STAT2 changing state at this point, there is no externally observable change in the charging conditions. IMAX-CHG continues to flow into the battery. RISNS VBAT QEXT External Supply ICHG ISNSP ISNSM 3 IFB 2 DRVC 4 VRLA Battery DRVE 16 15 RA ISNS 1 Q1 250mV 14 + + 25mV Q6 COMP VREF 13 Q5 11 VFB RB RC VREF IN 5 Voltage Reference Q2 VIN 12 Q3 VREF Q4 CE Connect to IN 7 Q7 10 BSTOP 8 STAT1 Q8 0.95VREF Charging State Logic 9 Q9 0.90VREF VVFB 6 GND Figure 3. 8 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 As charging proceeds, the voltage at the VFB pin increases further to VREF. At this point, the voltage regulating amplifier prevents the voltage at the VFB pin from rising further, maintaining the battery voltage at VBOOST. [(4) in Figure 3]. VBOOST = VREF × A + RB//RC) ÷ RB//RC ICHG keeps flowing into the battery. As the battery approaches full charge, the current into the battery decreases, while the battery terminal voltage is maintained at VBOOST. At (5), the charging current ICHG reduces to a value ITAPER such that the voltage across RISNS becomes less than VISNS (25mV typical) ITAPER = VISNS ÷ RISNS Q6 at the output of the current sense comparator turns OFF. The internal current source pulls the BSTOP pin HIGH, latch L1 is forced to SET, in turn forcing L2 to SET. The reference voltage on the voltage sense comparator is now 0.9VREF. STAT1 turns OFF, and the voltage on the battery settles to: VFLOAT = VREF × A + RB) ÷ RB As long as the peak load current is less than IMAX-CHG, it will be supplied by QEXT, and the voltage across the battery will be maintained at VFLOAT. But if the peak load current exceeds IMAX-CHG, the battery will have to provide the excess current, and the battery terminal voltage will drop. Once it drops below 0.9VREF, at (6) in Figure 3, a new charge cycle is initiated. The battery voltage VBAT at this point, VRCH, is given by: VRCH = 0.9VREF × A + RB) / RB 1 3 2 4 5 6 7 VUVLO VIN IMAX-CHG ITAPER ICHG VBOOST VBI VFLOAT VRCH VBAT PGOOD Q7 OFF ON ISNS Q6 OFF ON ON OFF OFF ON STAT1 Q8 ON ON OFF OFF ON STAT2 Q9 OFF ON OFF STATE # STATE #1 ON STATE #2 OFF STATE #3 #1 ON #2 Figure 4. Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 9 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com An Improved Dual-Level Float-Cum-Boost Charger with Pre-Charge The problem with the charger circuit shown in Figure 3 is that even with deeply discharged batteries, charging starts at full current level IMAX-CHG. This can sometimes be hazardous, resulting in out-gassing from the battery. The bq24450 can be configured to pre-charge the battery till the voltage levels rise to levels safe enough to permit charging at IMAX-CHG. In the circuit of Figure 5, the CE pin is used to detect the battery voltage. As long as the voltage at the CE pin is below VREF, the enable comparator turns ON Q3 and Q4. This turns OFF Q1 and turns ON Q5, permitting a pre-charge current IPRE to flow from the PRE-CHG pin through RT into the battery. IPRE = (VIN – VBAT) ÷ RT Once the battery voltage rises above a safe threshold VTH at (2) in Figure 6, the enable comparator turns OFF Q3 and Q4, thus turning OFF Q5 and enabling Q1. QEXT then provides IMAX-CHG, and the circuit after this performs as described before. VTH = VREF × A + RB + RC//RD) ÷ B + RC//RD) RISNS I VBAT CHG QEXT VRLA Battery External Supply ISNSM ISNSP 3 IFB 2 DRVC 4 DRVE RA 15 16 RT ISNS 1 14 + + 25mV Q6 COMP Q1 250mV VREF 13 Q5 11 VFB RB PRE-CHG RC VREF IN 5 Voltage Reference 12 Q2 VIN CE Q3 VREF Q4 7 Q7 10 8 BSTOP STAT1 RD Q8 0.95VREF Charging State Logic 9 Q9 0.90VREF VVFB 6 GND Figure 5. 10 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 1 2 VIN IMAX-CHG ICHG ITAPER IPRE VBOOST VBI VFLOAT VRCH VTH VBAT Figure 6. Further Improvements to the Circuit of Figure 5 In applications where the load current is very low, the current through the VBAT voltage divider can be a non-negligible proportion of the load current. Current flowing back thorough QEXT when the input power is removed constitutes another drainage path. The modifications in Figure 7 fix both these issues. The addition of DEXT (see Figure 7) fixes the reverse current problem. Returning the voltage feedback divider chain to the PGOOD pin instead of to GND ensures that the divider does not draw any current when the input supply is not present. (When sinking 50µA, the saturation voltage of the PGOOD transistor is typically only 30mV). Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 11 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com RISNS DEXT QEXT ICHG VBAT External Supply ISNSP ISNSM 3 ISNS IFB 2 DRVC 4 1 RT 15 COMP Q1 250mV 14 + + 25mV Q6 RA DRVE 16 VRLA Battery VREF 13 Q5 RB VFB 11 PRE-CHG RC VREF IN Voltage Reference 5 12 Q2 VIN CE Q3 VREF Q4 7 Q7 10 8 BSTOP STAT1 RD Q8 0.95VREF Charging State Logic 9 Q9 0.90VREF VVFB 6 GND Figure 7. Changing the value of ITAPER for a given IMAX-CHG In the examples above, ITAPER is 10% of IMAX-CHG, because VILIM is 250mV and VISNS is 25mV (typical values), and the same resistor is used for both, the taper comparator and the current-loop amplifier. In most applications, setting ITAPER to 10% of IMAX-CHG is perfectly fine. But if, for some reason, a different value of ITAPER is required, it can be achieved, as shown in Figure 8(a) and Figure 8(b). RISNS1 RISNS1 RISNS2 RISNS2 QEXT QEXT ISNSP IN 5 ISNSM 3 2 IFB 4 IN DRVC 16 ISNSP 5 IFB 3 Figure 8a 4 ISNSM 2 DRVC 16 Figure 8b IMAX-CHG = VILIM ¸ (RISNS1 + RISNS2 ) IMAX-CHG = VILIM ¸ RISNS1 ITAPER = VISNS ¸ RISNS2 ITAPER = VISNS ¸ (RISNS1 + RISNS2 ) Figure 8. 12 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 Selecting the External Pass Transistor All the examples so far have used a PNP transistor for the external pass element. But the driver transistor in the bq24450 can be configured to drive many different types of pass transistors. This section will look at some of the different configurations that are possible. In all configurations, though, these factors hold: 1. The external pass device must have sufficient voltage rating for the application, and must have the current and power handling capabilities to charge at the desired rate at the maximum input to output differential in the application. 2. The device must have enough current gain at the required charging current to keep the drive current below 25mA. The choice of the pass device and the configuration of the internal driver transistor have an effect on the following: 1. The minimum and maximum practical charging current. 2. The open-loop gains of the current and voltage loops, and hence the value of the compensation capacitor at the COMP pin. In battery charging applications, dynamic response is not a requirement, and the values of CCOMP given below should give stable operation under all conditions. 3. The IC's power dissipation and thus its self-heating. The IC typically has a thermal resistance of 100°C/W. An external resistance RP can be added to share some of the power dissipation and reduce the IC's self-heating. 4. The minimum differential voltage ΔV (from the input to the battery) required to operate. The next section addresses a few topologies, and gives values for the charge current range, the minimum input to output differential ΔV, power dissipation PD in the IC, RP and CCOMP for each of the topologies. (In the expressions below, hFE is the current gain of the external transistor). Common-Emitter PNP IMAX-CHG range: 25mA to 1000mA Minimum ΔV: 0.5V VIN RP = (VIN(MIN) – 2.0V) ÷ IMAX-CHG × hFE(MIN) PD = (VIN(MAX) – 0.7V) ÷ hFE × IMAX-CHG – (IMAX-CHG)2 ÷ (hFE)2 × RP CCOMP = 0.1 µF VOUT QEXT DRVC 16 Q1 DRVE 15 RP PNP in a Quasi-Darlington With Internal Driver IMAX-CHG range: 25mA to 1000mA Minimum ΔV: 2V VIN RP = (VIN(MIN) – VOUT(MAX) – 1.2 V) ÷ IMAX-CHG × hFE(MIN) PD = (VIN(MAX) – VOUT – 0.7V) ÷ hFE × IMAX-CHG – (IMAX-CHG)2 ÷ (hFE)2 × RP CCOMP = 0.01µF to 0.047µF VOUT QEXT RP DRVC 16 Q1 15 DRVE Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 13 bq24450 SLUS929 – APRIL 2009 ..................................................................................................................................................................................................... www.ti.com External Quasi-Darlington IMAX-CHG range: 0.6A to 15A Minimum ΔV: 1.2V VIN RP = (VIN(MIN) – 0.7 V) ÷ IMAX-CHG × hFE1(MIN)hFE2(MIN) PD = (VIN(MAX) – 0.7 V) ÷ (hFE1 × hFE2) × IMAX-CHG – (IMAX-CHG)2 ैFE1 × hFE2)2 × RP CCOMP = 0.22µF with 470Ω series resistor to GND VOUT Q2 Q1 DRVC 16 Q1 15 DRVE RP NPN Emitter-Follower IMAX-CHG range: 25mA to 1000mA Minimum ΔV: 2.7V VIN QEXT VOUT RP RP = (VIN(MIN) – VOUT(MAX) – 1.2 V) ÷ IMAX-CHG × hFE(MIN) PD = (VIN(MAX) – VOUT – 0.7 V) ÷ hFE × IMAX-CHG – (IMAX-CHG)2 ैFE)2 × RP CCOMP = 0.01µF to 0.047µF DRVC 16 Q1 15 DRVE DESIGN EXAMPLE This section covers the design of a dual-level charger for a 6V 4Ah sealed lead-acid battery. The application is a system where the battery is used in standby mode, and the load on the battery when it powers the system is 250mA (0.06C). The battery parameters are (see References 1 and 2) Final discharge voltage 1.75V per cell 5.25V VTH Float voltage 2.30V per cell 6.9V VFLOAT Voltage in boost mode 2.45V per cell 7.35V VBOOST Charge rate 0.05C to 0.3C Use 0.15C = 600 mA IMAX-CHG VBAT(MIN) 4V Trickle charge rate 10 mA The charger is required to operate from a supply voltage of 9V to 13V. Therefore, the minimum input to output differential is 1.65V. To block reverse current from the battery to the input supply use a blocking diode as in Figure 7. This leaves only 0.65V as the differential across the external transistor, forcing the use of the Common-Emitter PNP topology. Figure 9 is the schematic for this charger (from Figure 7, with the pass transistor topology changed), with the remaining task being the calculation of all the component values. 14 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 bq24450 www.ti.com ..................................................................................................................................................................................................... SLUS929 – APRIL 2009 RISNS DEXT QEXT SLA Battery External Supply 3 2 5 IN 1 ISNS RT 16 4 ISNSP ISNSM IFB DRVC PRE-CHG 11 RA CE 12 8 9 RB VFB 13 bq24450 RD BSTOP STAT1 10 STAT2 GND COMP DRVE 6 14 15 CCOMP PGOOD 7 RC RP Figure 9. The first step is to decide on the value of the current in the voltage divider resistor string in FLOAT mode. This should be substantially higher than the input bias current in the CE and VFB pins and the leakage current in the STAT1 pin, but low enough such that the voltage on the PGOOD pin does not introduce errors. A value of 50µA is suitable. In FLOAT mode, STAT1 is OFF, so there is no current in RD. The voltage on the VFB pin is 2.3V. RC = 2.30V ÷ 50µA = 46kΩ. The closest 1% value is 45.9kΩ. VFLOAT = VREF × A + RB + RC) ÷ RC → RA + RB = 2×RC = 91.8kΩ. VBOOST = VREF × A + RB + RC//RD) ÷ RC//RD → RD = 469.2kΩ. Pick the closest 1% value of 464kΩ. VTH = VREF × A + RB + RC//RD) ÷ B + RC//RD) → RB = 36.8559kΩ. The closest 1% value is 36.5kΩ. RA = 91.8kΩ – RB = 46.5kΩ. The closest standard value is 46.4kΩ. IPRE = (VIN – VBAT) ÷ RT → RT = 500Ω. Select 499Ω. At VIN(MAX), IPRE = 16mA, which is safe. IMAX-CHG = VILIM ÷ RISNS → RISNS = 250mV ÷ 600mA = 0.417Ω. The closest 1% value is 0.422Ω. For QEXT, the BD242 is suitable, and a 1N4001 will do for DEXT RP = (VIN(MIN) – 2.0V) ÷ IMAX-CHG × hFE(MIN) = 7 ÷ 0.6 x 25 = 291.6Ω. Pick 294Ω from the standard values. PD = (VIN(MAX) – 0.7V) ÷ hFE × IMAX-CHG – (IMAX-CHG)2 ÷ (hFE)2 × RD = 126mW under worst case conditions. Choose CCOMP = 0.1µF. REFERENCES 1. Yuasa Battery Co., NP Valve Regulated Lead Acid Battery Manual 2. Panasonic, Methods of charging the Valve-Regulated Lead-Acid Battery Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq24450 15 PACKAGE OPTION ADDENDUM www.ti.com 20-Apr-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty BQ24450DW ACTIVE SOIC DW 16 BQ24450DWTR ACTIVE SOIC DW 16 40 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device BQ24450DWTR Package Package Pins Type Drawing SOIC DW 16 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2000 330.0 16.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 10.85 10.8 2.7 12.0 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Apr-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) BQ24450DWTR SOIC DW 16 2000 346.0 346.0 33.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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