SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 SINGLE-SUPPLY VOLTAGE-LEVEL TRANSLATOR WITH NINE CONFIGURABLE GATE LOGIC FUNCTIONS Check for Samples: SN74AUP1T58 FEATURES 1 • 2 • • • • • • • • • • • • • Available in the Texas Instruments NanoStar™ Packages Single-Supply Voltage Translator 1.8 V to 3.3 V (at VCC = 3.3 V) 2.5 V to 3.3 V (at VCC = 3.3 V) 1.8 V to 2.5 V (at VCC = 2.5 V) 3.3 V to 2.5 V (at VCC = 2.5 V Nine Configurable Gate Logic Functions Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity Ioff Supports Partial-Power-Down Mode With Low Leakage Current (0.5 mA) Very Low Static and Dynamic Power Consumption Pb-Free Packages Available: SON (DRY or DSF), SOT-23 (DBV), SC-70 (DCK), and NanoStar WCSP Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) Related Devices: SN74AUP1T57, SN74AUP1T97, and SN74AUP1T98 DBV OR DCK PACKAGE (TOP VIEW) B GND A 1 6 2 5 3 4 C VCC Y DRY OR DSF PACKAGE (TOP VIEW) B 1 6 C GND 2 5 VCC A 3 4 Y YFP OR YZP PACKAGE (TOP VIEW) B GND A A1 1 6 A2 B1 2 5 B2 C VCC C1 3 4 C2 Y DESCRIPTION/ORDERING INFORMATION AUP technology is the industry's lowest-power logic technology designed for use in battery-operated or battery backed-up equipment. The SN74AUP1T58 is designed for logic-level translation applications with input switching levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. The wide VCC range of 2.3 V to 3.6 V allows the possibility of battery voltage drop during system operation and ensures normal operation between this range. Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition. The SN74AUP1T58 can be easily configured to perform a required gate function by connecting A, B, and C inputs to VCC or ground (see Function Selection table). Up to nine commonly used logic gate functions can be performed. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoStar is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2010, Texas Instruments Incorporated SN74AUP1T58 SCES612H – OCTOBER 2004 – REVISED MARCH 2010 www.ti.com Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions. The SN74AUP1T58 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs. NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the package. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 85°C (1) (2) (3) TOP-SIDE MARKING (3) ORDERABLE PART NUMBER NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) Reel of 3000 SN74AUP1T58YZPR _ _ _TJ_ NanoStar™ – WCSP (DSBGA) 0.23-mm Large Bump – YFP Reel of 3000 SN74AUP1T58YFPR _ _ _TJ_ QFN – DRY Reel of 5000 SN74AUP1T58DRYR TJ uQFN – DSF Reel of 5000 SN74AUP1T58DSFR TJ SOT (SOT-23) – DBV Reel of 3000 SN74AUP1T58DBVR HT5_ SOT (SC-70) – DCK Reel of 3000 SN74AUP1T58DCKR TJ_ For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). FUNCTION SELECTION TABLE LOGIC FUNCTION FIGURE NO. 2-input NAND gate 5 2-input OR gate with both inputs inverted 6, 7 2-input NOR gate with inverted input 6, 7 2-input NAND gate with both inputs inverted 8 2-input OR gate 8 2-input XOR gate 9 Inverter 10 Noninverted buffer 11 Static-Power Consumption (µA) Dynamic-Power Consumption (pF) 3 80% 2.5 60% 3.3-V LVC Logic† 40% Voltage − V 100% 80% 3.3-V 40% Logic† 20% 20% AUP 0% † 0% AUP Single, dual, and triple gates Switching Characteristics at 25 MHz† 3.5 100% 60% 2 1.5 1 Input Output 0.5 0 −0.5 0 5 10 15 20 25 30 Time − ns 35 40 45 † AUP1G08 data at C = 15 pF L Figure 1. AUP – The Lowest-Power Family 2 5 2-input AND gate with inverted input Figure 2. Excellent Signal Integrity Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 3.3 V 3.3 V VIH = 1.19 V VIL = 0.5 V VIH = 1.19 V VIL = 0.5 V 1.8-V System 2.5-V System 3.3-V System 3.3-V System SN74AUP1T58 SN74AUP1T58 2.5 V 2.5 V VIH = 1.10 V VIL = 0.35 V VIH = 1.10 V VIL = 0.35 V 1.8-V System 2.5-V System 3.3-V System SN74AUP1T58 2.5-V System SN74AUP1T58 Figure 3. Possible Voltage-Translation Combinations 3.3 V 1.8-V System 3.3-V System SN74AUP1T58 VOH min VT+ max = VIH min = 1.19 V VT− min = VIL max = 0.5 V VOL max Input Switching Waveform Output Switching Waveform Figure 4. Switching Thresholds for 1.8-V to 3.3-V Translation Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 3 SN74AUP1T58 SCES612H – OCTOBER 2004 – REVISED MARCH 2010 www.ti.com FUNCTION TABLE INPUTS C B A OUTPUT Y L L L L L L H H L H L L L H H H H L L H H L H H H H L L H H H L LOGIC DIAGRAM (POSITIVE LOGIC) A 3 4 B C 1 Y 6 LOGIC CONFIGURATIONS VCC B Y C B B Y C 1 6 2 5 3 4 C Y Figure 5. 00/14+32: 2-Input NAND Gate 2-Input OR Gate With Both Inputs Inverted VCC B Y C B C B Y 1 6 2 5 3 4 C Y Figure 6. 14+08/14+02: 2-Input AND Gate With Inverted B Input 2-Input NOR Gate With Inverted Input 4 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 VCC A Y C A Y A C 1 6 2 5 3 4 C Y Figure 7. 14+08/14+02: 2-Input AND Gate With Inverted C Input 2-Input NOR Gate With Inverted Input VCC A Y C A Y A C 1 6 2 5 3 4 C Y Figure 8. 32/14+00: 2-Input OR Gate 2-Input NAND Gate With Both Inputs Inverted VCC B Y B C 1 6 2 5 3 4 C Y Figure 9. 86: 2-Input XOR Gate VCC B A Y 1 6 2 5 3 4 Y GND Figure 10. 04/14: Inverter Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 5 SN74AUP1T58 SCES612H – OCTOBER 2004 – REVISED MARCH 2010 www.ti.com VCC A Y A 1 6 2 5 3 4 Y GND Figure 11. 17/34: Noninverted Buffer 6 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC Supply voltage range –0.5 4.6 V VI Input voltage range (2) –0.5 4.6 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 4.6 V –0.5 VCC + 0.5 (2) UNIT VO Output voltage range in the high or low state IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±20 mA Continuous current through VCC or GND ±50 mA qJA Package thermal impedance (3) DBV package 165 DCK package 259 DRY package 340 DSF package 300 YFP package 123 YZP package Tstg (1) (2) (3) V °C/W 123 Storage temperature range –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. The package thermal impedance is calculated in accordance with JESD 51-7. RECOMMENDED OPERATING CONDITIONS (1) MIN MAX UNIT VCC Supply voltage 2.3 3.6 V VI Input voltage 0 3.6 V VO Output voltage 0 VCC V IOH High-level output current IOL Low-level output current TA Operating free-air temperature (1) VCC = 2.3 V –3.1 VCC = 3 V –4 VCC = 2.3 V 3.1 VCC = 3 V 4 –40 85 mA mA °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report Implications of Slow or Floating CMOS Inputs, literature number SCBA004. Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 7 SN74AUP1T58 SCES612H – OCTOBER 2004 – REVISED MARCH 2010 www.ti.com ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS TA = –40°C to 85°C TA = 25°C VCC MIN TYP MAX UNIT MIN MAX VT+ Positive-going input threshold voltage 2.3 V to 2.7 V 0.6 1.1 0.6 1.1 3 V to 3.6 V 0.75 1.16 0.75 1.19 VT– Negative-going input threshold voltage 2.3 V to 2.7 V 0.35 0.6 0.35 0.6 3 V to 3.6 V 0.5 0.85 0.5 0.85 ΔVT Hysteresis (VT+ – VT–) 2.3 V to 2.7 V 0.23 0.6 0.1 0.6 3 V to 3.6 V 0.25 0.56 0.15 0.56 IOH = –20 mA 2.3 V to 3.6 V IOH = –2.3 mA VOH IOH = –2.7 mA IOL = 20 mA IOL = 2.7 mA VI = 3.6 V or GND VI or VO = 0 V to 3.6 V VI or VO = 3.6 V ICC ΔICC 2.67 2.6 2.55 V V V 0.1 0.1 0.31 0.33 0.44 0.45 0.31 0.33 0.44 0.45 0 V to 3.6 V 0.1 0.5 mA 3V IOL = 4 mA ΔIoff 1.85 2.72 2.3 V IOL = 3.1 mA Ioff 1.97 1.9 2.3 V to 3.6 V IOL = 2.3 mA All inputs 2.05 3V IOH = –4 mA II VCC – 0.1 2.3 V IOH = –3.1 mA VOL VCC – 0.1 V V 0V 0.1 0.5 mA 0 V to 0.2 V 0.2 0.5 mA VI = 3.6 V or GND, IO = 0 2.3 V to 3.6 V 0.5 0.9 mA One input at 0.3 V or 1.1 V, Other inputs at 0 or VCC, IO = 0 2.3 V to 2.7 V 4 One input at 0.45 V or 1.2 V, Other inputs at 0 or VCC, IO = 0 3 V to 3.6 V 12 mA Ci VI = VCC or GND 3.3 V 1.5 pF Co VO = VCC or GND 3.3 V 3 pF SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 12) PARAMETER tpd 8 FROM (INPUT) A, B, or C TO (OUTPUT) Y CL TA = –40°C to 85°C TA = 25°C MIN TYP MAX MIN MAX 5 pF 1.8 2.3 2.9 0.5 6.8 10 pF 2.3 2.8 3.4 1 7.9 15 pF 2.6 3.1 3.8 1 8.7 30 pF 3.8 4.4 5.1 1.5 10.8 Submit Documentation Feedback UNIT ns Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 12) PARAMETER tpd FROM (INPUT) A, B, or C TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL MIN TYP MAX MIN UNIT MAX 5 pF 1.8 2.3 3.1 0.5 6 10 pF 2.2 2.8 3.5 1 7.1 15 pF 2.6 3.2 5.2 1 7.9 30 pF 3.7 4.4 5.2 1.5 10 ns SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 12) PARAMETER tpd FROM (INPUT) A, B, or C TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL UNIT MIN TYP MAX MIN MAX 5 pF 2 2.7 3.5 0.5 5.5 10 pF 2.4 3.1 3.9 1 6.5 15 pF 2.8 3.5 4.3 1 7.4 30 pF 4 4.7 5.5 1.5 9.5 ns SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 12) PARAMETER FROM (INPUT) TO (OUTPUT) A, B, or C Y UNIT MIN TYP MAX MIN MAX 1.6 2 2.5 0.5 8 10 pF 2 2.4 2.9 1 8.5 15 pF 2.3 2.8 3.3 1 9.1 30 pF 3.4 3.9 4.4 1.5 9.8 5 pF tpd TA = –40°C to 85°C TA = 25°C CL ns SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 12) PARAMETER tpd FROM (INPUT) A, B, or C TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL MIN TYP MAX MIN MAX 5 pF 1.6 1.9 2.4 0.5 5.3 10 pF 2 2.3 2.7 1 6.1 15 pF 2.3 2.7 3.1 1 6.8 30 pF 3.4 3.8 4.2 1.5 8.5 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 UNIT ns 9 SN74AUP1T58 SCES612H – OCTOBER 2004 – REVISED MARCH 2010 www.ti.com SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, VI = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 12) PARAMETER tpd FROM (INPUT) A, B, or C TO (OUTPUT) Y TA = –40°C to 85°C TA = 25°C CL MIN TYP MAX MIN MAX 5 pF 1.6 2.1 2.7 0.5 4.7 10 pF 2 2.4 3 1 5.7 15 pF 2.3 2.7 3.3 1 6.2 30 pF 3.4 3.8 4.4 1.5 7.8 UNIT ns OPERATING CHARACTERISTICS TA = 25°C PARAMETER Cpd 10 Power dissipation capacitance TEST CONDITIONS f = 10 MHz Submit Documentation Feedback VCC = 2.5 V VCC = 3.3 V TYP TYP 4 5 UNIT pF Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 SN74AUP1T58 www.ti.com SCES612H – OCTOBER 2004 – REVISED MARCH 2010 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL (see Note A) VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V 5, 10, 15, 30 pF VI/2 VCC/2 5, 10, 15, 30 pF VI/2 VCC/2 1 MΩ CL VMI VMO LOAD CIRCUIT VI VMI Input VMI 0V tPHL tPLH VOH VMO Output VMo VOL tPHL tPLH VOH VMo Output VMo VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS NOTES: A. B. C. D. CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. Figure 12. Load Circuit and Voltage Waveforms Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): SN74AUP1T58 11 PACKAGE OPTION ADDENDUM www.ti.com 28-May-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp (3) Samples (Requires Login) SN74AUP1T58DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DBVRE4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74AUP1T58DBVTE4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74AUP1T58DBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples SN74AUP1T58DCKR ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DCKRE4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DCKRG4 ACTIVE SC70 DCK 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DCKT ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74AUP1T58DCKTE4 ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74AUP1T58DCKTG4 ACTIVE SC70 DCK 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor or Sales Office SN74AUP1T58DRYR ACTIVE SON DRY 6 5000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58DSFR ACTIVE SON DSF 6 5000 Green (RoHS & no Sb/Br) NIPDAU Level-1-260C-UNLIM Request Free Samples SN74AUP1T58YFPR ACTIVE DSBGA YFP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Purchase Samples SN74AUP1T58YZPR PREVIEW DSBGA YZP 6 3000 TBD Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1 Call TI Samples Not Available PACKAGE OPTION ADDENDUM www.ti.com 28-May-2010 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 16-Mar-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ SN74AUP1T58DBVR SOT-23 3000 180.0 9.2 DBV 6 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1T58DBVT SOT-23 DBV 6 250 180.0 9.2 3.23 3.17 1.37 4.0 8.0 Q3 SN74AUP1T58DCKR SC70 DCK 6 3000 180.0 8.4 2.24 2.34 1.22 4.0 8.0 Q3 SN74AUP1T58DCKT SC70 DCK 6 250 180.0 8.4 2.24 2.34 1.22 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 16-Mar-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AUP1T58DBVR SOT-23 DBV 6 3000 202.0 201.0 28.0 SN74AUP1T58DBVT SOT-23 DBV 6 250 202.0 201.0 28.0 SN74AUP1T58DCKR SC70 DCK 6 3000 202.0 201.0 28.0 SN74AUP1T58DCKT SC70 DCK 6 250 202.0 201.0 28.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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