HITACHI HD74LVCZ16244A

HD74LVCZ16244A
16–bit Buffers / Line Drivers with 3–state Outputs
ADE-205-232 (Z)
1st. Edition
February 1999
Description
The HD74LVCZ16244A has sixteen line drivers with three state outputs in a 48 pin package. This device
is a non inverting buffer and has four active low enables (1G to 4G). Each enable independently controls
four buffers.
When VCC is between 0 and 1.5 V, the device is in the high impedance state during power up or power
down.
Low voltage and high speed operation is suitable at battery drive product (note type personal computer) and
low power consumption extends the life of a battery for long time operation.
Features
• VCC = 2.7 to 5.5 V
• All inputs VIH (Max) = 5.5 V (@VCC = 0 to 5.5 V)
• All outputs VO (Max) = 5.5 V (@VCC = 0 V or output off state)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High impedance state during power up and power down
• Power off disables outputs, permitting live insertion
• High output current ±24 mA (@V CC = 3.0 to 5.5 V)
HD74LVCZ16244A
Function Table
Inputs
Output Y
G
A
H
X
Z
L
H
H
L
L
L
H : High level
L : Low level
X : Immaterial
Z : High impedance
2
HD74LVCZ16244A
Pin Arrangement
1G 1
48 2G
1Y1 2
47 1A1
1Y2 3
46 1A2
GND 4
45 GND
1Y3 5
44 1A3
1Y4 6
43 1A4
VCC 7
42 VCC
2Y1 8
41 2A1
2Y2 9
40 2A2
GND 10
39 GND
2Y3 11
38 2A3
2Y4 12
37 2A4
3Y1 13
36 3A1
3Y2 14
35 3A2
GND 15
34 GND
3Y3 16
33 3A3
3Y4 17
32 3A4
VCC 18
31 VCC
4Y1 19
30 4A1
4Y2 20
29 4A2
GND 21
28 GND
4Y3 22
27 4A3
4Y4 23
26 4A4
4G 24
25 3G
(Top view)
3
HD74LVCZ16244A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage
VCC
–0.5 to 7.0
V
Input voltage
VI
–0.5 to 7.0
V
Output voltage
VO
–0.5 to 7.0
V
–0.5 to VCC+0.5
Conditions
Output “Z” or VCC : OFF
Output “H” or “L”
Input diode current
I IK
–50
mA
VI < 0
Output diode current
I OK
–50
mA
VO < 0
Output current
IO
±50
mA
VCC, GND current
I CC or IGND
±100
mA
Storage temperature
Tstg
–65 to 150
°C
Note: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
Recommended Operating Conditions
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
VCC
2.7 to 5.5
V
At operation
Input voltage
VI
0 to 5.5
V
Output voltage
VO
0 to 5.5
V
0 to V CC
Output current
I OH
–12
–24
I OL
Output “H” or “L”
mA
*1
VCC = 2.7 V
*1
VCC = 3.0 to 5.5 V
Input rise / fall time
t r, t f
0 to 6
ns / V
Operating temperature
Ta
–40 to +85
°C
Note:
4
1. Duty cycle ≤ 50%
VCC = 2.7 V
VCC = 3.0 to 5.5 V
12
24
Output “Z” or VCC : OFF
HD74LVCZ16244A
Logic Diagram
1G
1A1
1A2
1A3
1A4
3G
3A1
3A2
3A3
3A4
1
2G
47
2
46
3
44
5
43
6
1Y1
2A1
1Y2
2A2
1Y3
2A3
1Y4
2A4
25
4G
36
13
35
14
33
16
32
17
3Y1
4A1
3Y2
4A2
3Y3
4A3
3Y4
4A4
48
41
8
40
9
38
11
37
12
2Y1
2Y2
2Y3
2Y4
24
30
19
29
20
27
22
26
23
4Y1
4Y2
4Y3
4Y4
5
HD74LVCZ16244A
Electrical Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Input voltage
VIH
VIL
Output voltage
VOH
Min
Typ
Max
Unit Test Conditions
—
—
V
4.5 to 5.5 VCC×0.7 —
—
2.7 to 3.6 —
—
0.8
4.5 to 5.5 —
—
VCC×0.3
2.7 to 3.6 2.0
—
2.7
2.2
—
—
3.0
2.4
—
—
3.0
2.2
—
—
4.5
3.8
—
—
2.7 to 5.5 —
—
0.2
I OL = 100 µA
2.7
—
—
0.4
I OL = 12 mA
3.0
—
—
0.55
I OL = 24 mA
4.5
—
—
0.55
0 to 5.5
—
—
±5
µA
VIN = 0 to 5.5 V
2.7 to 5.5 —
—
±5
µA
VOUT = 0 to 5.5 V
I OZPU
0 to 1.5
—
—
±5
VOUT = 0.5 to 5.5 V,
I OZPD
1.5 to 0
—
—
±5
Output enable = don’t care
Output leak current
I OFF
0
—
—
±5
µA
VIN or VO = 5.5 V
Quiescent supply
I CC
2.7 to 3.6 —
—
225
µA
VIN = 3.6 to 5.5 V *1 , I O = 0
2.7 to 5.5 —
—
350
VIN = VCC or GND
∆I CC
2.7 to 3.6 —
—
500
VIN = one input at (VCC–0.6) V,
other inputs at V CC or GND
Input capacitance
CIN
3.3
—
4.1
—
pF
VIN = VCC or GND
Output capacitance
CO
3.3
—
8.1
—
pF
VOUT = VCC or GND
VOL
Input current
I IN
Off state output current I OZ
current
Note:
6
1. This applies in the disabled state only.
V
I OH = –100 µA
2.7 to 5.5 VCC–0.2 —
I OH = –12 mA
I OH = –24 mA
HD74LVCZ16244A
Switching Characteristics (Ta = –40 to 85°C)
Item
Symbol VCC (V)
Min
Typ
Max
Unit
FROM
(Input)
TO
(Output)
Propagation delay time
t PLH
2.7
—
—
4.7
ns
A
Y
t PHL
3.3±0.3 1.1
—
4.1
5.0±0.5 —
—
3.8
t ZH
2.7
—
5.8
ns
G
Y
t ZL
3.3±0.3 1.0
—
4.6
5.0±0.5 —
—
4.4
t HZ
2.7
—
6.2
ns
G
Y
t LZ
3.3±0.3 1.8
—
5.8
5.0±0.5 —
—
4.6
t OSLH
2.7
—
—
—
t OSHL
3.3±0.3 —
—
1.0
5.0±0.5 —
—
1.0
Output enable time
Output disable time
Between output pin skew
*1
—
—
ns
Note : 1. This parameter is characterized but not tested.
t OSLH = |tPLHm–t PLHn |, tOSHL = |tPHLm–t PHLn |
Test Circuit
VCC
VCC
Output
Input
Pulse generator
Zout = 50 Ω
See Function Table
1G to 4G
500 Ω
1Y1 to 4Y4
1A1 to 4A4
C L=
50 pF
S1
450 Ω
GND
50 Ω Scope
Symbol
OPEN
See
under table
*1
S1
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
t PLH / t PHL
OPEN
OPEN
t ZH/ t HZ
t ZL / t LZ
GND
6V
GND
2×VCC
Note: 1. C L includes probe and jig capacitance.
7
HD74LVCZ16244A
• Waveforms – 1
tr
tf
90 %
Vref
Input A
VIH
90 %
Vref
10 %
10 %
GND
t PHL
t PLH
VOH
Output Y
Vref
Vref
VOL
• Waveforms – 2
tf
Input G
tr
90 %
Vref
VIH
90 %
Vref
10 %
t ZL
10 %
GND
t LZ
≈VOH1
Waveform – A
Vref
t ZH
Waveform – B
Vref
VOL + 0.3 V
VOL
t HZ
VOH
VOH – 0.3 V
≈VOL1
TEST
VIH
Vcc=2.7V,
3.3±0.3V
Vcc=5.0±0.5V
2.7 V
1.5 V
VOH1
3V
VCC
50%VCC
VCC
VOL1
GND
GND
Vref
Notes: 1. Input waveform : PRR = 10 MHz, duty cycle 50%, t r = 2.5 ns, t f = 2.5 ns
2. Waveform – A shows input conditions such that the output is “L” level
when enabled by the output control.
3. Waveform – B shows input conditions such that the output is “H” level
when enabled by the output control.
8
HD74LVCZ16244A
Power up / down Characteristics
4.0
Ta = 25°C
Output enable = “L”
VOUT (V)
3.0
2.0
Disable area
Enable area
1.0
0
0
1.0
2.0
3.0
4.0
VCC (V)
9
HD74LVCZ16244A
Package Dimensions
Unit : mm
+0.3
12.50 –0.1
25
6.10 +0.3
–0.1
48
0.20 +0.1
–0.05
0.50
24
0.15 ± 0.05
1
0.08 M
10
0.05 Min
0.10
1.20 max
0.65 Max
8.10 ± 0.3
10° Max
0.50 ± 0.1
Hitachi code
EIAJ code
JEDEC code
TTP-48DC
—
—
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