HT9302 Series 1-Memory/2-Memory Tone/Pulse Dialer Patent Number: 64097, 86474, 64529, 113235 (R.O.C.) 5424740 (U.S.A.) Features · Universal specification · Hand-free control · Operating voltage: 2.0V~5.5V · Hold-line control · Low standby current · Pause, P®T can be saved for redialing · Low memory retention current: 0.1mA (typ.) · Lock function · Tone/pulse switchable · Resistor options · Interface with LCD driver - M/B ratio - Flash function and flash time - Pause and P®T duration - Pulse number · 32 digits for redialing · 32 digits for SA memory dialing · One-key redialing · HT9302A: 18-pin DIP package · Pause and P®T key for PBX HT9302B: 22-pin SKDIP package HT9302C: 20-pin DIP package HT9302D: 24-pin SKDIP package HT9302G: 16-pin DIP package · 4´4 keyboard matrix · 3.58MHz crystal or ceramic resonator General Description tion, Hold-line, Hand-free and LCD dialing number display interface, all of which are suitable for feature phone applications. HT9302G is simpler than HT9302X version. It provides only a redialing memory for simple low-cost system applications. The HT9302 series tone/pulse dialers are CMOS LSIs for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. The HT9302 series provide the pin-selected lock func- Selection Table Function Part No. Lock Function (Pin Selection) Hold Line HT9302x Hand Free LCD Interface Package (Normal version) HT9302A Ö ¾ ¾ ¾ 18 DIP HT9302B Ö Ö Ö ¾ 22 SKDIP HT9302C Ö ¾ ¾ Ö 20 DIP HT9302D Ö Ö Ö Ö 24 SKDIP ¾ 16 DIP HT9302G HT9302G Rev. 1.20 (Simple version) ¾ ¾ ¾ 1 September 30, 2002 HT9302 Series Block Diagram F S M C o n tro l K e y F u n c tio n E n c o d e r W R M C o u n te r C 1 D O U T C h e c k C L O C K K e y C o lu m n C 4 A D D R L R 1 T o n e E n c o d e r T o n e O u t C o n v e rte r P u ls e O u t S R A M D T M F P O X M U T E E n c o d e r K e y R o w F la s h R 4 M o d e In H K S H F I H D /H F H D I C lo c k C o n tro l D e b o u n c e H D O H F O X 1 D iv id e r X 2 C lo c k G e n e ra to r M /B M O D E T im e r K e y to n e G e n e ra to r L O C K Pin Assignment HT9302x normal version H D I 1 2 2 H D O H D I 1 2 4 H D O C 1 2 2 3 R 4 C 1 2 2 1 R 4 C 1 1 2 0 R 4 C 2 3 2 2 R 3 C 1 1 1 8 R 4 C 2 3 2 0 R 3 C 2 2 1 9 R 3 C 3 4 2 1 R 2 C 2 2 1 7 R 3 C 3 4 1 9 R 2 C 3 3 1 8 R 2 C 4 5 2 0 R 1 C 3 3 1 6 R 2 C 4 5 1 8 R 1 C 4 4 1 7 R 1 L O C K 6 1 9 M O D E C 4 4 1 5 R 1 L O C K 6 1 7 M O D E L O C K 5 1 6 M O D E X 1 7 1 8 D T M F L O C K 5 1 4 M O D E X 1 7 1 6 D T M F X 1 6 1 5 D T M F X 2 8 1 7 P O X 1 6 1 3 D T M F X 2 8 1 5 P O X 2 7 1 4 P O X M U T E 9 1 6 H K S X 2 7 1 2 P O X M U T E 9 1 4 H K S X M U T E 8 1 3 H K S 1 0 1 5 V D D X M U T E 8 1 1 H K S 1 0 1 3 V D D V S S 9 1 2 V D D 1 1 1 4 H F O V S S 9 1 0 V D D 1 1 1 2 H F O D O U T 1 0 1 1 C L O C K 1 2 1 3 C L O C K H T 9 3 0 2 A 1 8 D IP -A V S S H F I H T 9 3 0 2 B 2 2 S K D IP -A H T 9 3 0 2 C 2 0 D IP -A V S S H F I D O U T H T 9 3 0 2 D 2 4 S K D IP -A HT9302G simple version C 1 1 1 6 R 4 C 2 2 1 5 R 3 C 3 3 1 4 R 2 X 1 4 1 3 R 1 X 2 5 1 2 M O D E X M U T E 6 1 1 D T M F V S S 7 1 0 P O V D D 8 9 H K S H T 9 3 0 2 G 1 6 D IP -A Rev. 1.20 2 September 30, 2002 HT9302 Series Keyboard Information H T 9 3 0 2 A /B /C /D H T 9 3 0 2 G C 1 C 2 C 3 C 4 R 1 1 2 3 S A R 2 4 5 6 F R 3 7 8 9 R 4 * /T 0 # P R C 1 C 2 C 3 R 1 1 2 3 R 2 4 5 6 R 3 7 8 9 R 4 * /T 0 # H K S F P R Pin Description Pin Name C1~C4 R1~R4 I/O Description These pins form a 4´4 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C4) remains low and the row group (R1~R4) is set high for key input detection. An inexpensive single contact 4´4 keyboard can be used as an input device. I/O CMOS IN/OUT Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection. X1 I X2 O XMUTE O HKS Internal Connection I The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic OSCILLATOR resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS OUT XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. The XMUTE is used to mute the speech circuit when transmitting the dial signal. CMOS IN This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI/HDI (hand-free/hold-line control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the standby mode and ready to receive the key input. CMOS OUT This pin is a CMOS output structure, which by receiving HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break the line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make the line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, the pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high. PO O MODE This is a three-state input/output pin, used for dialing mode selection whether Tone mode or Pulse mode; 10pps/20pps. MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps I/O CMOS IN/OUT MODE=VSS: Tone mode During pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to tone mode. When the chips are in tone mode, switching to the pulse mode will also be recognized. Rev. 1.20 3 September 30, 2002 HT9302 Series Pin Name DTMF I/O Internal Connection Description O CMOS OUT This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor should not be less than 5kW. I CMOS IN Pull-high This pin is a Schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the HDO output once. An external RC network is recommended for input debouncing. The Pull-high resistance is 200kW typ. O CMOS OUT The HDO is a CMOS output structure. Its output is toggle- controlled by a negative transition on HDI. When HDO is toggled high, PO keeps high to hold the line. The hold function can be released by setting HFO high or by an on-off hook operation or by another HDI input. Refer to the functional description for the hold-line function. I CMOS IN Pull-low This pin is a Schmitt trigger input structure. Active high. Applying a positive going pulse to HFI can toggle the HFO once and hence control the hand-free function. The Pull-low resistance of HFI is 200kW typ. An external RC network is recommended for input debouncing. CMOS OUT The HFO is a CMOS output structure. Its output is toggle- controlled by a positive transition on HFI pin. When HFO is high, the hand-free function is enabled and PO outputs a high to connect the line. The hand-free function can be released by setting HDO high or by an on-off-hook operation or by another HFI input. Refer to the functional description for the hand-free functional operation. HDI HDO HFI HFO O LOCK This is a three-state input/output pin, used for controlling long distance call function with a lock-switch. I/O CMOS IN/OUT LOCK=OPEN: Normal dialing (no lock) LOCK=VDD: ²0, 9² is inhibited for use as the first key input LOCK=VSS: ²0² is inhibited for use as the first key input DOUT O NMOS OUT NMOS open drain output pin. It outputs the BCD code of the dialing digits to the LCD driver chip (HT16XX series) or MCU for dialing number display. Refer to the functional description for the detailed timing. CLOCK O NMOS OUT NMOS open drain output. When dialing, it outputs a series of pulse trains for DOUT data synchronization. DOUT data is valid at the falling edge of clock. VDD ¾ ¾ Positive power supply, 2.0V~5.5V for normal operation VSS ¾ ¾ Negative power supply, ground Approximate internal connection circuits C M O S IN /O U T V N M O S O U T C M O S IN C M O S O U T V D D D D C M O S IN P u ll- h ig h V O S C IL L A T O R C M O S IN P u ll- lo w X 1 X 2 2 0 p F Rev. 1.20 D D 1 0 M W 1 0 p F 4 September 30, 2002 HT9302 Series Absolute Maximum Ratings Supply Voltage ...........................................-0.3V to 6V Storage Temperature ...........................-50°C to 125°C Input Voltage .............................. VSS-0.3 to VDD+0.3V Operating Temperature ..........................-20°C to 75°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Electrical Characteristics Symbol Parameter fOSC=3.5795MHz, Ta=25°C Test Conditions VDD Conditions ¾ VDD Operating Voltage ¾ IDD Operating Current 2.5V Pulse Tone Off-hook Keypad entry No load On-hook, no load No entry Min. Typ. Max. Unit 2 ¾ 5.5 V ¾ 0.2 1 mA ¾ 0.6 2 mA ¾ ¾ 1 mA 1 ¾ 5.5 V ¾ 0.1 0.2 mA ¾ 0.2VDD V ISTB Standby Current 1V VR Memory Retention Voltage ¾ IR Memory Retention Current 1V VIL Input Low Voltage ¾ ¾ VSS VIH Input High Voltage ¾ ¾ 0.8VDD ¾ VDD V IXMO XMUTE Leakage Current ¾ VXMUTE=12V No entry ¾ ¾ 1 mA IOLXM XMUTE Sink Current 2.5V VXMUTE=0.5V 1 ¾ ¾ mA IHKS HKS Pin Input Current 2.5V VHKS=2.5V ¾ ¾ 0.1 mA RHFI HFI Pull-low Resistance 2.5V VHFI=2.5V ¾ 200 ¾ kW RHDI HDI Pull-high Resistance 2.5V VHDI=0V ¾ 200 ¾ kW IOH1 Keypad Pin Source Current 2.5V VOH=0V -4 ¾ 40 mA IOL1 Keypad Pin Sink Current 2.5V VOL=2.5V 200 400 ¾ mA IOH2 HFO Pin Source Current 2.5V VOH=2V -1 ¾ ¾ mA IOL2 HFO Pin Sink Current 2.5V VOL=0.5V 1 ¾ ¾ mA IOH3 HDO Pin Source Current 2.5V VOH=2V -1 ¾ ¾ mA IOL3 HDO Pin Sink Current 2.5V VOL=0.5V 1 ¾ ¾ mA Control key Pause Time After Flash ¾ 0.2 tFP ¾ Digit key ¾ 1 ¾ One-key redialing ¾ 1 ¾ s ¾ 20 ¾ ms ¾ 1.2 ¾ s 3.5759 3.5795 3.5831 MHz ¾ ¾ On-hook tRP One-key Redialing Pause Time ¾ tDB Key-in Debounce Time ¾ tBRK Break Time for One-key Redialing ¾ One-key redialing fOSC System Frequency ¾ Crystal=3.5795MHz Rev. 1.20 ¾ 5 s September 30, 2002 HT9302 Series Pulse Mode Electrical Characteristics Symbol Test Conditions Parameter Min. Typ. Max. Unit -0.2 ¾ ¾ mA 0.2 0.6 ¾ mA MODE pin is connected to VDD ¾ 10 ¾ MODE pin is opened ¾ 20 ¾ A resistor is linked between R2 and C1 ¾ 33:66 ¾ No resistor is linked between R2 and C1 ¾ 40:60 ¾ M/B ratio=40:60 ¾ 40 (10pps) 20 (20pps) ¾ M/B ratio=33:66 ¾ 33 (10pps) 17 (20pps) ¾ Pulse rate=10pps ¾ 800 ¾ Pulse rate=20pps ¾ 500 ¾ A resistor is linked between R2 and C1 ¾ 33 (10pps) 17 (20pps) ¾ No resistor is linked between R2 and C1 ¾ 40 (10pps) 20 (20pps) ¾ A resistor is linked between R2 and C1 ¾ 66 (10pps) 33 (20pps) ¾ No resistor is linked between R2 and C1 ¾ 60 (10pps) 30 (20pps) ¾ Conditions VDD IPOH PO Output Source Current 2.5V VOH=2V IPOL PO Output Sink Current PR Pulse Rate M/B tPDP tIDP tM tB fOSC=3.5795MHz, Ta=25°C 2.5V VOL=0.5V ¾ ¾ Make/Break Ratio % ¾ Pre-digit-pause Time Inter-digit-pause Time ¾ ¾ Pulse Make Duration ¾ Pulse Break Duration ms ms fOSC=3.5795MHz, Ta=25°C Test Conditions Parameter VTDC DTMF Output DC Level ITOL DTMF Sink Current VDD Conditions ¾ ¾ Min. 2.5V VDTMF=0.5V ¾ ms ms Tone Mode Electrical Characteristics Symbol pps Typ. Max. Unit 0.45VDD ¾ 0.7VDD V 0.1 ¾ ¾ mA 0.12 0.155 0.18 Vrms 5 ¾ ¾ kW VTAC DTMF Output AC Level RL DTMF Output Load ACR Column Pre-emphasis 2.5V Row group=0dB 1 2 3 dB THD Tone Signal Distortion 2.5V RL=5kW ¾ -30 -23 dB tTMIN Minimum Tone Duration ¾ Auto-redial Others ¾ 82.5 ¾ 9302G ¾ 100 ¾ tITPM Minimum Inter-tone Pause ¾ Auto-redial Others ¾ 85.5 ¾ 9302G ¾ 106 ¾ THD (Distortion) (dB) = 20 log ( Row group, RL=5kW 2.5V THD£-23dB V12 + V22 + K Vn2 / Vi2 + Vh2 ms ms ) Vi, Vh: Row group and column group signals V1, V2, ... Vn: Harmonic signals (BW=300Hz~3500Hz) Rev. 1.20 6 September 30, 2002 HT9302 Series Functional Description Keyboard matrix M/B ratio selection table C1~C4 and R1~R4 form a keyboard matrix. Together with a standard 4´4 keyboard, the keyboard matrix is used for dialing entries. In addition, the keyboard matrix provides resistor option for different dialing specification selections. The keyboard arrangement for each of the HT9302 series are shown in the Keyboard Information. RK12 M/B Ratio (%) No 40:60 Yes 33.3:66.6 Flash function/time (duration) selection table RK13 RK14 Flash Function Flash Time (tF) Tone frequency No No Control 600ms % Error No Yes Digit 600ms 699 +0.29% Yes No Digit 98ms 770 766 -0.52% Yes Yes Digit 300ms 852 847 -0.59% Output Frequency (Hz) Tone Name Specified Actual R1 697 R2 R3 Pause and P®T duration selection table R4 941 948 +0.74% C1 1209 1215 +0.50% RK21 tP (sec) tP®T (sec) C2 1336 1332 -0.30% No 3.6 3.6 C3 1477 1472 -0.34% Yes 2 1 Note: % Error does not contain the crystal frequency drift Pulse number selection table · This table shows pulse number selections for Dialing specification selection HT9302x. By means of adding resistors on the keyboard matrix pins, various dialing specifications can be selected. The allowable option resistor connections are shown. C 1 C 2 C 3 C 4 R 1 R R 2 R K 1 2 R K 1 3 R K 1 4 R 3 K 2 1 R R K 3 1 K 4 1 RK13 RK14 Option Function No N No Yes N+1 Yes No 10-N Yes Yes ¾ Make/Break Ratio Selection Pulse Number No N Yes 10-N Default (No Resistor) 40:60 Flash Function and Flash=control function Flash Time Selection Flash time=600ms Pause & P®T Duration Selection tP=3.6s tP®T=3.6s RK31 Pulse Number Selection N Rev. 1.20 No RK31 RK21 RK41 Pulse Number · HT9302G has different selection method listed in the All the resistors are 330kW. The resistor option functions and the default specifications (without option resistors) are listed below. RK12 RK41 table below. R 4 Option Resistor RK31 7 September 30, 2002 HT9302 Series Pulse number table Hold-line function operation · Hold-line function execution Keypad Output Pulse Number Digit Key Normal N New Zealand (10-N) Sweden/ Denmark (N+1) 1 1 9 2 2 2 8 3 3 3 7 4 ¨ Off-hook 4 4 6 5 ¨ Applying a falling edge to HDI 5 5 5 6 ¨ Changing the HFO pin from low to high 6 6 4 7 7 7 3 8 8 8 2 9 9 9 1 10 0 10 10 1 */T P®T P®T P®T H # Ignored Ignored Ignored H When HDO is low, a falling edge triggers the HDI, enabling the Hold-line function (HDO becomes high). The XMUTE remains low when HDO is high. · Reset Hold-line function When HDO is high, the Hold-line function is enabled and can be reset by: · Hold-line function table C u rre n t S ta te H F O H F I H D I H K S H D O H F O H L X L H A n L A n L X H Applying a rising edge to HFI ¨ Changing the HDO pin from low to high In p u t H D O H D I H F I H K S H L X H L A n H L X H A n X H A n L A n X H L A n L A n L A n H H A n A n H A n L H H : L o g ic H IG H L : L o g ic L O W When dialing, the corresponding 4-bit BCD codes are serially presented on DOUT from MSB to LSB. The data of DOUT is valid at the falling edge of the CLOCK pin. The following table lists the BCD codes corresponding to the keyboard input. 1000 2 0010 9 1001 3 0011 0 1010 4 0100 */T 1101 5 0101 # 1100 6 0110 F 1011 7 0111 P 1110 L L L A n L A n H A n L A n L H A n A n L A n L H Rev. 1.20 X : D o n 't c a r e A n : U n c h a n g e d : R is in g e d g e : F a llin g e d g e 8 A n H : L o g ic H IG H L : L o g ic L O W X : D o n 't c a r e A n : U n c h a n g e d 0001 H L L 1 X X L X X BCD Code L X X Key-In L H L BCD Code L X H L H Key-In H X A n L X L X L H X A n L L A n L L H L H L H H D O L L L L H F O H L L X L L L N e x t S ta te H F O H A n DOUT BCD code H K S H L H L L · Hand-free function table C u rre n t S ta te A n L X ¨ A n L L · Hand-free function execution When HFO is low, a rising edge triggers the HFI, enabling the Hand-free function (HFO becomes high). L L X Hand-free function operation When HFO is high, the Hand-free function is enabled and can be reset by: ¨ Off-hook N e x t S ta te H D O H · Reset Hand-free function In p u t H K S L H : R is in g e d g e : F a llin g e d g e 8 September 30, 2002 HT9302 Series · F LOCK function The function aims to detect locked dialing number to prevent a long distance call. The dialing output of the chip is disabled if the first input key after on-off-hook is the locked number when the lock function is enabled. The lock function selection is listed below. The flash key can be selected as a digit or a control key by the option resistors RK13 & RK14. Pressing the flash key will force the PO pin to be ²low² for the tF duration and is then followed by tFP (sec). tF can also be selected by RK13, RK14. · HT9302x version LOCK Pin · P Pause key. The execution of the pause key pauses the output for the tP duration. tP can be selected by RK21. Function OPEN Normal dialing (no lock) VDD ²0, 9² is inhibited VSS ²0² is inhibited · R Redial key. Executes redialing as well as one-key redial function. Key definition · ST · 0,1,2,3,4,5,6,7,8,9 keys This key can store lock number with personal code in IDD lock operation. These are dialing number input keys for both the pulse mode and the tone mode operations. · R/P · */T Redial and pause function key. If it is pressed as the first key after off-hook, this key executes the redial function. Otherwise, it works as the pause key. This key executes the P®T function and waits a tP®T duration in the pulse mode. On the other hand, the */T key executes the * function in the tone mode. · # This is a dialing signal key for the tone mode only, no response in the pulse mode. · SA Pressing this key can save the preceding dialing telephone numbers. The saved number is redialed if it is pressed again. SA will also redial the saved number if it is the first key pressed at the off-hook state. During the dialing signal transmission, the SA key is inhibited. Rev. 1.20 9 September 30, 2002 HT9302 Series Keyboard operation The following operations are described under an on-off- hook or on-hook condition with the hand-free active condition. · N o r m a l d ia lin g P u ls e m o d e - - K e y b o a r d in p u t: D 1 D 2 D ia lin g o u tp u t: D 1 R M : D 1 T o n e m o d e ( a ) w ith o u t * /T ( a ) w ith o u t * /T ... D n K e y b o a r d in p u t: D 1 R M : D 1 D 2 ... D n ... D n D 2 ... D n D 2 ... D n S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) w ith * /T K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ( b ) w ith * /T K e y b o a r d in p u t: ... D 1 D m D ia lin g o u tp u t: D 1 R M : D 1 D 2 D ia lin g o u tp u t: D 1 D 2 ... D n D 2 ... D n D 2 ... D n * /T D n + 1 ... D m D 2 ... D n tP ® T P u ls e * /T D n + 1 ... D m D n + 1 ... D m T o n e D ia lin g o u tp u t: D 1 R M : D 1 D 2 ... D n D 2 ... D n * D n + 1 ... D m * D n + 1 ... D m S A M : U n c h a n g e d S A M : U n c h a n g e d N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its a r e e n te r e d , th e s ig n a l is tr a n s m itte d b u t th e r e d ia l fu n c tio n is in h ib ite d . · R e d ia l - P u ls e m o d e - R M c o n te n t: D 1 R M D 2 ... D n K e y b o a r d in p u t: [ R D ia lin g o u tp u t: D 1 o r R /P ] D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n o r R /P ] D 2 ... D n R M : U n c h a n g e d S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) w ith * /T D 2 ... D n * /T K e y b o a r d in p u t: [ R o r R /P ] D ia lin g o u tp u t: D 1 D 2 ... D n tP P u ls e R M : U n c h a n g e d D n + 1 ... D m ® T R M c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m K e y b o a r d in p u t: [ R o r R /P ] D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m D n + 1 ... D m T o n e R M : U n c h a n g e d S A M : U n c h a n g e d S A M : U n c h a n g e d Rev. 1.20 c o n te n t: D 1 K e y b o a r d in p u t: [ R R M : U n c h a n g e d ( b ) w ith * /T R M c o n te n t: D 1 T o n e m o d e ( a ) w ith o u t * /T ( a ) w ith o u t * /T 10 September 30, 2002 HT9302 Series · O n e - k e y r e d ia l - P u ls e m o d e - ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 D 1 R M : D 1 D 2 ... D n D 2 ... D n D 2 ... D n tB D 2 ... D n R R K K e y b o a r d in p u t: D 1 tR D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n ... D n R M : D 1 D 2 ... D n P S A M : U n c h a n g e d R tB tR R K P D 1 D 2 S A M : U n c h a n g e d ( b ) w ith * /T K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ( b ) w ith * /T K e y b o a r d in p u t: D 1 ... R D m D 2 ... D n D m R D ia lin g o u tp u t: D 1 D 2 ... D n D 2 ... D n tP ® T D n + 1 ... D m P u ls e T o n e tB R K tR P D 1 D 2 ... D n tP ® T P u ls e D n + 1 ... D m T o n e D 2 ... D n * /T D n + 1 ... D m D ia lin g o u tp u t: D 1 R M : D 1 T o n e m o d e ( a ) w ith o u t * /T tB R K tR ... D m R M : D 1 D 2 ... D n P D 1 * /T D n + 1 ... * D n + 1 ... D m D 2 ... D n * D n + 1 * D n + 1 ... D m S A M : U n c h a n g e d S A M : U n c h a n g e d N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D · S A c o p y - P u ls e m o d e - ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M : D 1 S A M : D 1 D 2 S A K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 D 2 ... D n R M : D 1 D 2 ... D n S A M : D 1 D 2 D m S A D ia lin g o u tp u t: D 1 R M : D 1 ... D n D 2 ... D n ( b ) w ith * /T K e y b o a r d in p u t: D 1 S A M : D 1 T o n e m o d e ( a ) w ith o u t * /T D 2 ... D n D 2 ... D n ... D n * /T D n + 1 * /T R M : D 1 S A M : D 1 D n + 1 ... D m S A D 2 ... D n D m D ia lin g o u tp u t: D 1 D 2 ... D n tP ® T D n + 1 ... D m P u ls e T o n e * /T D n + 1 ... D m ... D n D 2 ... D n ( b ) w ith * /T K e y b o a r d in p u t: D 1 ... D 2 D 2 ... D n D 2 ... D n D 2 ... D n D 2 ... D n S A D 2 ... D n * /T * D n + 1 ... D n + 1 ... D m * D n + 1 ... D m * D n + 1 ... D m N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its p lu s th e " S A " k e y a r e e n te r e d , th e S A V E fu n c tio n w ill n o t b e e x e c u te d , a n d a ll th e e x is tin g d a ta in th e s a v e m e m o r y w ill n o t b e c h a n g e d . Rev. 1.20 11 September 30, 2002 HT9302 Series S A d ia lin g · - P u ls e m o d e - ( a ) w ith o u t * /T S A M T o n e m o d e ( a ) w ith o u t * /T c o n te n t: D 1 K e y b o a r d in p u t: D 2 ... D n S A M D ia lin g o u tp u t: D 1 c o n te n t: D 1 D 2 ... D n K e y b o a r d in p u t: S A D 2 ... D n S A D ia lin g o u tp u t: D 1 R M : U n c h a n g e d D 2 ... D n R M : U n c h a n g e d S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) w ith * /T S A M c o n te n t: D 1 ( b ) w ith * /T S A M c o n te n t: D 1 D 2 ... D n K e y b o a r d in p u t: * /T D n + 1 ... D m S A D ia lin g o u tp u t: D 1 D 2 ... D n P u ls e R M : U n c h a n g e d tP D n + 1 ... D m T o n e ® T D 2 ... D n * D n + 1 ... D m K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m R M : U n c h a n g e d S A M : U n c h a n g e d S A M : U n c h a n g e d F la s h · - F la s h a s a d ig ita l k e y - ( a ) T h e in te r v e n ie n t k e y K e y b o a r d in p u t: K e y b o a r d in p u t: D 1 D m D ia lin g o u tp u t: D 1 D m R M : D 1 D 2 ... D n F la s h a s a c o n tr o l k e y D 2 ... D n D 2 ... D n F tF tF P D n + 1 ... D ia lin g o u tp u t: D 1 D m R M : D n + 1 ... D m D n + 1 ... D 1 D m D 2 ... D n D 2 ... D n T F F T D n + 1 F P ... D n + 1 ... S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) T h e fir s t k e y N o te : T K e y b o a r d in p u t: F D 1 D ia lin g o u tp u t: tF tF P D 2 D 1 F : b r e a k a fla s h tim e ... D n D 2 ... D n R M : U n c h a n g e d S A M : U n c h a n g e d P a u s e · K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M : D 1 D 2 ... D n D 2 ... D n P D 2 ... D n tP P D n + 1 ... D m D n + 1 ... D m D n + 1 ... D m S A M : U n c h a n g e d · N o te R M S A D 1 D n Rev. 1.20 : R M : D 2 + 1 e d ia l m S a v e d ... D n : ... D m : e m o ry ia lin g m e m o r y 0 ~ 9 0 ~ 9 , *, # 12 September 30, 2002 HT9302 Series Timing Diagrams Normal dialing · Pulse mode H ig h Im p e d a n c e H K S K E Y IN D 1 D 2 tD O th e rs X M U T E R tD B tD B B t ID P - t M H T 9 3 0 2 G X M U T E tP t ID P - t M t ID P - t M tP D P t ID D P tM P P O tB tM tM D T M F t ID P - t M X 2 2 0 m s 2 0 m s · Tone mode H ig h Im p e d a n c e H K S K E Y IN D 1 R D 2 tD tD B tD B B X M U T E P O t IT P M t IT t IT P M P M D T M F tT M IN t IT P M X 2 2 0 m s Rev. 1.20 2 0 m s 13 September 30, 2002 HT9302 Series Dialing with pause key · Pulse mode H ig h Im p e d a n c e H K S K E Y IN D 1 D 2 tD D 3 P tP + tP B D P O th e rs X M U T E t ID P - t M t ID P - t M H T 9 3 0 2 G X M U T E tP t ID D P tM tM P P O D T M F X 2 2 0 m s · Tone mode H ig h Im p e d a n c e H K S K E Y IN D 1 D 2 tD P D 3 tP B X M U T E P O tT M IN t IT t IT P M P M D T M F t IT P M X 2 2 0 m s Rev. 1.20 14 September 30, 2002 HT9302 Series Flash key operation H ig h Im p e d a n c e H K S F K E Y IN tD B X M U T E P O tF tF P D T M F X 2 2 0 m s Pulse®Tone operation H ig h Im p e d a n c e H K S K E Y IN D 1 tD * /T D 2 D 3 t ID B tP ® P T X M U T E tP D P t ID P + tP D P P O tT M IN t IT P M D T M F X 2 2 0 m s Rev. 1.20 15 September 30, 2002 HT9302 Series One key redial operation H ig h Im p e d a n c e H K S D 1 K E Y IN D 2 tD X M U T E B t IT R tD P M B t IT P M tD B tB R K t IT P O (1 .2 s e c s ) tR P (1 s e c ) t IT P M P M D T M F X 2 2 0 m s CLOCK & DOUT operation H ig h Im p e d a n c e H K S D 1 K E Y IN X M U T E tD tP B tB D P tM P O C L O C K fC D O U T L O C K = 2 .4 k H z D a ta X 2 2 0 m s N o te : D 1 = D 3 = 3 D 2 = 2 Rev. 1.20 16 September 30, 2002 HT9302 Series Application Circuits Application circuit 1 T ip 3 6 F S A 1 A b r id g e 2 5 9 R in g 1 4 8 # P 7 0 R * /T R 1 R 2 R 3 R 4 A 9 2 1 0 0 k W 3 .3 k W V D D 2 .2 k W 1 N 4 1 4 8 5 .1 V 1 N 4 1 4 8 2 7 0 k W 0 .1 m F 1 0 0 m F 4 7 k W 1 4 M O D E 1 1 H T 9 3 0 2 A V S S 9 1 0 L O C K D D 1 2 C 1 5 H K S C 2 1 V D D C 3 2 P O C 4 3 V D D 1 0 p p s 1 m F 3 9 p F 2 0 p p s T o n e n o lo c k 1 0 p F V 0 , 9 0 n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d 1 0 p F 4 A 4 2 2 2 M W n a l o p tio c tio n a l d s is to r s a b e tw e e n R k 1 8 1 7 1 6 1 5 1 0 0 k W O n -h o o k O ff-h o o k R k * R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r X 1 6 X 2 2 2 0 k W 1 0 0 k W 8 1 3 1 .5 k W D T M F X M U T E 7 3 .5 8 M H z re s o n a to r 3 9 p F 1 m F 1 5 0 W S P E E C H N E T W O R K September 30, 2002 17 Rev. 1.20 HT9302 Series Application circuit 2 T ip R in g 1 A b r id g e 6 9 3 5 8 # 2 4 7 0 1 * /T P F S A R 1 0 0 k W R k * R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r A 9 2 A 4 2 O ff-h o o k O n -h o o k 4 7 k W 2 2 M W 2 2 0 k W 3 3 k W 1 0 k W 1 0 0 k W 2 2 0 k W 0 .1 m F V 3 3 0 k W 2 .2 k W 1 N 4 1 4 8 1 4 0 .1 m F 1 3 H K S X 1 V D D 1 0 0 m F 2 2 k W 2 2 k W 1 m F 1 6 V 1 N 4 1 4 8 5 .1 V 1 N 4 1 4 8 x 4 H o ld D D 0 .1 m F 1 V S S M O D E 1 7 1 0 V D D 1 0 p p s D D H T 9 3 0 2 B 2 2 L O C K 1 5 C 1 6 H D I C 2 2 H D O C 3 3 P O C 4 4 V 0 , 9 T o n e 3 9 p F 2 0 p p s 1 0 p F n o lo c k 0 n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d 1 0 p F 5 H F I 1 1 H a n d -fre e 1 0 0 k W 1 0 m F 5 0 V R 4 R 3 R 2 R 1 3 .3 k W 0 .0 2 m F 1 8 1 9 2 0 2 1 R k n a l o p tio c tio n a l d s is to r s a b e tw e e n 7 1 m F 1 N 4 1 4 8 9 1 2 1 6 4 7 k W H F O D T M F 1 N 4 1 4 8 2 2 0 k W 2 7 0 k W 1 0 0 k W 8 X M U T E X 2 3 .5 8 M H z re s o n a to r 3 9 p F 1 .5 k W 1 m F 1 5 0 W S P E E C H N E T W O R K September 30, 2002 18 Rev. 1.20 HT9302 Series Application circuit 3 T ip 1 A b r id g e F S A R in g 3 6 P 2 9 R 5 8 # 1 7 0 4 * /T R 1 R 2 R 3 R 4 A 9 2 1 0 0 k W D D L O C K 3 .3 k W V 4 7 k W C 1 5 1 4 C 2 1 V 0 .1 m F 1 2 V D D C 3 2 P O C 4 3 D D 2 .2 k W 1 N 4 1 4 8 5 .1 V H K S 2 0 p p s T o n e 3 9 p F V D D 1 0 p p s 1 3 1 0 0 m F 2 7 0 k W 1 N 4 1 4 8 M O D E 1 6 H T 9 3 0 2 C V S S 9 1 0 p F X 1 6 1 m F X 2 7 2 2 0 k W 1 .5 k W 1 0 0 k W D T M F X M U T E 1 5 8 1 0 S P E E C H N E T W O R K 1 5 0 W 1 m F H T 1 6 X X L C D D R IV E R (s e e H T 1 6 X X d a ta ) D O U T C L O C K 1 1 3 .5 8 M H z re s o n a to r 3 9 p F 1 N 4 1 4 8 0 , 9 n o lo c k 0 n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d 1 0 p F 4 A 4 2 2 2 M W n a l o p tio c tio n a l d s is to r s a b e tw e e n R k 2 0 1 9 1 8 1 7 1 0 0 k W O n -h o o k O ff-h o o k R k * R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r September 30, 2002 19 Rev. 1.20 HT9302 Series Application circuit 4 T ip 3 6 F S A 1 A b r id g e 2 5 9 R in g 1 4 8 # P 7 0 R * /T 1 0 0 k W A 9 2 2 0 2 1 2 2 2 3 O n -h o o k O ff-h o o k 4 7 k W P O 2 2 M W 2 2 0 k W 3 3 k W C 2 3 H a n d -fre e 1 1 C 3 4 1 0 k W 1 7 C 1 2 1 0 0 k W 2 2 0 k W V 3 3 0 k W 2 2 k W 2 2 k W 1 m F 1 6 V 1 N 4 1 4 8 5 .1 V 1 N 4 1 4 8 x 4 H o ld D D 2 .2 k W 1 N 4 1 4 8 0 .1 m F 1 6 1 0 0 m F H K S 0 .1 m F 1 5 0 .1 m F V D D X 2 1 7 H D I H T 9 3 0 2 D V D D 1 0 p p s V S S M O D E 1 9 1 0 2 0 p p s D D V 0 , 9 3 9 p F T o n e n o lo c k 1 0 p F X 1 2 4 0 H D O L O C K 6 1 0 p F n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d C 4 5 H F I 1 0 0 k W 1 0 m F 5 0 V R 2 R 3 R 4 n a l o p tio c tio n a l d s is to r s a b e tw e e n R k R 1 0 .0 2 m F A 4 2 3 .3 k W R k * R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r 8 1 N 4 1 4 8 2 2 0 k W 2 7 0 k W 1 0 0 k W 1 N 4 1 4 8 1 m F 1 .5 k W 1 5 0 W 4 7 k W 1 m F H T 1 6 X X L C D D R IV E R (s e e H T 1 6 X X d a ta ) 1 2 9 1 4 1 8 4 7 k W 1 N 4 1 4 8 D T M F H F O X M U T E D O U T C L O C K 1 3 3 .5 8 M H z re s o n a to r 3 9 p F S P E E C H N E T W O R K September 30, 2002 20 Rev. 1.20 HT9302 Series Application circuit 5 T ip R in g 2 5 8 3 6 9 # 1 A b r id g e 4 7 0 1 * /T R P F R k 1 6 1 5 1 4 1 3 2 2 M W V D D 2 .2 k W 1 N 4 1 4 8 5 .1 V 1 N 4 1 4 8 2 7 0 k W 0 .1 m F 9 1 0 0 m F 4 7 k W 8 H T 9 3 0 2 G M O D E 1 2 1 0 V S S 7 H K S C 1 1 V D D 1 0 p p s T o n e 2 0 p p s 3 9 p F V D D 1 0 0 k W P O C 2 2 3 .3 k W C 3 3 1 0 p F X 1 4 1 m F n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d A 9 2 A 4 2 n a l o p tio c tio n a l d s is to r s a b e tw e e n R 4 R 3 R 2 R 1 1 0 0 k W O n -h o o k O ff-h o o k R k * R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r X 2 5 2 2 0 k W 1 .5 k W 1 0 0 k W D T M F X M U T E 3 .5 8 M H z re s o n a to r 3 9 p F 1 1 6 1 m F 1 5 0 W S P E E C H N E T W O R K September 30, 2002 21 Rev. 1.20 HT9302 Series Package Information 16-pin DIP (300mil) outline dimensions A B 1 6 9 8 1 H C D a G E I F Symbol A Rev. 1.20 Dimensions in mil Min. Nom. Max. 745 ¾ 775 B 240 ¾ 260 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 335 ¾ 375 a 0° ¾ 15° 22 September 30, 2002 HT9302 Series 18-pin DIP (300mil) outline dimensions A B 1 8 1 0 1 9 H C D E a G I F Symbol Rev. 1.20 Dimensions in mil Min. Nom. Max. A 895 ¾ 915 B 240 ¾ 260 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 335 ¾ 375 a 0° ¾ 15° 23 September 30, 2002 HT9302 Series 20-pin DIP (300mil) outline dimensions A B 2 0 1 1 1 1 0 H C D E Symbol Rev. 1.20 F a G I Dimensions in mil Min. Nom. Max. A 1020 ¾ 1045 B 240 ¾ 260 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 335 ¾ 375 a 0° ¾ 15° 24 September 30, 2002 HT9302 Series 22-pin SKDIP (300mil) outline dimensions A 2 2 B 1 2 1 1 1 H C D E Symbol Rev. 1.20 F a G I Dimensions in mil Min. Nom. Max. A 1085 ¾ 1105 B 253 ¾ 263 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 330 ¾ 375 a 0° ¾ 15° 25 September 30, 2002 HT9302 Series 24-pin SKDIP (300mil) outline dimensions A B 2 4 1 3 1 1 2 H C D E Symbol Rev. 1.20 F a G I Dimensions in mil Min. Nom. Max. A 1235 ¾ 1265 B 255 ¾ 265 C 125 ¾ 135 D 125 ¾ 145 E 16 ¾ 20 F 50 ¾ 70 G ¾ 100 ¾ H 295 ¾ 315 I 345 ¾ 360 a 0° ¾ 15° 26 September 30, 2002 HT9302 Series Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Sales Office) 11F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Shanghai) Inc. 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Holmate Semiconductor, Inc. 48531 Warm Springs Boulevard, Suite 413, Fremont, CA 94539 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com Copyright Ó 2002 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.20 27 September 30, 2002