AS23xx Secondary Side Housekeeping Circuit Features Description • Standard PC Power Good: UV Detection on 4 rails UV Detection of AC/Bulk supply OV Detection on 4 rails Open collector PG out The AS23xx is a housekeeping circuit for monitoring the outputs of power supplies. It directly senses all the output rails without the need for external dividers and detects undervoltage and overvoltage. It also provides an additional undervoltage comparator which may be configured with any arbitrary hysteresis to sense a divided down representation of the AC bulk voltage. The housekeeping section provides all the features necessary to allow external caps to set the common timing features of PC type power supplies. In addition, negative rails may be sensed without the necessity of a VEE connection, and negative sensing may be disabled without affecting operation of the positive sense section. The 2.5 V series reference is available and can source up to 5 mA. This IC is available in 16 lead packages. Outputs include a POK (Power OK) and a fault signal. • Pogrammable Fault output: OV OV plus UV OV plus UV after startup delay • OV Crow Bar Driver • Digital ON/OFF input The AS2333 includes sensing for ±12 V, 5 V, and 3.3V. The AS2350 exchanges a -5 V sense capability for the 3.3 V input. The AS2316 monitors all supply voltages, but lacks CBD (Crow-Bar Driver). • 2.5V Voltage Reference • Operates from 5V or 12V rail Pin Configuration — Top view 1 2 15 FAULT 14 VREF +5V 3 14 VREF 4 13 UVB +3.3V 4 13 UVB 5 12 DELAY -12V 5 12 DELAY 6 11 POK GND 6 11 POK HYST 7 10 PGCAP HYST 7 10 PGCAP OFF 8 9 OFF 8 9 1 16 FAULT VCC 1 16 CBD +12V 2 15 VREF +12V 2 15 FAULT +5V 3 14 UVB +5V 3 +3.3V 4 13 DELAY -5V -5V 5 12 POK -12V -12V 6 11 PGCAP GND GND 7 10 AC HYST 8 9 OFF AS2316 SOIC VCC 1 16 FAULT +12V 2 +5V 3 +3.3V 4 13 DELAY -5V 5 12 POK -12V 6 11 PGCAP GND 7 10 AC HYST 8 9 16 CBD VCC +12V VCC AC AS2333 SOIC AC AS2350 SOIC VCC 1 16 CBD 15 VREF +12V 2 15 FAULT 14 UVB +5V 3 14 VREF +3.3V 4 13 UVB -12V 5 12 DELAY GND 6 11 POK GND HYST 7 10 PGCAP OFF 8 9 OFF AC AS2333 PDIP AS2316 PDIP 16 CBD VCC 1 +12V 2 15 FAULT +5V 3 14 VREF -5V 4 13 UVB -12V 5 12 DELAY 6 11 POK HYST 7 10 PGCAP OFF 8 9 AC AS2350 PDIP Ordering Information Package Temperature Range Order Code 16-Pin Plastic SOIC 0 to 105° C AS2316D 16-Pin Plastic SOIC 0 to 105° C AS2333D 16-Pin Plastic SOIC 0 to 105° C AS2350D 16-Pin Plastic DIP 0 to 105° C AS2316N 16-Pin Plastic DIP 0 to 105° C AS2333N 16-Pin Plastic DIP 0 to 105° C AS2350N © ASTEC Semiconductor 91 Secondary Side Housekeeping Circuit AS23xx Functional Block Diagram VREF VCC nUV UV VCC GND +12V VCC nRESET R Latch nO V OV nO VLatch t S 20 µs delay FAULT Q nUVLatch UV R +5V Latch Q S nFAULT OV VCC C BD Latch p owers up in RESET state. S Q Latch UV R +3.3V C BD nRESET 500 nO V OV VCC OV 1µA nUV UVB VREF nUV Latch VCC UV - 5V HYST VREF Disab le VCC 1µA nO V PGC AP t OV nPO K 20 µs delay nUV VCC UV POK VREF - 12V VREF Disab le VREF AC VREF VCC nAC WARNING 1µA nFAULT DELAY HYST VCC nRESET OFF ASTEC Semiconductor VREF VREF nO FF WARNING 92 2.5V chip b ias Secondary Side Housekeeping Circuit AS23xx Pin Function Description (For AS2333 / AS2350) Pin Number Function 1 VCC 2 +12 V Input for overvoltage and undervoltage for the +12 V rail. 3 +5 V Input for overvoltage and undervoltage for the +5 V rail. 4 +3.3/–5 V 5 –12 V Input for overvoltage and undervoltage for the –12 V rail. This function may disabled by tying this pin to a positive voltage above 2.4 V. 6 GND Signal ground and silicon substrate. 7 HYST Open collector output of the AC undervoltage comparator. A resistor between this pin and AC will provide hysteresis to the AC undervoltage sensing. 8 OFF Pulling this pin low will reset the FAULT latch and discharge the start-up timing capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin high will send the FAULT signal high, prompting a system shutdown. 9 AC Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is less than 2.5 V, POK goes low and UVB cap discharges. 10 PG CAP A cap to ground provides a delay between undervoltage sensing becoming good and the POK output going high. Cap discharges whenever an output or AC undervoltage is detected. 11 POK Open collector output of the undervoltage sensing comparators. This pin goes low upon an undervoltage condition. Except for the delay set by the PG CAP, this pin always reflects the actual state of the undervoltage sensing. 12 DELAY A cap to ground will delay the FAULT signal when the OFF pin is used to shut down the system. The POK will signal a power fail warning immediately, but the FAULT shutdown of the power supply will be delayed. 13 UVB A cap to ground provides start-up blanking of the undervoltage sensing portion of the FAULT signal. This pin may also be grounded to prevent undervoltage conditions from triggering the FAULT signal. This pin discharges the cap whenever AC goes low or FAULT pin goes high. 14 VREF 2.5 V Voltage reference. This is a series regulator type reference. 15 FAULT 16 CBD ASTEC Semiconductor Description Power input to the chip. Input for overvoltage and undervoltage for the +3.3V rail or –5 V rail, depending on product option. Open collector output of the overvoltage and undervoltage comparators. Crow bar drive output of the overvoltage faults only. 93 Secondary Side Housekeeping Circuit AS23xx Pin Function Description (For AS2316) Pin Number Function 1 VCC 2 +12 V Input for overvoltage and undervoltage for the +12 V rail. 3 +5 V Input for overvoltage and undervoltage for the +5 V rail. 4 +3.3 Input for overvoltage and undervoltage for the +3.3V rail. 5 –5 V Input for overvoltage and undervoltage for the –5 V rail. 6 –12 V Input for overvoltage and undervoltage for the –12 V rail. This function may disabled by tying this pin to a positive voltage above 2.4 V. 7 GND Signal ground and silicon substrate. 8 HYST Open collector output of the AC undervoltage comparator. A resistor between this pin and AC will provide hysteresis to the AC undervoltage sensing. 9 OFF Pulling this pin low will reset the FAULT latch and discharge the start-up timing capacitors, UVB and PG CAP, allowing normal start-up for the system. Pulling this pin high will send the FAULT signal high, prompting a system shutdown. 10 AC Non-inverting input to the AC undervoltage sensing comparator. If the AC pin is less than 2.5 V, POK goes low and UVB cap discharges. 11 PG CAP A cap to ground provides a delay between undervoltage sensing becoming good and the POK output going high. Cap discharges whenever an output or AC undervoltage is detected. 12 POK Open collector output of the undervoltage sensing comparators. This pin goes low upon an undervoltage condition. Except for the delay set by the PG CAP, this pin always reflects the actual state of the undervoltage sensing. 13 DELAY A cap to ground will delay the FAULT signal when the OFF pin is used to shut down the system. The POK will signal a power fail warning immediately, but the FAULT shutdown of the power supply will be delayed. 14 UVB A cap to ground provides start-up blanking of the undervoltage sensing portion of the FAULT signal. This pin may also be grounded to prevent undervoltage conditions from triggering the FAULT signal. This pin discharges the cap whenever AC goes low or FAULT pin goes high. 15 VREF 2.5 V Voltage reference. This is a series regulator type reference. 16 FAULT ASTEC Semiconductor Description Power input to the chip. Open collector output of the overvoltage and undervoltage comparators. 94 Secondary Side Housekeeping Circuit AS23xx Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage Continuous Power Dissipation at 25° C Junction Temperature VCC PD TJ 20 1000 150 V mW °C Storage Temperature Range Lead Temperature, Soldering 10 Seconds TSTG TL – 65 to 150 300 °C °C Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Conditions Parameter Symbol Supply Voltage VCC Rating 5 - 12 Typical Thermal Resistance Unit Package θJA θJC Typical Derating V 16L SOIC 65° C/W 45° C/W 10.0 mW/°C 16L PDIP 80° C/W 35° C/W 12.5 mW/°C Electrical Characteristics Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; – 5 V = – 5 V; OFF = low. Parameter Symbol Test Condition Min Typ Max Unit 8 12 mA 4.2 V V Bias Supply Current Min. VCC for operation ICC VCC Min. no faults VREF = 2.5 V, no faults Undervoltage, Overvoltage +3.3 V (Not available on AS2350) +3.3 V Undervoltage UV +3.3 V Overvoltage OV +3.3 V Input Current IB V+3.3 =+3.3V, V+5 =+5.0V 2.87 2.95 3.03 3.76 3.86 3.96 V -0.1 0 0.1 mA +5 V +5 V Undervoltage UV 4.40 4.50 4.60 V +5 V Overvoltage OV 5.74 5.89 6.04 V +5 V Input Current IB 1.6 2.5 mA V+5 =+5.0V, V+3.3 =+3.3V +12 V +12 V Undervoltage UV 10.25 10.50 10.60 V +12 V Overvoltage OV 14.53 14.90 15.27 V +12 V Input Current IB 0.8 1.5 mA ASTEC Semiconductor V+12 =+12.0V 95 Secondary Side Housekeeping Circuit AS23xx Electrical Characteristics (cont’d) Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; – 5 V = – 5 V. Parameter Symbol Test Condition Min Typ Max Unit –5 V (Not available on AS2333) –5 V Undervoltage UV – 3.80 – 4.00 – 4.20 V –5 V Overvoltage OV – 6.00 – 6.25 – 6.55 V –5 V Input Current IB V-5 =-5.0V –80 –150 µA –5 V Disable Voltage VD Minimum voltage to disable 2.3 2.4 V –12 V –12 V Undervoltage UV –9.20 –9.55 –9.80 V –12 V Overvoltage OV –14.55 –15.04 –15.60 V –12 V Input Current IB V-12 =-12.0V – 100 –200 µA –12 V Disable Voltage VD Minimum voltage to disable 2.0 2.2 V AC Undervoltage UV TJ = 25° C 2.520 2.540 V AC Input Current IB – 0.5 –1 µA HYST High State Leakage IL VHYST = 5 V; AC > 2.5 V 0.01 1 µA HYST Output Current IOL VHYST = 0.3 V; AC < 2.5 V HYST Low Voltage VOL IHYST = 1 mA; AC < 2.5 V AC/HYST 2.460 1 3 mA 0.3 V 200 µA Outputs POK High State Leakage IL VPOK = 12 V; no faults POK Output Current IOL VPOK = 0.4 V; VCC = 7 V undervoltage condition FAULT High State Leakage IL VFAULT = 12 V; OFF = High FAULT Output Current VOL 100 5 10 0.01 mA 1 µA VFAULT = 0.4 V; no faults VCC = 12 V VCC = 5 V 3 1.3 10 4 mA mA mA CBD (Crow Bar Drive) Minimum Output Current IOH overvoltage condition – 25 –35 CBD Output High Voltage VOH ICBD = 0 mA; T = 25 ° C ICBD = 0 mA; T = 105 ° C; overvoltage condition 2.0 1.4 2.5 3.0 3.3 V V CBD Pulldown Resistance ROUT ICBD = 1 mA; no faults 300 500 1000 1000 ASTEC Semiconductor 96 Secondary Side Housekeeping Circuit Electrical Characteristics AS23xx (cont’d) Electrical Characteristics are guaranteed over full junction temperature range (0 to 105° C). Ambient temperature must be derated based on power dissipation and package thermal characteristics. Unless otherwise specified, the conditions of test are VCC = 12 V; +3.3 V = 3.3 V; +5 V = 5V; +12 V = 12 V; –12 V = –12 V; – 5 V = – 5 V. Parameter Symbol Test Condition Min Typ Max Unit 2.488 2.500 2.525 V Voltage Reference Output Voltage VREF IREF = 0 mA, TJ = 25° C Line Regulation ∆VREF VCC = 5 V to 15 V 10 15 mV Load Regulation ∆VREF IREF = 0 V to –5 mA 10 15 mV Temperature Deviation* ∆VREF 0 < TJ < 105° C 10 15 mV Start-Up Functions UVB Pull-up Current Source UVB Clamp IOH VUVB = 2.0 V; no faults – 0.4 –1 –1.9 µA VOH MAX IUVB = 10 µA; no faults 2.9 3.1 3.3 V UVB Discharge Current (AC shutdown) IUVB VUVB = 2.0 V; FAULT = low; AC < 2.5 V 3 8 mA UVB Discharge Current (FAULT shutdown) IOL VUVB = 2.0 V; FAULT = high; AC > 2.5 V 2.5 10 mA UVB Low Output Voltage VOL IUVB = 100 µA; FAULT = low; AC < 2.5 V PG CAP Pull-up Current Source IOH VPGCAP = 2.0 V; no faults PG CAP Clamp VOH MAX IPGCAP = 10 µA; no faults; AC > 2.5 V PG CAP Discharge Current IOL VPGCAP = 2.0 V; undervoltage condition PG CAP Low Output Voltage VOL IPGCAP = 100µA; undervoltage condition OFF Input High Voltage VIH OFF Input Low Voltage VIL OFF Pull-up to VCC R VOFF = 0 V DELAY Pull-up Current Source IOH 0.2 V – 0.5 –1 –1.4 µA 2.9 3.1 3.3 V 2 6 mA 0.2 2.0 V V 0.8 V 25 50 100 kΩ VDELAY = 0 V; OFF = high – 0.5 –1 –2.0 µA VOH MAX IDELAY = 10 µA; OFF = high 2.9 3.1 3.3 V DELAY Discharge Current IOL VDELAY = 2.0 V; OFF = low 2.5 10 DELAY Low Output Voltage VOL IDELAY = 100µA; OFF = low DELAY Clamp mA 0.2 V *Temperature deviation is defined as the maximum deviation of the reference over the given temperature range and does not imply an incremental deviation at any given temperature. Typical Performance Curves Not Available at Time of Publishing ASTEC Semiconductor 97 AS23xx Secondary Side Housekeeping Circuit Theory of Operation the outputs of the PSU. Usually, just one or the other output is used depending on the PSU’s cost and system definition. Both methods are intended to protect the customer’s system, and the customer, as the first priority. The AS23xx performs housekeeping functions for power supplies, especially switching power supplies for personal computers. The chip resides on the secondary side of the power supply (PSU), and it performs three primary functions: 1.2 Undervoltage Faults: POK and FAULT An undervoltage condition is sometimes not considered a catastrophic or dangerous condition, but always one which the customer should be warned about. The POK signal is a logic line to the customer’s system that is specified in most PC type power supply systems. The AS23xx will pull the POK signal low when a UV fault is detected. A UV fault may or may not require the system to shut down, so an undervoltage blanking pin is provided (UVB). Grounding this pin will prevent UV faults from propogating to the FAULT pin. CBD does not react to UV faults. 1) monitors the output voltages and reports faults 2) sequences the start-up of the PSU 3) sequences the shutdown of the PSU Section 1 - Output Voltages and Faults 1.0 Output Voltage Monitoring The AS23xx monitors the standard voltage outputs for PC type power supplies. It has inputs for +12 V, +5 V, +3.3 V, -5 V and -12 V. These inputs are tied directly to the outputs of the PSU, and therefore do not require external dividers to set the error thresholds. These pins are monitored for both overvoltage (OV) and undervoltage (UV) conditions. The spec’s for these thresholds are listed in the data sheet. 1.3 Input Undervoltage: AC and HYST In addition, there is a special undervoltage detection input for sensing the input voltage to the power supply, designated as the AC pin. This pin will cause the POK pin to go low if there is insufficient voltage to run the PSU outputs. Since power supplies must maintain high voltage isolation between the primary and secondary sides of the system, the AC pin is usually tied to a divided down and filtered representation of the secondary side switching waveform. Hysteresis for this function, to provide immunity from line ripple, is configured by the PSU designer and is implemented with the HYST pin, which is an open collector output of the AC comparator. 1.1 Overvoltage Faults: FAULT and CBD An overvoltage condition in a power supply is considered to be a catastrophic and dangerous condition which must result in a safe, complete and near-instantaneous shutdown of the system. Overvoltages most often result from a break in the system feedback and control circuitry or from a short between outputs. When the AS23xx detects an overvoltage, the fault is latched internally, and the FAULT and CBD pins go high. The FAULT pin is an open collector NPN output which is intended to drive an optocoupler LED for feedback to the primary side controller of the PSU. The CBD pin is an NPN Darlington output which is intended to drive an SCR crowbar circuit which will short circuit ASTEC Semiconductor Section 2 - PSU Start-up Sequences 2.0 System Start-up Sequence When the power supply starts up, the AS23xx must not erroneously report a FAULT. In addition, most PC type power supply specifications 98 Secondary Side Housekeeping Circuit require a specific timing sequence for the POK signal. Some PSU systems also require an isolated, low voltage, low power remote turn-on switch, rather than a large line cord switch. V if the VCC of the AS23xx is tied to the 12 V output or an auxilliary rail. 2.4 POK Start-up Timing: PGCAP In addition to 2.3 above, most PC power supplies require the POK pin to remain low until all outputs have been good for at least 100 ms but not more than 500 ms. A cap to ground on the PGCAP pin allows to the PSU designer to set the timing delay between the PSU outputs becoming good and the POK pin going high. The PGCAP pin provides a 1 µA current source to charge the cap, and when the cap charges above 2.5 V, the POK pin goes high. When an undervoltage occurs, the PGCAP pin discharges rapidly and the POK pin goes low. The POK pin does not respond to overvoltages. 2.1 VREF Enable of Chip Bias Since the VCC of the AS23xx comes up in a finite amount of time, and since the VREF of the chip and the bias for the comparators are not within specification until approximately 4.2 V of VCC is available, the comparators for OV and UV and most other functions are disabled until VREF is within spec. This prevents the false detection of a FAULT due to an erroneous VREF. Similarly, if VREF is too heavily loaded and gets pulled low out of spec, these functions will also shut off. 2.2 Blanking UV’s During Start-up: UVB 2.5 Isolated Remote On/Off Switching: OFF and FAULT As the power supply outputs come up, the undervoltage FAULTs must be blanked to allow the supply to complete its start-up. Putting a capacitor to ground on the UVB pin will allow the PSU designer to set a specific period of time during which undervoltages will not propogate to the FAULT pin. The UVB pin provides a 1 µA current source to charge the cap, and once the UVB pin charges above 2.5 V, the undervoltage sensing is enabled. UVB does not blank undervoltages to the POK pin. The UVB pin is clamped one diode above VREF, or about 3.1 V, allowing fast discharge of the capacitor when the system resets. A low voltage, isolated remote on/off switch may be implemented with the AS23xx OFF pin. If the chip VCC is run off an auxilliary rail, the FAULT signal may be used to start and stop the PSU. When the OFF pin is pulled from high to low or grounded, the FAULT pin resets to a low state, which may be used to drive an optocoupler to enable the primary side PWM controller. Allowing the OFF pin to go open circuit or high causes the POK pin to go low immediately, and the FAULT pin will go high after a time delay set by a cap to ground on the DELAY pin. This allows the customer’s system to receive a POK warning before the PSU actually shuts down. 2.3 POK Bias The POK pin has some specific requirements based on industry standard PC power supply specifications. At start-up, the POK pin must not rise above 0.4 V. The POK pin is an NPN open collector whose base is tied to VCC via a simple resistor. Therefore, once VCC pulls above one diode or about 0.6 V, the POK pin will go low and saturate. If the POK pin external pull-up is to the 5 V output, the POK signal will not go above 0.4 ASTEC Semiconductor AS23xx Section 3 - PSU Shutdown Sequences 3.0 Shutdown Sequence For normal shutdowns, the primary requirement is that the POK signal should go low some minimum time before the PSU outputs fall out of spec. 99 Secondary Side Housekeeping Circuit AS23xx 3.1 Delaying Remote OFF: DELAY 3.2 AC Warning Prior to Primary Drop-out In systems which use the OFF and FAULT pins to provide remote on/off switching, the delay between the OFF pin going high and the FAULT signal going high is programmable with a capacitor to ground on the DELAY pin as described in 2.5 above. The POK pin, on the other hand will go high immediately after the OFF pin is open circuited or pulled high, giving the system warning of the impending shutdown. The DELAY pin provides a 1 µA current source to charge the cap, and when the cap charges above 2.5 V, the FAULT pin will go high. In systems where the input line voltage is switched, the AC pin threshold should be set so that it causes POK to go low before the primary bulk voltage reaches drop-out and the primary PWM shuts off. The output of the AC comparator also causes the UVB pin to pull low, so that the undervoltage sensing does not trip the FAULT latch as the outputs fall below spec. Recall that the AC pin senses a divided down and filtered representation of the secondary side switching waveform, which will provide a proportional representation of the primary voltage via the turns ratio of the transformer. ASTEC reserves the right to make changes without further notice to any products described herein to improve reliability, function, or design. ASTEC does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights or the rights of others. ASTEC products are not authorized for use as components in life support devices or systems intended for surgical implant into the body or intended to support or sustain life. Buyer agrees to notify ASTEC of any such intended end use whereupon ASTEC will determine availability and suitability of its products for the intended use. ASTEC and the ASTEC logo are trademarks of ASTEC (BSR) PLC. ASTEC SEMICONDUCTOR 255 Sinclair Frontage Road • Milpitas, California 95035 • Tel. (408) 263-8300 • FAX (408) 263-8340 ASTEC Semiconductor 100