® EM MICROELECTRONIC-MARIN SA V6309/V6319 3-Pin Microprocessor Reset Circuit Features Typical Operating Configuration n Precision monitoring of 3 V, 3.3 V and 5 V power supply voltages n Fully specified over the temperature range of -40 to + 125 oC n 140 ms minimum power-on reset pulse width: n n n n n n RESET output for V6309 RESET output for V6319 16 µA supply current Garanteed RESET/RESET valid to VDD = 1 V Power supply transient immunity No external components needed 3-pin SOT-23 package Fully compatible with MAX809/MAX810 and AMD809/AMD810 Description The V6309 and V6319 are microprocessor supervisory circuits used to monitor the power supplies in µP and digital systems. They provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5 V powered or 3 V powered circuits. These circuits perform a single function: they assert a reset signal whenever the VDD supply voltage declines below a preset threshold, keeping it asserted for at least 140 ms after VDD has risen above the reset threshold. The only difference between the two devices is that the V6309 has an active-low RESET output (which is guaranteed to be in the correct state for VDD down to 1 V), while the V6319 has an active-high RESET output. The reset comparator is designed to ignore fast transients on VDD. Reset thresholds suitable for operation with a variety of supply voltages are available. Fig. 1 Pin Assignment Low supply current makes the V6309/V6319 ideal for use in portable equipment. The V6309/V6319 come in a 3-pin SOT-23 package Applications n n n n n Computers Controllers Intelligent instruments Critical µP and µC power monitoring Portable/battery-powered equipment Fig. 2 1 ® V6309/V6319 Absolute Maximum Ratings Parameter Symbol Conditions Terminal voltage to VSS Min. voltage at Reset or Reset Max. voltage at Reset or Reset Input current at VDD Output current at Reset or Reset Rate of rise at VDD Continuous power dissipation at TA = +70 °C for SOT-23 (>70 °C derate by 4 mW /°C) Operating temperature range Storage temperature range VDD Vmin Vmax Imin Imax tR Pmax -0.3 to 6.0 V -0.3 V VCC + 0.3 V 20 mA 20 mA 100 Vµs 320 mW TA TST -40 to +125 °C -65 to +150 °C Stresses above these listed maximum ratings may cause permanent damage to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Handling Procedures This device has built-in protection against high static voltages or electric fields; however, anti-static precautions must be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the supply voltage range. Table 1 Electrical Characteristics VDD = full range, TA = -40 to +125 °C unless otherwise specified, typical values are at TA = +25 °C, VDD = 5 V for versions L and M, VDD = 3.3 V for versions T and S, VDD = 3 V for version R.(Production testing done at TA = +25°C and 85 °C, over temperature limits guaranteed by design only) Parameter Symbol Test Conditions VDD range VDD TA = 0 to +70 °C TA = -40 to +105 °C TA = -40 to +125 °C Supply current versions L, M ICC versions R,S,T VDD< 5.5 V VDD < 3.6 V Reset threshold1) version L TA = +25 °C TA = -40 to +125 °C version M 2 Max. 1.0 1.2 1.6 5.5 5.5 5.5 Units V V V 60 50 µA µA 4.56 4.40 4.63 4.70 4.79 V V TA = +25°C TA = -40 to +125 °C 4.31 4.16 4.38 4.45 4.53 V V version T TA = +25°C TA = -40 to +125°C 3.04 2.92 3.08 3.11 3.17 V V version S TA = +25 °C TA = -40 to +125 °C 2.89 2.78 2.93 2.96 3.02 V V version R TA = +25 °C TA = -40 to +125°C 2.59 2.50 2.63 2.66 2.72 V V VTH 1) -200 VDD = VTH to (VTH - 100 mV) Reset active timeout period TA = -40 to +125 °C Reset output voltage low for V6309 VOL versions R,S,T versions L, M VDD > 1.0 V, ISINK = 50 µA VDD = VTH min., ISINK = 1.2 mA VDD = VTH min., ISINK = 3.2 mA Reset output voltage high for V6309 versions R,S,T VOH versions L, M VDD > VTH max., ISOURCE = 500 µA VDD > VTH max., ISOURCE = 800 µA Reset output voltage low for V6319 versions R,S,T VOL versions L, M 1) Typ. 26 16 Reset threshold temp. coefficient VDD to reset delay Min. Reset output for V6309, Reset output for V6319 VDD = VTH max., ISINK = 1.2 mA VDD = VTH max., ISINK = 3.2 mA ISOURCE = 150 µA ppm/°C 7 140 330 µs 590 ms 0.3 0.3 0.4 V V V 0.8 VDD VDD-1.5 V V V 0.3 0.4 V V Table 2 ® V6309/V6319 Supply Current vs. Temperature No load, V63xxR/S/T Power-Down Reset Delay vs. Temperature V63xxR/S/T Fig. 3 Fig. 6 Power-Down Reset Delay vs. Temperature V63xxL/M Supply Current vs. Temperature No load, V63xxL/M Fig. 4 Fig. 7 Normalized Reset Threshold vs. Temperature All versions Power-Up Reset Timeout vs. Temperature All versions Fig. 5 Fig. 8 3 ® V6309/V6319 Max.Transient Duration without Causing a Reset Pulse versus Reset Comparator Overdrive Pin Description Pin Name 1 VSS 2 for V6309 RESET 2 for V6319 RESET 3 VDD Function Ground RESET Output remains low while VDD is below the reset threshold and rises for 240 ms after VDD above the reset threshold RESET Output remains high while VDD is below the reset threshold and rises for 240 ms after VDD above the reset Supply voltage (+5V, +3.3V or +3.0V ) Application Information Table 3 Negative-Going VDD Transients In addition to issuing a reset to the microprocessor during power-up, power-down, and brownout conditions, the V6309/V6319 are relatively immune to short duration negative-going VDD transients (glitches). Fig. 8 shows typical transient duration vs. Reset comparator overdrive, for which the V6309/V6319 do not generate a reset pulse. The graph was generated using a negative-going pulse applied to VDD, starting 0.5 V above the actual reset threshold and ending below it by the magnitude indicated (reset comparator overdrive). The graph indicates the maximum pulse width a negative-going VDD transient can have without causing a reset pulse. As the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, for the V6309L and V6319M, a VDD transient that goes 100 mV below the reset threshold and lasts 20 µs or less will not cause a reset pulse. A 0.1 µF bypass capacitor mounted as close as possible to the VDD pin provides additional transient immunity. 4 Fig. 9 Ensuring a Valid Reset Output down to VDD= 0 V When VDD falls below 1 V, the V6309 RESET output no longer sinks current, it becomes an open circuit. Therefore, high-impedance CMOS logic inputs connected to RESET can drift to undetermined voltages. This presents no problem in most applications, since most µP and other circuitry is inoperative with VDD below 1 V. However, in applications where RESET must be valid down to 0 V, adding a pull-down resistor to RESETcauses any stray leakage currents to flow to ground, holding RESET low (Fig.10). R1’s value is not critical; 100 kΩ is large enough not to load RESET and small enough to pull RESET to ground. A 100 kΩ pull-up resistor to VDD is also recommended for the V6319, if RESET is required to remain valid for VDD<1 V. ® V6309/V6319 RESET Valid for VDD = Ground Circuit Interfacing to µPs with Bidirectional Reset I/O Fig. 10 Interfacing to µPs with Bidirectional Reset Pins Microprocessors with bidirectional reset pins (such as the Motorola 68HC11 series) can connect to the V6309 reset output. If, for example, the V6309 RESET output is asserted high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7 kΩ resistor between the V6309 RESET output and the µP reset I/O (Fig. 11). Buffer the V6309 RESET output to other system components. Fig. 11 Benefits of Highly Accurate Reset Threshold Most µP supervisor ICs have reset threshold voltages between 5% and 10% below the value of nominal supply voltages. This ensures a reset will not occur within 5% of the nominal supply, but will occur when the supply is 10% below nominal. When using ICs rated at only the nominal supply ±5%, this leaves a zone of uncertainty where the supply is between 5% and 10% low, and where the reset may or may not be asserted. The V6309L/T and V6319L/T use highly accurate circuitry to ensure that reset is asserted close to the 5% limit, and long before the supply has declined to 10% below nominal. 5 ® V6309/V6319 Package and Ordering Information Ordering Information The V6309 is available with a RESET output, the V6319 with a RESET output. Both type come in a 3-pin SOT-23 package. Ordering form: Type number<version letter><package> When ordering, please always specify the complete part number Version Letter Definition Output stage V6309, RESET output V63191), RESET output 4.63 L L Threshold Voltage [V] 4.38 3.08 2.93 2.63 M T S R M T S R Marking Information Marking code Type number EL V6309L EM V6309M ET V6309T ES V6309S ER V6309R 1) FL V6319L FM V6319M FT V6319T FS V6319S FR V6319R Table 5 1) Non-stock items for V6319 Table 4 EM Microelectronic-Marin SA cannot assume any responsibility for use of any circuitry described other than entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version. E. & O.E. Printed in Switzerland, Th © 2000 EM Microelectronic-Marin SA, 10/00, Vers. B/323 EM 6 Microelectronic-Marin SA, CH - 2074 Marin, Switzerland, Tel. (+41) 32 - 755 51 11, Fax (+41) 32 - 755 54 03