ETC ZN429D

THIS DOCUMENT IS FOR MAINTENANCE
PURPOSES ONLY AND IS NOT
RECOMMENDED FOR NEW DESIGNS
MAY 1994
DS3008-2.0
ZN429E8/ZN429D
LOW COST 8-BIT D-A CONVERTER
The ZN429 is a monolithic 8-bit D-A converter
containing an R-2R ladder network of diffused resistors with
precision bipolar switches.
FEATURES
■ Linearity Error ±1/2 LSB
■ Single +5V Supply
■ Low Power Consumption 25mW Typical
■ Settling Time 1 Microsecond Typical
■ TTL and 5V CMOS Compatible
■ Designed for Low Cost Applications
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC
Max. voltage, logic and VREF inputs
Storage temperature range
+7.0V
+5.5V
-55°C to +125°C
ORDERING INFORMATION
Ambient operating temperature
Package, ZN429D
Package, ZN429E8
-40°C to +85°C
MP14
DP14
BIT 3
BIT 2
(MSB) BIT 1
ANALOG OUTPUT
V REF IN
NC
0V
1
2
3
4
5
6
7
14
13
12
ZN429E8 11
10
9
8
+V CC (+5V)
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8 (LSB)
NC
DP14
NC
ANALOG OUTPUT
V REF IN
GROUND
BIT 8
BIT 7
GROUND
1
2
3
4
5
6
7
14
13
12
ZN429D 11
10
9
8
BIT 1
BIT 2
BIT 3
+V CC
BIT 4
BIT 5
BIT 6
MP14
Fig.1 Pin connections (not to scale) - top view
ZN429
ELECTRICAL CHARACTERISTICS
(at Tamb = 25°C and VCC = +5V unless otherwise specified)
Parameter
Symbol
Units
Conditions
Min.
Typ.
Max.
Converter
Resolution
8
-
-
bits
Accuracy
8
-
-
bits
Non-linearity
-
-
±0.5
LSB
Differential non-linearity
-
±0.5
-
LSB
Settling time to 0.5LSB
-
1.0
-
µs
1 LSB step
Settling time to 0.5LSB
-
2.0
-
µs
All bits ON to OFF
or OFF to ON
-
3.0
5.0
mV
All bits OFF
-
5
-
µV/°C
2.545
2.550
2.555
V
All bits ON
Ext. VREF = 2.56V
Full-scale temp. coefficient
-
3
-
ppm/°C
Ext. VREF = 2.560V
Non-linearity temp. coefficient
-
7.5
-
ppm/°C
Relative to F.S.R.
-
10
-
kΩ
0
-
3.0
V
Offset voltage ZN429E8, ZN429D
VOS
VOS temperature coefficient
Full-scale output
Analog output resistance
RO
External reference voltage
Note 1
Supply voltage
VCC
4.5
-
5.5
V
Supply current
IS
-
5
9
mA
High level input voltage
VIH
2.0
-
-
V
Low level input voltage
VIL
-
-
0.7
V
High level input current
IIH
-
-
10
µA
VCC = max.
VI = 2.4V
-
-
100
µA
VCC = max.
VI = 5.5V
-
-
-0.18
mA
VCC = max.
VI = 0.3V
Low level input current
IIL
NOTE 1: Monotonic over full temperature range.
INTRODUCTION
The ZN429 is an 8-bit D-A converter. It contains an
advanced design of R-2R ladder network and an array of
precision bipolar switches on a single monolithic chip.
The special design of the ladder network results in full
8-bit accuracy using normal diffused resistors.
The converter is of the voltage switching type and uses
an R-2R resistor ladder network as shown in Fig.3.
Each 2R element is connected either to 0V or VREF by
transistor switches specially designed for low offset voltage
(typically 1mV).
Binary weighted voltages are produced at the output of
the R-2R ladder, the value depending on the digital number
applied to the bit inputs.
An external fixed or varying reference is required which
should have a slope resistance less than 2Ω.
Suggested external reference sources are the ZN404 or
one of the ZN458 range. Each ZN404 is capable of supplying
up to five ZN429 circuits and this is increased to ten for the
ZN458 range.
ZN429
Fig.3 The R-2R ladder network
APPLICATIONS
(1) Unipolar D-A Converter
The nominal output range of the ZN429 is 0 to VREF IN
through a 10Ω resistance. Other output ranges can readily
be obtained by using an external amplifier.
The resulting full-scale range is given by
VOUT FS =( 1 + R1 ) VREF IN = G.VREF IN
R2
The impedance at the inverting input is R1//R2 and for
low drift with temperature this parallel combination should be
equal to the ladder resistance (10kΩ). The required nominal
values of R1 and R2 are given by
R1 = 10GkΩ and R2 = 10G/(G-1)kΩ.
Using these relationships a table of nominal resistance
values for R1 and R2 can be constructed for VREF IN = 2.5V.
Output Range
G
R1
R2
+5V
2
20kΩ
20kΩ
+10V
4
40kΩ
13.33kΩ
For gain setting R1 is adjusted about its nominal value.
Practical circuit realisations (including amplifier stabilising
components) for +5 and +10V output ranges are given in
Fig.5. Settling time for a major transition is 2.5µs typical.
Fig.4 Unipolar operation - basic circuit
ZN429
Fig.5 Unipolar operation - component values
UNIPOLAR ADJUSTMENT PROCEDURE
(i) Set all bits to OFF (LOW) and adjust zero until VOUT =
0.0000V.
(ii) Set all bits ON (HIGH) and adjust gain until VOUT =
FS - 1LSB.
UNIPOLAR SETTING UP POINTS
Output Range, +FS
LSB
FS - 1LSB
+5V
19.5 mV
4.9805V
+10V
39.1mV
9.9609V
1LSB = FS
256
UNIPOLAR LOGIC CODING
Input Code
(Binary)
Analog Output
(Nominal Value)
11111111
11111110
11000000
10000001
10000000
01111111
01000000
00000001
00000000
FS - 1LSB
FS - 2 LSB
3/ FS
4
1
/2 FS + 1LSB
1
/2 FS
1/ FS - 1LSB
2
1/ FS
4
1LSB
0
(2) Bipolar D-A Converter
For bipolar operation the output from the ZN429 is offset
by half full-scale by connecting a resistor R3 between VREF
IN and the inverting input of the buffer amplifier (Fig.6).
When the digital input of the ZN429 is zero the analog
output is zero and the amplifier output should be -full-scale.
An input of all ones to the D-A will give a ZN429 output of d
VREF IN and the amplifier output required is +full-scale. Also,
to match the ladder resistance the parallel combination of
R1, R2 and R3 should be 10kΩ.
The nominal values of R1, R2 and R3 which meet these
conditions are given by
R1 = 20GkΩ, R2 = 20G/(G-1)kΩ and R3 = 20kΩ.
where the resultant output range is ±G.VREF IN.
Assuming that VREF IN = 2.5V the nominal values of
resistors for ±5 and ±10V output ranges are given in the
following table:
Output Range
G
R1
R2
R3
±5V
2
40kΩ
40kΩ
20kΩ
±10V
4
80kΩ
26.67kΩ
20kΩ
Minus full scale (0FFSET) is set by adjusting R1 about
its nominal value relative to R3. Plus full-scale (GAIN) is set
by adjusting R2 relative to R1.
Settling time for a major transistion is 2.5µs typical.
ZN429
Fig.6 Bipolar operation - basic circuit
BIPOLAR ADJUSTMENT PROCEDURE
BIPOLAR LOGIC CODING
(i) Set all bits to OFF (LOW) and adjust OFFSETuntil the
amplifier output reads -FULL-SCALE.
(ii) Set all bits ON (HIGH) and adjust gain until the
amplifier reads +(FULL-SCALE - 1LSB).
BIPOLAR SETTING UP POINTS
Input Range,
± FS
LSB
-FS
+(FS 1LSB)
±5V
39.1 mV
-5.0000V
+4.9609V
±10V
78.1mV
-10.0000V
9.9219V
Input Code
(Offset Binary)
Analog Output
(Nominal Value)
11111111
11111110
11000000
10000001
10000000
01111111
01000000
00000001
00000000
+(FS - 1LSB)
+(FS - 2 LSB)
+1/2 FS
+ 1LSB
0
-1 LSB
-1/2 FS
-(FS - 1LSB)
-FS
1LSB = 2FS
256
Fig.7 Bipolar operation - component values
ZN429
HEADQUARTERS OPERATIONS
GEC PLESSEY SEMICONDUCTORS
Cheney Manor, Swindon,
Wiltshire, United Kingdom. SN2 2QW
Tel: (01793) 518000
Fax: (01793) 518411
GEC PLESSEY SEMICONDUCTORS
P.O. Box 660017,
1500 Green Hills Road,
Scotts Valley, California 95067-0017,
United States of America.
Tel (408) 438 2900
Fax: (408) 438 5576
CUSTOMER SERVICE CENTRES
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© GEC Plessey Semiconductors 1994 Publication No. DS3008 Issue No. 2.0 May 1994
TECHNICAL DOCUMENTATION - NOT FOR RESALE. PRINTED IN UNITED KINGDOM
This publication is issued to provide information only which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be
regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. The