ICS ICS627R-01

PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Description
Features
The ICS627-01 is a low cost, low jitter, high
performance clock synthesizer which can generate
frequencies required for HDTV receivers and settop boxes. Using ICS’s patented analog/digital
Phase-Locked Loop (PLL) techniques, the device
uses an inexpensive fundamental 27 MHz crystal
input to produce low jitter HDTV pixel clocks. It
has a separate input for a 1001/1000 or
2(1001/1000) conversion from a 13.5 MHz,
27 MHz or 54 MHz input.
• Packaged in 28 pin SSOP (QSOP)
• HDTV frequencies of 74.25 and 74.175824 MHz
• Provides selectable B clock for 27.027 MHz or
other 1001/1000
• Uses a fundamental 27 MHz crystal or clock input
• All frequencies are generated exactly (zero ppm
synthesis error)
• Full CMOS output swings with 12 mA output
drive capability at TTL levels
• Advanced, low power, sub-micron CMOS process
• 3.3 V ±5% operating supply
Block Diagram
VDD
CLKIN
x1001/1000
PLL
SB
SA2:0
GND
6
PLL
Clock
Synthesis
Circuitry
Output
Buffer
CLKB
Output
Buffer
CLKA
Output
Buffer
CLKC
(54 MHz)
Output
Buffer
CLKC/2
(27 MHz)
Output
Buffer
REFOUT
(27 MHz)
÷2
X1/ICLK
27.0 MHz
crystal or
X2
clock
input
MDS 627-01 B
Crystal
Oscillator
1
Revision 051600
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Pin Assignment
SA2
X2
X1
VDD
VDD
CLKIN
VDD
VDD
VDD
GND
GND
CLKC/2
CLKC
CLKB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CLKA/CLKC Select Table (MHz)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
SA2
SA0
SA0
REFOUT
GND
CLKA
VDD
GND
GND
GND
GND
SB
SA1
SA1
SA2 SA1 SA0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Input
27.0
27.0
27.0
27.0
TEST
27.0
TEST
27.0
CLKA
108.0
74.175824*
54.0
74.25*
CLKC
54.0
TEST
54.0
54.0
CLKC/2
27.0
TEST
27.0
27.0
74.175824
54.0
27.0
74.250
54.0
27.0
* These selections are recommended for the lowest jitter
CLKB Select Table (MHz)
SB
0
1
CLKIN
13.5
27 - 54
CLKB
27.027
27.027 - 54.054
Multiplier
2002/1000
1001/1000
0 = connect directly to GND
1 = connect directl to VDD
Pin Descriptions
Number
Name
1, 28
SA2
2
X2
3
X1/ICLK
4, 5, 7-9, 22
VDD
6
CLKIN
10, 11, 18, 19
GND
12
CLKC/2
13
CLKC
14
CLKB
15, 16
SA1
17
SB
20, 21, 24
GND
23
CLKA
25
REFOUT
26, 27
SA0
Type
I
XO
XI
P
CI
P
O
O
O
I
I
P
O
O
I
Description
Pins 1, 28 should be connected together. Selects CLKA and CLKC frequencies. Internal p-u.
Connect to a fundamental 27.0 MHz crystal or leave unconnected for clock.
Connect to a fundamental 27.0 MHz crystal or clock input.
Connect to 3.3V.
Clock input to produce 1001/1000 or 2(1001/1000) at CLKB. See table above.
Connect to ground.
C Clock output divided-by-2. See table above.
C Clock output. See above table.
B Clock output. See above table.
Pins 15, 16 should be connected together. Selects CLKA and CLKC frequencies. Internal p-u.
B Clock Select. Selects CLKB frequency. See above table. Internal pull-up.
Connect to ground.
A Clock output. See above table.
27 MHz Reference Output.
Pins 26, 27 should be connected together. Selects CLKA and CLKC frequencies. Internal p-u.
Key: I = Input; O = output; P = power supply connection; XI, XO = crystal connections; CI = clock input
MDS 627-01 B
2
Revision 051600
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
7
VDD+0.5
70
260
150
V
V
°C
°C
°C
3.45
V
V
V
V
V
V
V
V
mA
mA
pF
ppm
ABSOLUTE MAXIMUM RATINGS (n
note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
Referenced to GND
Referenced to GND
-0.5
0
Max of 10 seconds
-65
DC CHARACTERISTICS (VDD = 3.3V
V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, VIH, ICLK and CLKIN
Input Low Voltage, VIL, ICLK and CLKIN
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, CMOS level
Operating Supply Current, IDD
Short Circuit Current
Input Capacitance
Frequency synthesis error
3.15
2
3.30
0.8
(VDD/2)+1
IOH=-12mA
IOL=12mA
IOH=-8mA
No Load, note 2
Each output
VDD/2
VDD/2
(VDD/2)-1
2.4
0.4
VDD-0.4
TBD
±50
7
All clocks
0
AC CHARACTERISTICS (VDD = 3.3V
V unless noted)
Input Frequency
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Notes:
27.0
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
1.5
1.5
60
40
TBD
MHz
ns
ns
%
ps
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged
exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With all clocks at highest MHz.
External Components
The ICS627-01 requires a minimum number of external components for proper operation. Use a low
inductance ground plane, connect all GNDs to this. Connect 0.01µF decoupling caps across pins 5 and 10, 8
and 10, and 22 and 20, as close to the ICS627-01 as possible. A series termination resistor of 33 Ω may be
used for each clock output. The 27.000 MHz crystal must be connected as close to the chip as possible. The
crystal should be a fundamental mode, parallel resonant. Crystal capacitors should be connected from pins X1
to ground and X2 to ground. The value of these capacitors is given by the following equation, where CL is the
crystal load capacitance: Crystal caps (pF) = (CL-6) x 2. So for a crystal with 16pF load capacitance, two 20pF
caps should be used. If a clock input is used, drive it into X1 and leave X2 unconnected.
MDS 627-01 B
3
Revision 051600
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
PRELIMINARY INFORMATION
ICS627-01
HDTV Set-Top Clock Source
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC Publication No. 95.)
28 pin SSOP
E1
INDEX
AREA
1
Symbol
A
A1
b
c
D
e
E
E1
L
E
2
D
e
Millim
meters
Min
Max
1.35
1.75
0.10
0.25
0.20
0.30
0.19
0.25
9.80
10.01
0.635 BSC
5.79
6.20
3.81
3.99
0.41
1.27
A
c
A1
Inchees
Min
Max
0.053 0.069
0.004 0.010
0.008 0.012
0.007 0.010
0.386 0.394
.025 BSSC
0.228 0.244
0.150 0.157
0.016 0.050
b
L
Ordering Information
Part/Order Number
ICS627R-01
ICS627R-01T
Marking
ICS627R-01
ICS627R-01
Shipping packaging
tubes
tape and reel
Package
Temperature
28 pin SSOP (QSOP)
0-70 °C
28 pin SSOP (QSOP)
0-70 °C
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in
normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements
are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any
ICS product for use in life support devices or critical medical instruments.
MDS 627-01 B
4
Revision 051600
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com