INTEGRAL IN74HCT14AD

IN74HCT14A
HEX SCHMITT-TRIGGER INVERTER
High-Performance Silicon-Gate CMOS
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The IN74HCT14A may be used as a level converter for
interfacing TTL or NMOS outputs to high-speed CMOS inputs.
The IN74HCT14A is identical in pinout to the LS/ALS14.
The IN74HCT14A is useful to “square up” slow input rise and
fall times. Due to the hysteresis voltage of the Schmitt trigger, the
IN74HCT14A finds applications in noisy environments.
TTL/NMOS-Compatible Input Levels.
Outputs Directly Inferface to CMOS, NMOS and TTL.
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 µA
ORDERING INFORMATION
IN74HCT14AN Plastic
IN74HCT14AD SOIC
TA = -55° to 125° C for all
packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Output
A
Y
L
H
H
L
PIN 14 =VCC
PIN 7 = GND
1
IN74HCT14A
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
mA
±20
IOUT
DC Output Current, per Pin
mA
±25
ICC
DC Supply Current, VCC and GND Pins
mA
±50
PD
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Tstg
Storage Temperature
-65 to +150
°C
260
TL
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
DC Supply Voltage (Referenced to GND)
VIN, VOUT DC Input Voltage, Output Voltage (Referenced to
GND)
TA
Operating Temperature, All Package Types
t r, tf
Input Rise and Fall Time (Figure 1)
*
Min
4.5
0
Max
5.5
VCC
Unit
V
V
-55
0
+125
No
Limit*
°C
ns
When VIN ≈ 50% VCC ,ICC>1.0 mA.
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and
VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
2
IN74HCT14A
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Guaranteed Limit
VCC
Symbol
Parameter
Test Conditions
V
25
≤85 ≤125
°C to °C
°C
55°C
VT+max Maximum Positive- VOUT=0.1
V 4.5
1.9
1.9
1.9
Going
Input IOUT ≤ 20 µA
5.5
2.1
2.1
2.1
Threshold Voltage
VT+min Minimum Positive- VOUT=0.1
V 4.5
1.2
1.2
1.2
Going
Input IOUT ≤ 20 µA
5.5
1.4
1.4
1.4
Threshold Voltage
VOUT=VCC
VT-max Maximum
-0.1
V 4.5
1.2
1.2
1.2
Negative-Going
5.5
1.4
1.4
1.4
IOUT≤ 20 µA
Input
Threshold
Voltage
VT-min
Minimum Negative- VOUT=VCC-0.1
V 4.5
0.5
0.5
0.5
Going
Input IOUT≤ 20 µA
5.5
0.6
0.6
0.6
Threshold Voltage
1.4
1.4
1.4
VHmax
Maximum
VOUT=0.1 V or VCC- 4.5
5.5
1.5
1.5
1.5
Note 1
Hysteresis Voltage 0.1V
IOUT≤ 20 µA
0.4
0.4
0.4
VHmin
Minimum
VOUT=0.1 V or VCC- 4.5
5.5
0.4
0.4
0.4
Note 1
Hysteresis Voltage 0.1V
IOUT≤ 20 µA
4.4
4.4
4.4
VOH
Minimum
High- VIN≤VT
-min 4.5
5.5
5.4
5.4
5.4
Level
Output IOUT ≤ 20 µA
Voltage
VIN≤VT
-min
4.5
3.98 3.84
3.7
IOUT≤4mA
VOL
Maximum
Low- VIN≥VT
0.1
0.1
0.1
+max 4.5
Level
Output IOUT ≤ 20 µA
5.5
0.1
0.1
0.1
Voltage
VIN≥VT
+max
4.5
0.26 0.33
0.4
IOUT≤ 4mA
IIN
Maximum
Input VIN=VCC or GND
5.5
±0.1 ±1.0 ±1.0
Leakage Current
VIN=VCC
ICC
Maximum
or
GND 5.5
1.0
10
40
Quiescent Supply IOUT=0µA
Current
(per Package)
VIN=2.4 V, Any One
Additional
≥-55° C
25°C to
∆ICC
Quiescent Supply Input
125 °C
Current
2.9
2.4
VIN=VCC
or
GND, 5.5
Other
Inputs
IOUT=0 µA
Note: 1 VHmin>(VT+min)-(VT-max); VHmax=(VT+max)-(VT-min)
3
Unit
V
V
V
V
V
V
V
V
µA
µA
mA
IN74HCT14A
AC ELECTRICAL CHARACTERISTICS(VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Temperature Limits
Symbol
Parameter
Unit
25 °C to
≤85°C
≤125°C
-55°C
32
40
48
ns
tPLH,
Maximum Propagation Delay,
tPHL
Input A or B to Output Y (L to H)
(Figures 1 and 2)
15
19
22
ns
tTLH, tTHL Maximum Output Transition
Time, Any Output (Figures 1
and 2)
CIN
Maximum Input Capacitance
10
10
10
pF
CPD
Power Dissipation Capacitance
(Per Inverter)
Used to determine the no-load
dynamic power consumption:
PD=CPDVCC2f+ICCVCC
Typical @25°C,VCC=5.0 V
32
Figure 1. Switching Waveforms
pF
Figure 2. Test Circuit
4