INTEGRAL IN74LV138

TECHNICAL DATA
IN74LV138
3-to-8 line decoder/demultiplexer;
inverting
The IN74LV138 is a low-voltage Si-gate CMOS device and is pin
and function compatible 74HCT138.
The74LV138 accepts three binary weighted address inputs (A 0,A 1,A 2) and when enabled,provide 8 - mutually exclusive active
LOW outputs (Y0 to Y7).
The “138” features three enable inputs: two active LOW (CS2,CS3
and one active HIGH (CS1).Every output will be HIGH untess CS2, and
CS3 are LOW and CS1 is HIGH.
•
•
•
•
•
•
Optimized for Low Voltage applications:1.2 to 3.6 V
Demultiplexing capability
Multiple input enabte for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Output capability: standard
N SUFFIX
PLASTIC
16
1
D SUFFIX
SOIC
16
1
ORDERING INFORMATION
IN74LV138N Plastic
IN74LV138D SOIC
TA = -40° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
PIN 16 =VCC
PIN 8 = GND
Outputs
CS1 CS2 CS3
A2 A1 A0
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7
X X H
X H X
L X X
X X X
X X X
X X X
H H H H H H H H
H H H H H H H H
H H H H H H H H
H
H
H
H
L
L
L
L
L
L
L
L
L L L
L L H
L H L
L H H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H L L
H L H
H H L
H H H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L H H H
H L H H
H H L H
H H H L
H
H
H
H
H
H
H
H
H
H
H
H
H = high level (steady state)
L = low level (steady state)
X = don’t care
INTEGRAL
1
IN74LV138
MAXIMUM RATINGS
Symbol
*
Parameter
Value
Conditions
Unit
VCC
DC supply voltage
IIK
DC input diode current
±20
VI< - 0.5 or VI> Vcc+0.5V
mA
IOK
DC output diode current
±50
VO< - 0.5 or VO> Vcc+0.5V
mA
IO
DC output source or sink current
±25
-0.5Â<Vo<Vcc+0.5B
mA
ICC
DC VCC or GND current for types with
standard outputs
±50
mA
-65 to +150
°C
Tstg
-0.5 to +7.0
Storage Temperature
PD
Power Dissipation per package
Plastic DIP+
SOIC Package+
TL
V
mW
750
500
Lead temperature, 1.5 mm from Case for 4
seconds
(Plastic DIP ), 0.3 mm (SOIC Package)
°C
260
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C
SOIC Package: : - 8 mW/°C from 70° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC supply voltage
1.0
5.5
V
VIN,
DC input voltage,
0
VCC
V
VO
DC output voltage
0
VCC
V
TA
Operating ambient temperature range in free air
-40
+125
°C
tr, t f
Input rise and fall times except for
Schmitt-trigger inputs
0
0
0
500
200
100
50
ns/B
Vcc= 1.0 ? 2.0Â
Vcc= 2.0 ? 2.7Â
Vcc= 2.7 ? 3.6Â
Vcc= 3.6 ? 5.5Â
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
INTEGRAL
2
IN74LV138
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test
Conditions
Guaranteed Limit
VCC,
Â
25°C
îò -40°C to
85°C
Unit
îò -40°C to
125°C
min
max
min
max
min
max
VIH
High-level input
voltage
1.2
2.0
2.7 to 3.6
4.5 to 5.5
0.9
1.4
2.0
0.7 Vcc
-
0.9
1.4
2.0
0.7 Vcc
-
0.9
1.4
2.0
0.7 Vcc
-
Â
VIL
Low -level input
voltage
1.2
2.0
2.7 to 3.6
4.5 to 5.5
-
0.3
0.6
0.8
0.3 Vcc
-
0.3
0.6
0.8
0.3 Vcc
-
0.3
0.6
0.8
0.3 Vcc
Â
VOH
High-level
output voltage
-I0=100µA
VIH or VIL
1.2
2.0
2.7
3.0
3.6
4.5
5.5
1.85
2.55
2.85
3.45
4.35
5.35
-
1.8
2.5
2.8
3.4
4.3
5.3
-
1.8
2.5
2.8
3.4
4.3
5.3
-
Â
VIH or VIL
-IO=6.0 mA
-IO=12.0 mA
3.0
4.5
2.48
3.70
-
2.40
3.60
-
2.20
3.50
-
B
1.2
2.0
3.0
-
0.15
0.15
0.15
-
0.2
0.2
0.2
-
0.2
0.2
0.2
B
VIH or VIL
IO=6.0 mA
IO=12.0 mA
3.0
4.5
-
0.33
0.40
-
0.40
0.55
-
0.50
0.65
B
VOL
Low-level output VIH or VIL
voltage
I0=100µA
II
Input leakage
current
VCC or GND
5.5
-
±0.1
-
±1.0
-
±1.0
ìêÀ
ICC
Quiescent
supply current
VCC or GND
IO=0
5.5
-
8.0
-
80
-
160
ìêÀ
INTEGRAL
3
IN74LV138
AC ELECTRICAL CHARACTERISTICS (CL=50 pF, tLH = tHL = 2.5 nc, VIL=0B, VIH=VCC)
Symbol
Parameter
VCC
Guaranteed Limit
V
1.2
2.0
2.7
3.0
4.5
1.2
2.0
2.7
3.0
4.5
tPLH, t PHL
Propagation delay,
input A to output Y
(Figures 1)
tPLH, t PHL
Propagation delay ,
CS1 to
output Y
(Figures 2)
tPLH, t PHL
Output transition
time, CS2 or CS3 to
output Y (Figures 3)
CIN
25°C
max
min
max
min
max
-
150
33
23
19
14
170
35
26
21
17
170
35
26
21
17
7.0
-
150
36
26
21
16
170
39
29
23
19
170
39
29
23
19
-
180
44
33
26
20
200
49
36
29
24
200
49
36
29
24
-
-
-
-
90
50%
tPLH
tPHL
OUTPUT
Y
Figure 1. Switching Waveforms
INTEGRAL
pF
Vcc
90%
50%
10%
INPUT
CS1
GND
50%
ns
tf
tr
Vcc
-
ns
Typical @25°C,VCC=5.5 V
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC2f+ICCVCC
INPUT
A
-
ns
pF
Power dissipation capacitance (per enabled
output)
CPD
îò -40°C to
125°C
min
5.0
Ò=+25 îÑ
Input capacitance
îò -40°C to
85°C
Unit
tPHL
OUTPUT
Y
GND
tPLH
90%
50%
10%
Figure 2. Switching Waveforms
4
IN74LV138
tr
INPUT
CS2,CS3
tPHL
OUTPUT
Y
TEST POINT
Vcc
90%
50%
10%
GND
tPLH
DEVICE
UNDER
TEST
OUTPUT
*
C
L
90%
50%
10%
* Includes all prode and jig capacitance
Figure 3. Switching Waveforms
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
INTEGRAL
5
IN74LV138
INTEGRAL
6
IN74LV138
CHIP PAD DIAGRAM
1.4+-0.03
Chip marking LV138
14
13
12
11
10
16
09
01
08
Y
1.33+-0.03
15
07
02
(0,0)
04
03
05
06
X
Location of marking (mm): left lower corner x = 0.950, y = 1.175;
Thickness of chip:0.46 ± 0.02 mm
PAD LOCATION
Pad
Pad Name
X
No.
01
AO
0.118
02
A1
0.118
03
A2
0.395
04
CS2
0.709
05
CS3
0.877
06
CS1
1.191
07
Y7
1.191
08
GND
1.191
09
Y6
1.191
10
Y5
1.084
11
Y4
0.798
12
Y3
0.640
13
Y2
0472
14
Y1
0.314
15
Y0
0.131
16
Vcc
0.118
∗ Note: Pad location is given as per passivation layer
INTEGRAL
Y
Pad size (mm)
0.429
0.115
0.115
0.115
0.115
0.115
0.283
0.441
0.599
1.111
1.111
1.111
1.111
1.111
1.111
0.597
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
0.100 x 0.100
7
IN74LV138
INTEGRAL
8