INTEGRAL IW4093B

TECHNICAL DATA
IW4093B
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
The IW4093B consists of four Schmitt-trigger circuits. Each circuit
functions as a two-input NAND gate with Schmitt-trigger action on
both inputs. The gate switches at different points for positive- and
negative- going signals. The difference between the positive voltage
(VP) and the negative voltage (VN) is defined as hysteresis voltage (VH)
(see Fig.1).
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
IW4093BN Plastic
IW4093BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
PIN 14 =VCC
PIN 7 = GND
142
Output
A
B
Y
L
L
H
L
H
H
H
L
H
H
H
L
IW4093B
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
-0.5 to +20
V
VCC
DC Supply Voltage (Referenced to GND)
VIN
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
IIN
DC Input Current, per Pin
±10
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
PD
Power Dissipation per Output Transistor
100
mW
-65 to +150
°C
260
°C
Tstg
TL
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
VIN, VOUT
TA
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
Max
Unit
3.0
18
V
0
VCC
V
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range
GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC).
Unused outputs must be left open.
143
IW4093B
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC
Symbol
VT+min
VT+max
VT-min
VT-max
VHmin
Note
VHmax
Note
IIN
144
Parameter
Minimum PositiveGoing Input
Threshold Voltage
Maximum PositiveGoing Input
Threshold Voltage
Minimum NegativeGoing Input
Threshold Voltage
Maximum NegativeGoing Input
Threshold Voltage
Minimum Hysteresis
Voltage
Maximum Hysteresis
Voltage
Maximum Input
Leakage Current
Guaranteed Limit
V
≥-55°C
25°C
≤125
°C
Unit
Input on terminals A or B;
other inputs to VCC
5.0
10
15
2.2
4.6
6.8
2.2
4.6
6.8
2.2
4.6
6.8
V
Input on terminals A and B;
other inputs to VCC
5.0
10
15
2.6
5.6
6.3
2.6
5.6
6.3
2.6
5.6
6.3
Input on terminals A or B;
other inputs to VCC
5.0
10
15
3.6
7.1
10.8
3.6
7.1
10.8
3.6
7.1
10.8
Input on terminals A and B;
other inputs to VCC
5.0
10
15
4
8.2
12.7
4
8.2
12.7
4
8.2
12.7
Input on terminals A or B;
other inputs to VCC
5.0
10
15
0.9
2.5
4
0.9
2.5
4
0.9
2.5
4
Input on terminals A and B;
other inputs to VCC
5.0
10
15
1.4
3.4
4.8
1.4
3.4
4.8
1.4
3.4
4.8
Input on terminals A or B;
other inputs to VCC
5.0
10
15
2.8
5.2
7.4
2.8
5.2
7.4
2.8
5.2
7.4
Input on terminals A and B;
other inputs to VCC
5.0
10
15
3.2
6.6
9.6
3.2
6.6
9.6
3.2
6.6
9.6
Input on terminals A or B;
other inputs to VCC
5.0
10
15
0.3
1.2
1.6
0.3
1.2
1.6
0.3
1.2
1.6
Input on terminals A and B;
other inputs to VCC
5.0
10
15
0.3
1.2
1.6
0.3
1.2
1.6
0.3
1.2
1.6
Input on terminals A or B;
other inputs to VCC
5.0
10
15
1.6
3.4
5
1.6
3.4
5
1.6
3.4
5
Input on terminals A and B;
other inputs to VCC
5.0
10
15
1.6
3.4
5
1.6
3.4
5
1.6
3.4
5
VIN= GND or VCC
18
±0.1
±0.1
±1.0
Test Conditions
V
V
V
V
V
µA
IW4093B
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND) - continued
Guaranteed Limit
VCC
Symbol
Parameter
Test Conditions
≥-55°C
25°C
≤125
°C
Unit
5.0
10
15
20
1
2
4
20
1
2
4
20
30
60
120
600
µA
ICC
Maximum Quiescent
Supply Current
(per Package)
IOL
Minimum Output Low VIN= GND or VCC
(Sink) Current
UOL=0.4 V
UOL=0.5 V
UOL=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
Minimum Output
VIN= GND or VCC
High (Source) Current UOH=2.5 V
UOH=4.6 V
UOH=9.5 V
UOH=13.5 V
5.0
5.0
10
15
-2.0
-0.64
-1.6
-4.2
-1.6
-0.51
-1.3
-3.4
-1.15
-0.36
-0.9
-2.4
IOH
VIN= GND or VCC
V
mA
mA
VOH
Minimum High-Level
Output Voltage
VIN=GND or VCC
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
4.95
9.95
14.95
V
VOL
Maximum Low-Level
Output Voltage
VIN= VCC
5.0
10
15
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
0.05
V
Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min).
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
≥-55°C
25°C
≤125°C
Unit
tPLH, tPHL
Maximum Propagation Delay, Input A or B to
Output Y (Figure 2)
5.0
10
15
380
180
130
380
180
130
760
360
260
ns
tTLH, tTHL
Maximum Output Transition Time, Any Output
(Figure 2)
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
CIN
Maximum Input Capacitance
-
7.5
pF
145
IW4093B
a) Definition of VT+, VT-, VH
c) Test setup
b) Transfer characteristic of 1 of 4 gates
Figure 1. Hysteresis definition, characteristic, and test setup
Figure 2. Switching Waveforms
EXPANDED LOGIC DIAGRAM
(1/4 of the Device)
146