MAXWELL 7672RPFI-05

7672
12-Bit A/D Converter
VREF
AIN1
AIN2
2
1
24
+
-
12-BIT DAC
+
-
SUCCESSIVE APPROXIMATION
REGISTER
12-BIT LATCH
CONTROL
LOGIC
THREE-STATE
OUTPUT DRIVERS
CLOCK
OSCILLATOR
3
4
11
12
13
16
AGND
D11
D4
DGND
D3
D0
23
VDD
22
VSS
21
BUSY
20
CS
19
RD
18
CLK OUT
17
CLK IN
Logic Diagram
• 12-bit high speed A/D converter
• RAD-PAK® radiation-hardened against natural space radiation
• Total dose hardness:
- > 100 krad (Si), depending upon space mission
• Excellent Single Event Effect
- SEL > 120 Mev/mg/cm2
- SEUTH > 5.8 Mev/mg/cm2
- SEUSat = -1E-4 cm2/Device
• Package:
- 24 pin RAD-PAK® flat package
- 24 pin RAD-PAK® DIP
• Fast conversion times:
- 7672-05: 5 µs
• Low 110 mW typical power consumption
- Corrects all single-bit errors
- Detects all double and some triple-bit errors
• High-speed BiCMOS technology
- Choice of +5V and +10V input ranges
- Operates with +5V and -12V power supplies
- Fast 125 ns bus-access time
(Si) total dose tolerance, depending upon space mission. The
7672 uses an accurate high-speed DAC and comparator to
achieve conversion time as low as 5 µs while dissipating only
110 mW of power. The 7672 is designed to be used with an
external reference voltage. This allows the user to choose a
reference whose performance suits the application or to drive
multiple 7672s from a single system reference, since the reference input is buffered and draws very little current. For digital
signal processing applications where absolute accuracy and
temperature coefficients may be unimportant, a low cost reference can be used. For optimal precision, a high accuracy reference where an absolute 12-bit accuracy can be obtained
over a wide temperature range may be used. Analog input
range is pin-selectable for 0 to +5V, 0 to +10V, or ±5V, making
the ADC ideal for data acquisition and analog input/output
cards. A high-speed digital interface (125 ns data access time)
with three state data outputs is compatible with most microprocessors.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing
the required radiation shielding for a lifetime in orbit or space
mission. In a GEO orbit, RAD-PAK provides greater than 100
krad (Si) radiation dose tolerance. This product is available
with screening up to Class S.
DESCRIPTION:
Maxwell Technologies’ 7672 high-speed 12-bit analog-todigital converter microcircuit features a greater than 100 krad
08.09.02 Rev 13
(858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com
All data sheets are subject to change without notice
1
©2002 Maxwell Technologies
All rights reserved.
Memory
FEATURES:
7672
12-Bit A/D Converter
TABLE 1. 7672 PINOUT DESCRIPTION
PIN
SYMBOL
DESCRIPTION
1
AIN1
Analog Input
2
VREF
Voltage-Reference Input
3
AGND
Analog Ground
4-11
D11-D4
Three-State Data Outputs
12
DGND
Digital Ground
13-16
D3-D0
Three-State Data Outputs
17
CLKIN
Clock Input
18
CLKOUT
Clock Output
19
RD
READ Input
20
CS
CHIP SELECT
21
BUSY
22
VSS
Negative Supply, -12V
23
VDD
Positive Supply, +5V
24
AIN2
Analog Input
BUSY
Memory
TABLE 2. 7672 ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
MAX
UNITS
Positive Supply Voltage to DGND
VDD
-0.3
7.0
V
Negative Supply Voltage to DGND
VSS
-17
+0.3c
V
AGND to DGND
--
-0.3
VDD +0.3
V
AIN1, AIN2 to AGND
--
-15
+15
V
Digital Input Voltage to DGND
VIN
-0.3
VDD +0.3
V
VOUT
-0.3
VDD +0.3
V
VREF to AGND
--
VSS -0.3
VDD +0.3
V
Power Dissipation to +75°C
PD
--
1000
mW
Power Dissipation above 75°C (Derate)
--
--
10
mW/°C
Thermal Impedance
ΘJC
--
3.24
°C/W
Storage Temperature Range
TSTG
-65
+150
°C
TA
-55
+125
°C
Digital Output Voltage to DGND
Operating Temperature Range
08.09.02 REV 13
All data sheets are subject to change without notice
2
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
TABLE 3. 7672 RECOMMENDED OPERATING CONDITIONS
PARAMETER
SUBGROUPS
SYMBOL
MIN
MAX
UNITS
Positive Supply Voltage
1
VDD
4.75
5.25
V
Negative Supply Voltage
1
VSS
-13.2
-10.8
V
VREF Input Range
1
VREF
-5.05
-4.95
V
Power Dissipation VDD = 5V, VSS = -12V
1
PD
--
179
mW
TABLE 4. 7672 DC ELECTRICAL CHARACTERISTICS
(VDD = 5V ±5%, VSS = -12V ±10%, VREF = -5V, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
TEST CONDITION
SUBGROUPS
MIN
MAX
UNITS
VIL
1, 2, 3
--
0.8
V
Input High Voltage
VIH
1, 2, 3
2.4
--
V
Output Low Voltage
VOL
ISINK = 1.6 mA
1, 2, 3
--
0.4
V
Output High Voltage
VOH
ISOURCE = -200 µA
1, 2, 3
4.0
--
V
Input Leakage Current
IIN
(CS,RD) VIN = VDD or GND
(CLKIN) VIN = VDD or GND
1, 2, 3
---
±10
±20
µA
Output Leakage Current
ILKG
(D0-D11) VOUT = VDD or GND
1, 2, 3
--
±10
µA
Input Capacitance 1
CIN
--
10
pF
COUT
--
15
pF
1, 2, 3
---
7
-12
mA
Floating State Output
Capacitance2
Power Supply Current
IDD
ISS
Power Supply Rejection, VDD
PSRR (VDD) VDD = 4.75 to 5.25 volts
VSS = -12V
1, 2, 3
--
±1
LSB
Power Supply Rejection, VSS
PSRR (VSS) VSS = -10.8 to -13.2 volts
VDD = 5V
1, 2, 3
--
±1
LSB
1, 2, 3
---
±3.5
±1.75
mA
Analog Input Current (AIN1 or AIN2)
IAIN
VREF Input Range 1
VREF
1, 2, 3
-5.05
-4.95
V
VREF Input Current
IREF
1, 2, 3
--
±3
µA
Resolution
RES
TA = -55 to +125°C
1, 2, 3
12
--
bits
Integral Nonlinearity
INL
TA = +25 °C
TA = -55 to +125°C
1
2, 3
---
±1
±1
LSB
Differential Nonlinearity
DNL
12 bits, no missing codes
TA = -55 to +125°C
1, 2, 3
--
±0.9
LSB
Unipolar Offset Error
UOE
TA = +25°C
TA = -55 to +125°C
1
2, 3
---
±5
±6
LSB
Unipolar Gain Error
UGE
TA = +25 °C
TA = -55 to +125°C
1
2, 3
---
±5
±7
LSB
Unipolar Range: 0 to 5 V, 10V
Bipolar Range: ±5V
08.09.02 REV 13
All data sheets are subject to change without notice
Memory
Input Low Voltage
3
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
TABLE 4. 7672 DC ELECTRICAL CHARACTERISTICS
(VDD = 5V ±5%, VSS = -12V ±10%, VREF = -5V, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
SYMBOL
TEST CONDITION
SUBGROUPS
MIN
MAX
UNITS
Bipolar Zero Error
BZE
TA = +25°C
TA = -55 to +125°C
1
2, 3
---
±5
±6
LSB
Bipolar Gain Error
BGE
TA = +25°C
TA = -55 to +125°C
1
2, 3
---
±5
±7
LSB
1. Guaranteed by design.
TABLE 5. 7672 TIMING CHARACTERISTICS 1,2
(VDD = 5V ±5%, VSS = -12V ±10%, VREF = -5V, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED)
PARAMETER
TEST CONDITION
SYMBOL
MIN
MAX
UNITS
Conversion Time, Synchronous Clk, 3
12.5 clks, TA = -55 to +125 °C
9, 10, 11
tCONV
--
5.0
us
Conversion Time, Asynchronous Clk,
12-13 clks, TA = -55 to +125 °C
9, 10, 11
tCONV
4.8
5.2
us
CS to RD Setup Time
TA = -55 to +125 °C
9, 10, 11
t1
0
--
ns
RD to BUSY Delay
CL = 50 pF, TA = +25 °C
CL = 50 pF, TA = -55 to +125 °C
9
10, 11
t2
---
190
270
ns
Data Access Time 4
CL = 100 pF, TA = +25 °C
CL = 100 pF, TA = -55 to +125 °C
9
10, 11
t3
---
125
170
ns
RD Pulse Width
TA = -55 to +125 °C
9, 10, 11
t4
t3
--
ns
CS to RD Hold Time
TA = -55 to +125 °C
9, 10, 11
t5
0
--
ns
Data Setup Time After BUSY4
CL = 100 pF, TA = +25 °C
CL = 100 pF, TA = -55 to +125 °C
9
10, 11
t6
--
---
70
100
ns
Bus Relinguish Time5
(TA = +25 °C)
(-55 < TA < +125 °C)
9
10, 11
t7
---
75
90
ns
Delay Between Read Operations
(-55 < TA < +125 °C)
9, 10, 11
t8
200
--
ns
Memory
SUBGROUPS
1. 1LSB = FS/4096; TA = 25 °C; Performance over power supply tolerance is guaranteed by power supply rejection test.
2. All inputs are 0V to +5V swing with tr = tr = 5ns (10 to 90% of +5V) and timed from a voltage level of +1.6V.
3. Functionally tested.
4. t3 and t6 are measured with the load circuits of Figure 1 and are defined as the time required for an output to cross +0.8 or
+2.4.
5. t7 is defined as the time required for the data lines to change 0.5V when loaded with the circuit of Figure 2.
08.09.02 REV 13
All data sheets are subject to change without notice
4
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
FIGURE 1. LOAD CIRCUITS FOR ACCESS TIME
FIGURE 2. LOAD CIRCUIT FOR BUS RELINQUISH TIME
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
5
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
FIGURE 3.
FIGURE 4. ANALOG INPUT RANGE CONFIGURATIONS
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
6
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
FIGURE 5. UNIPOLAR OPERATING USING A REFERENCE
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
7
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
Memory
24 PIN RAD-PAK® DUAL IN LINE PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
--
0.167
0.200
b
0.014
0.018
0.026
b2
0.045
0.050
0.065
c
0.008
0.010
0.018
D
--
1.200
1.280
E
0.510
0.594
0.620
eA
0.600 BSC
eA/2
0.300 BSC
e
0.100 BSC
L
0.135
0.145
0.155
Q
0.015
0.030
0.045
S1
0.005
0.025
--
S2
0.005
--
--
N
24
D24-02
Note: All dimensions in inches
08.09.02 REV 13
All data sheets are subject to change without notice
8
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
Memory
24 PIN RAD-PAK® FLAT PACKAGE
DIMENSION
SYMBOL
MIN
NOM
MAX
A
0.153
0.170
0.183
b
0.015
0.017
0.022
c
0.004
0.005
0.009
D
--
0.596
0.640
E
0.350
0.400
0.420
E1
--
--
0.450
E2
0.180
0.236
--
E3
0.030
0.082
--
e
0.050 BSC
L
0.315
0.325
0.335
Q
0.026
0.050
0.056
S1
0.005
0.015
--
N
24
F24-01
Note: All dimensions in inches
08.09.02 REV 13
All data sheets are subject to change without notice
9
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
Important Notice:
These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies
functionality by testing key parameters either by 100% testing, sample testing or characterization.
The specifications presented within these data sheets represent the latest and most accurate information available to
date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no
responsibility for the use of this information.
Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems
without express written approval from Maxwell Technologies.
Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts.
Memory
08.09.02 REV 13
All data sheets are subject to change without notice
10
©2002 Maxwell Technologies
All rights reserved.
7672
12-Bit A/D Converter
Product Ordering Options
Model Number
7672
RP
F
X
-XX
Option Details
Feature
05 = 5 us
Screening Flow
Monolithic
S = Maxwell Class S
B = Maxwell Class B
I = Industrial (testing @ -55°C,
+25°C, +125°C)
E = Engineering (testing @ +25°C)
Package
D = Dual In-line Package (DIP)
F = Flat Pack
Radiation Feature
RP = RAD-PAK® package
Base Product
Nomenclature
12-Bit A/D Converter
08.09.02 REV 13
All data sheets are subject to change without notice
Memory
Access Time
11
©2002 Maxwell Technologies
All rights reserved.