7872 14-Bit A/D Converter FEATURES: DESCRIPTION: • 14-bit resolution and accuracy • Total dose hardness: - > 100 krad (Si), depending upon space mission • Single event effects: - SEL > 104 MeV/mg/cm2 - SEUTH = 1.4 MeV/mg/cm2 - SEUSat = 1E-3 cm2/Device • Package: - 16 pin RAD-PAK® flat package - 16 pin RAD-PAK® dual-in-line package • Fast Conversion Times: 10 µs • Low 50 mW typical power consumption • High speed LC2MOS technology - Analog input range of ±3V - 83 KSPS throughput rate - Operates with +5V/-5V power supplies - 80 dB SNR at 10 kHz input frequency - Serial output Maxwell Technologies’ 7872 high-speed 14-bit ADC microcircuit features a greater than 100 krad (Si) total dose tolerance; depending upon orbit. The 7872 consists of a track/hold amplifier, successive-approximation ADC, 3V buried Zener reference and versatile interface logic. It features a self-contained, laser- trimmed internal clock, so no external clock timing components are required. To achieve the minimum noise possible, the on-chip clock may be overridden to synchronize the device operation to the digital system. The 7872 is a serial output device. It is capable of interfacing to all modern microprocessors and digital signal processors. The 7872 operates from ±5V power supplies, accepts bipolar input signals of ±3V and is able to convert full power signals up to 41.5 kHz. It is also fully specified for dynamic performance parameters including distortion and signal-to-noise ratio. Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK® provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies’ self-defined Class S. 04.14.15 Rev 6 (858) 503-3300 - Fax: (858) 503-3301 - www.maxwell.com All data sheets are subject to change without notice 1 ©2015 Maxwell Technologies All rights reserved. Memory Logic Diagram 7872 14-Bit A/D Converter TABLE 1. 7872 PIN DESCRIPTION PIN SIGNAL DESCRIPTION 1 CONTROL 2 CONVST 3 CLK 4 SSTRB Serial Strobe 5 SCLK Serial Clock 6 SDATA Serial Data 7 NC Non Connect 8 DGND Digital Ground 9 VDD Positive Supply 10 NC No Connect 11 CREF Reference Capacitor 12 AGND Analog Ground 13 REFOUT Voltage Reference Output 14 VIN Analog Input 15 VSS Negative Supply 16 VDD Positive Supply Control Function Convert Start Clock Input Memory TABLE 2. 7872 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNIT Positive Supply Voltage; Relative to GND VDD -0.3 7.0 V Negative Supply Voltage; Relative to GND VSS +0.3 -7.0 V AGND to DGND; Relative to GND -- -0.3 VDD +0.3 V REFOUT, CREF to AGND -- 0 VDD V VIN to AGND -- VSS -0.3 VDD +0.3 V Digital Input Voltage VIN -0.3 VDD +0.3 V VOUT -0.3 VDD +0.3 V -- 2.0 Grams JC -- 2.44 °C/W Storage Temperature Range TS -65 150 °C Operating Temperature Range TA -55 125 °C Digital Output Voltage Weight Thermal Impedance 04.14.15 Rev 6 All data sheets are subject to change without notice 2 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter TABLE 3. DELTA LIMITS PARAMETER VARIATION IDD +10% ISS +10% 1. Parameters are measured and recorded as Deltas per MIL-STD-883 for Class S Devices, specified in Table 10. TABLE 4. 7872 DC ELECTRICAL CHARACTERISTICS FOR DYNAMIC PERFORMANCE 1 (VDD = 5 V ± 5%, VSS = -5 V ± 5%, AGND = DGND = 0 V, fCLK = 2 MHZ EXTERNAL, fSAMPLE = 83 KHZ, -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN TYP MAX UNIT Signal to Noise Ratio VIN = 10kHz Sine Wave, TMIN to TMAX; SNR is typically 82dB for VIN < 41.5kHz 2 SNR 4, 5, 6 79 -- -- dB Total Harmonic Distortion VIN = 10kHz Sine Wave THD 4, 5, 6 -- -86 -- dB -- 4, 5, 6 -- -86 -- dB IMD 4, 5, 6 -- -86 -- -- -86 -- -- -- 2 µs Peak Harmonic or Spurious Noise Track/Hold Acquisition Time -- 9, 10, 11 dB Memory Intermodulation Distortion Second Order Terms: fa = 9 kHz, fb = 9.5 kHz, fSAMPLE = 50 kHz Third Order Terms: fa = 9 kHz, fb = 9.5 kHz, fSAMPLE= 50 kHz 1. VIN = ± 3 V. Guaranteed by design. 2. SNR calculation includes distortion and noise components. TABLE 5. 7872 DC ELECTRICAL CHARACTERISTICS FOR ACCURACY (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN TYP MAX UNIT Resolution RES 7, 8A, 8B 14 -- -- Bits Resolution for Which No Missing Codes are Guaranteed NMC 7, 8A, 8B 14 -- -- Bits Integral Nonlinearity @ 25 °C INL 1, 2, 3 -- ±1 -- LSB Integral Nonlinearity TMIN to TMAX INL 1, 2, 3 -- -- ±2 LSB Bipolar Zero Error BZE 1, 2, 3 -- -- ±12 LSB PGE 1, 2, 3 -- -- ±12 LSB NGE 1, 2, 3 -- -- ±12 LSB Positive Gain Error 1 Negative Gain Error 1 1. Measured with respect to internal reference. 04.14.15 Rev 6 All data sheets are subject to change without notice 3 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter TABLE 6. 7872 DC ELECTRICAL CHARACTERISTICS FOR ANALOG INPUT (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN MAX UNITS Input Voltage Range -- 1, 2, 3 -3 3 V Input Current -- 1, 2, 3 -500 500 µA TABLE 7. 7872 DC ELECTRICAL CHARACTERISTICS FOR REFERENCE OUTPUT (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN MAX UNIT REFOUT @ +25 °C -- 1 2.99 3.01 V REFOUT TMIN to TMAX -- 2, 3 2.98 3.02 V REFOUT Tempco: Typically 35ppm1 -- 1, 2, 3 -- ±40 ppm/oC Reference Load Sensitivity (DREFOUT/DI) Reference Load Current Change (0-300 µA); Reference Load Should Not Be Changed During Conversion -- 1, 2, 3 -- 1.2 mV Memory 1) Characterized, Not 100% Tested TABLE 8. 7872 DC ELECTRICAL CHARACTERISTICS FOR LOGIC INPUTS (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN MAX UNIT Input High Voltage: VDD 5 V ± 5%2 VINH 1, 2, 3 2.4 -- V Input Low Voltage: VDD 5 V ± 5% VINL 1, 2, 3 -- 0.8 V Input Current: (CONVST) VIN = 0 V to VDD IIN 1, 2, 3 -10 10 µA Input Current: ( Control, Clk ) VIN = VSS to VDD IIN 1, 2, 3 -10 10 µA CIN 1, 2, 3 -- 10 pF Input 2 Capacitance1 1) Not Tested 2) Application of Signal TABLE 9. 7872 DC ELECTRICAL CHARACTERISTICS FOR LOGIC OUTPUTS (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER Output Low Voltage ISINK = 1.6 mA SYMBOL SUBGROUPS MIN MAX UNIT VOL 1, 2, 3 -- 0.4 V TABLE 10. 7872 DC ELECTRICAL CHARACTERISTICS FOR CONVERSION TIME (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL SUBGROUPS MIN MAX UNIT External Clock1 -- 9, 10, 11 -- 10 µs Internal Clock: Nominal Value = 2 MHz -- 9, 10, 11 -- 11 µs 1) Application of Signal 04.14.15 Rev 6 All data sheets are subject to change without notice 4 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter TABLE 11. 7872 DC ELECTRICAL CHARACTERISTICS FOR POWER REQUIREMENTS (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER SYMBOL CONDITIONS SUBGROUPS REQUIREMENTS UNITS Positive Supply Voltage VDD 5% for Specified Performance -- 5 V Negative Supply Voltage VSS 5% for Specified Performance -- -5 V Positive Supply Current IDD Typically 6mA 1, 2, 3 13 mA max Negative Supply Current ISS Typically 4mA 1, 2, 3 6 mA max Power Dissipation PD Typically 50mW 1, 2, 3 95 mW max TABLE 12. 7872 TIMING CHARACTERISTICS 1,2 (VDD = 5V ±5%, VSS = -5 V ± 5%, TA = -55 TO 125 °C UNLESS OTHERWISE SPECIFIED) PARAMETER/CONDITION SUBGROUPS MIN MAX UNITS CONVST Pulse Width t1 9, 10, 11 50 -- ns SSTRB to SCLK Falling Edge Setup Time t10 9, 10, 11 100 -- ns SCLK Cycle Time t11 9, 10, 11 440 -- ns SCLK to Valid Data Delay: CL = 35 pF 4 t12 9, 10, 11 -- 155 ns SCLD Rising Edge to SSTRB t13 9, 10, 11 20 150 ns Bus Relinquish Time After SCLK t14 9, 10, 11 4 100 ns 3 Memory SYMBOL 1. All input signals are specified with tr = tr = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V. 2. Serial timing is measured with a 4.7 k pull-up resistor on SDATA and SSTRB and a 2 k pull-up resistor on SCLK. The capacitance on all three outputs is 35 pF. 3. SCLK mark/space ration (measured from a voltage level of 1.6 V) is 40/60 to 60/40. 4. SDATA will drive higher capacitive loads, but this will add to t12 since it increases the external RC time constant (4.7k/CL) and hence, the time to reach 2.4 V. 04.14.15 Rev 6 All data sheets are subject to change without notice 5 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter FIGURE 1. MODE 1 TIMING DIAGRAM SERIAL t1 TRACK HOLD GOES INTO HOLD CONVST 1 SSTRB t 10 t 11 t 13 2 SCLK t 12 SDATA t 14 LEADING ZEROS DB13 DB12 DB11 DB10 DB0 2. External 2 k pull-up resistor continuos SCLK (DASHED LINE) when 14/8/CLK (CONTROL) = -5 V; noncontinuous when 14/ 8/CLK (CONTROL) = 0 V. FIGURE 2. LOAD CIRCUIT FOR ACCESS TIME 1.6mA IOL TO OUTPUT CL PIN 50pF +2.1V IOH 200uA 04.14.15 Rev 6 All data sheets are subject to change without notice 6 ©2015 Maxwell Technologies All rights reserved. Memory 1. External 4.7 k pull-up resistor. 7872 14-Bit A/D Converter FIGURE 3. LOAD CIRCUIT FOR OUTPUT FLOAT DELAY IOL 1.6mA TO OUTPUT CL PIN 50pF +2.1V IOH 200uA Memory 04.14.15 Rev 6 All data sheets are subject to change without notice 7 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter Memory 16 PIN RAD-PAK® FLAT PACKAGE DIMENSION SYMBOL MIN NOM MAX A 0.115 0.135 0.150 b 0.015 0.017 0.019 c 0.004 0.005 0.007 D 0.407 0.415 0.423 E 0.275 0.280 0.285 E1 -- -- 0.500 E2 0.150 0.156 0.162 E3 0.030 0.062 -- e 0.050 BSC L 0.325 0.335 0.345 Q 0.020 0.033 0.045 S1 0.005 0.024 0.045 N 16 Note: All dimensions in inches The top and bottom of the package connected to -V. 04.14.15 Rev 6 All data sheets are subject to change without notice 8 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter Memory 16 PIN RAD-PAK® DUAL IN LINE PACKAGE DIMENSION SYMBOL MIN NOM MAX A -- 0.157 0.200 b 0.014 0.018 0.026 b2 0.045 0.047 0.065 c 0.008 0.010 0.018 D -- 0.800 0.840 E 0.220 0.295 0.310 eA 0.300 BSC eA/2 0.150 BSC e 0.100 BSC L 0.135 0.145 0.155 Q 0.000 0.002 0.060 S1 0.005 0.027 -- S2 0.005 -- -- N 16 Note: All dimensions in inches The top and bottom of the package connected to -V. 04.14.15 Rev 6 All data sheets are subject to change without notice 9 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter Important Notice: These data sheets are created using the chip manufacturer’s published specifications. Maxwell Technologies verifies functionality by testing key parameters either by 100% testing, sample testing or characterization. The specifications presented within these data sheets represent the latest and most accurate information available to date. However, these specifications are subject to change without notice and Maxwell Technologies assumes no responsibility for the use of this information. Maxwell Technologies’ products are not authorized for use as critical components in life support devices or systems without express written approval from Maxwell Technologies. Any claim against Maxwell Technologies must be made within 90 days from the date of shipment from Maxwell Technologies. Maxwell Technologies’ liability shall be limited to replacement of defective parts. Memory 04.14.15 Rev 6 All data sheets are subject to change without notice 10 ©2015 Maxwell Technologies All rights reserved. 7872 14-Bit A/D Converter Product Ordering Options Model Number 7872 RP X X Option Details Feature Screening Flow Monolithic1 S = Maxwell Class S B = Maxwell Class B E = Engineering (testing @ +25°C) I = Industrial (testing @ -55°C, +25°C, +125°C) Radiation Feature Base Product Nomenclature 04.14.15 Rev 6 Memory D = Dual In-line Package (DIP) F = Flat Pack Package RP = RAD-PAK® package 14-Bit A/D Converter All data sheets are subject to change without notice 11 ©2015 Maxwell Technologies All rights reserved.