STMICROELECTRONICS L6920D

L6920
1V HIGH EFFICIENCY SYNCRONOUS STEP UP CONVERTER
■
■
■
■
■
■
■
■
0.6 TO 5.5V OPERATING INPUT VOLTAGE
1V START UP INPUT VOLTAGE
INTERNAL SYNCHRONOUS RECTIFIER
ZERO SHUT DOWN CURRENT
3.3V AND 5V FIXED OR ADJUSTABLE
OUTPUT VOLTAGE (2V UP TO 5.2V)
120mΩ INTERNAL ACTIVE SWITCH
LOW BATTERY VOLTAGE DETECTION
REVERSE BATTERY PROTECTION
TSSOP8
ORDERING NUMBER: L6920D
DESCRIPTION
Applications
■ ONE TO THREE CELL BATTERY DEVICES
■
PDA AND HAND HELD INSTRUMENTS
■
CELLULAR PHONES - DIGITAL CORDLESS
PHONE
■
PAGERS
■
GPS
■
DIGITAL CAMERAS
The L6920 is a high efficiency step-up controller requiring only three external components to realize the
conversion from the battery voltage to the selected
output voltage.
The start up is guaranteed at 1V and the device is operating down to 0.6V.
Internal synchronous rectifier is implemented with a
120mΩ P-channel MOSFET and, in order to improve
the efficiency, a variable frequency control is implemented.
APPLICATION CIRCUIT
L1
VCC
2.5V
LX
8
7
C2
1
SHDN
5
LBI
2
3
REF
4
6
L6920
OUT
VOUT
3.3V
500mA
FB
C3
C1
LBO
GND
D00IN1136C
May 2003
1/12
L6920
PIN DESCRIPTION
Pin
Name
Function
1
FB
Output voltage selector. Connect FB to GND for Vout=5V or to OUT for Vout=3.3V. Connect FB to an
external resistor divider for adjustable output voltage (from 2V to 5.2V) [see R4 and R5, fig. 7].
2
LBI
Battery low voltage detector input. The internal threshold is set to 1.23V.
A resistor divider is needed to adjust the desired low battery threshold:
R1
V LBI = 1.23V ⋅  1 + -------- [see R1 and R2, fig. 7]

R2
3
LBO
Battery low voltage detector output. If the voltage at the LBI pin drops below the internal
threshold typ. 1.23V, LBO goes low.
The LBO is an open drain output and so a pull-up resistor (about 200KΩ) has to be added for
correct output setting [see R3, fig. 7].
4
REF
1.23V reference voltage. Bypass this output to GND with a 100nF capacitor for filtering high
frequency noise. No capacitor is required for stability
5
SHDN Shutdown pin. When pin 5 is below 0.2V the device is in shutdown, when pin 5 is above 0.6V the
device is operating.
6
GND
7
LX
8
OUT
Ground pin
Step-up inductor connection
Power OUTPUT pin
PIN CONNECTION (Top view)
FB
1
8
OUT
LBI
2
7
LX
LBO
3
6
GND
4
5
SHDN
REF
TSSOP8
ABSOLUTE MAXIMUM RATINGS
Symbol
Vccmax
Vout max
Parameter
Value
Unit
Vcc to GND
6
V
LBI, SHDN, FB to GND
6
V
Vout to GND
6
V
Value
Unit
Thermal Resistance Junction to Ambient
250
°C/W
Maximum Junction Temperature
150
°C
THERMAL DATA
Symbol
Rth j-amb
Tj
2/12
Parameter
L6920
ELECTRICAL CHARACTERISTCS (Vin = 2V, FB = GND, Tamb = -40°C to 85°C and Tj < 125°C unless otherwise specified))
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
VCC SECTION
Vin
Minimum operating Input Voltage
Vin
Minimum Start Up Input Voltage
Iq
Quiescent Current
0.6
V
1
V
Il =0 mA, FB = 1.4V, Vout = 3.3V
LBI = SHDN = 2V, Tj = Tamb
9
15
µA
Il =0 mA, FB = 1.4V, Vout = 5V
LBI = SHDN = 2V, Tj = Tamb
11
18
µA
Isd
Shut Down Current
Vin = 5V, Il =0 mA
0.1
5
µA
Irev
Reverse battery current
Vin = -4V, Tj = Tamb
0.1
2
µA
POWER SECTION
Ron-N
Active switch ON resistance
120
250
mΩ
Ron-P
Synchronous switch ON
resistance
120
250
mΩ
CONTROL SECTION
Vout
Output voltage
Output voltage range
VLBI
FB = OUT, Il =0 mA
3.2
3.3
3.4
V
FB = GND, Il =0 mA
4.9
5
5.1
V
5.2
V
External divider
LBI threshold
0°C < Tj < 70°C
VLBO
Ilim
LBO logic LOW
2
1.18
1.23
1.27
V
1.205
1.23
1.255
V
0.2
0.4
V
0.8
1
1.2
A
Isink < 250µA
LX switch current limit
Tonmax
Maximum on time
Vout = 2V to 5.3V
3.75
5
6.25
µs
Toffmin
Minimum off time
Vout = 2V to 5.3V
0.75
1
1.25
µs
SHDN
SHDN logic LOW
0.2
V
Vref
SHDN logic HIGH
0.6
Reference Voltage
1.18
V
1.23
1.27
V
3/12
L6920
Figure 1. Efficiency vs. Output Current
Figure 3. Startup Voltage vs Output Current
1.4
100
Vin = 2.4V
90
1.2
80
Vin = 1.2V
1
Startup voltage (V)
EFFICIENCY
η [%]
70
60
50
40
30
Vout = 3.3V
L = 47µH
C = 100µF
20
0.8
0.6
0.4
10
L = 47µH
C = 22µF
0.2
0
0.01
0.1
1
10
100
1000
LOAD CURRENT [mA]
0
30
100
Vin = 3.6V
90
Vin = 2.4V
80
Vin = 1.2V
EFFICIENCY
η [%]
70
60
50
f
Vout
= 5V
L = 47µH
C = 100µF
40
30
20
10
0
0.01
0.1
1
10
LOAD CURRENT [mA]
4/12
100
60
90
120
Output current (mA)
Figure 2. Efficiency vs. Output Current
1000
150
180
L6920
DETAILED DESCRIPTION
The L6920 is a high efficiency, low voltage step-up DC/DC converter particularly suitable for 1 to 3 cells (Li-Ion/
polymer, NiMH respectively) battery up conversion.
These performances are achieved via a strong reduction of quiescent current (10µA only) and adopting a synchronous rectification, that implies also a reduced cost in the application (no external diode required).
Operation is based on maximum ON time - minimum OFF time control, tailored by a current limit set to 1A. A
simplified block diagram is shown here below.
Figure 4. Simplified Block Diagram
VOUT
OUT
ZERO CROSSING
-
VREF
+
+
-+
VBG
SHDN
A
FB
Y
VOUT
GND
R1,R2
A
B
C
Y
B
-
VOUT
LX
OPAMP
(CR)
+
C
VBG
-
Q
Toff min
1µsec
S
+
GND
+
R
CURRENT LIMIT
LBO
VIN
FB
Ton max
5µsec
VBG
LBI
D99IN1041
PRINCIPLE OF OPERATION
In L6920 the control is based on a comparator that continuously checks the status of output voltage.
If the output voltage is lower than the expected value, the control function of the L6920 directs the energy stored
in the inductor to be transferred to the load. This is accomplished by alternating between two basic steps:
- TON phase: the energy is transferred from the battery to the inductor by shorting LX node to ground via the Nchannel power switch. The switch is turned off if the current flowing in the inductor reaches 1A or after a maximum on time set to 5µs.
- TOFF phase: the energy stored in the inductor is transferred to the load through the synchronous switch for at
least a minimum off time equal to 1µs. After this, the synchronous switch is turned off as soon as the output
voltage goes lower than the regulated voltage or the current flowing in the inductor goes down to zero.
So, in case of light load, the device works in PFM mode, as shown in figure 5.
5/12
L6920
Figure 5.1. PFM mode Condition: Vout = 5V; Vin
=1.5V. Trace1: Vout (50mV~/div) Trace
4: IL (100mA/div) Time div.: 5µs/div
Figure 5.3. Heavy load - Inductor current ripples
below Ilim Trace1: Vout (100mV~/div)
Trace 4: IL (200mA/div) Time div.: 20 µs/div
Figure 5.2. Heavier load - Train pulses overlapping.
Trace1: Vout (100mV~/div) Trace 4: IL
(200mA/div) Time div.: 10 µs/div
Figure 5.4. Heavy load and High ESR. Regulation
falls in continuous mode of operation.
Trace1: Vout (100mV~/div) Trace 4: IL
(200mA/div). Time div.: 5 µs/div
When Iload is heavier, the pulse trains are overlapped. Figures 5.2 - 5.4 show some possible behaviors.
Considering that current in the inductor is limited to 1A, the maximum load current is defined by the following
relationship:
V in
V out – V in
I lo ad_lim = ----------- ⋅  I lim – T off min ⋅ -------------------------- ⋅ η eq. (1)
V out 
2⋅L 
Where η is the efficiency and Ilim =1A.
Of course, if Iload is greater than Iload_lim the regulation is lost (figure 6).
6/12
L6920
Figure 6. No regulation. Iload > Iload_lim Trace1:
Vout (100mV~/div) Trace 4: IL (200mA/div).
Time div.: 5 µs/div
The synchronous switch body diode causes a parasitic path between power supply and output that can't
be avoided also in shutdown.
Low battery detection
The L6920 includes a low battery detector comparator. Threshold is VREF voltage and a 1.3% hysteresis is added to avoid oscillations when input crosses
the threshold slowly. The LBO is an open drain output so a pull up resistor is required for a proper use.
Reverse polarity
A protection circuit has been implemented to avoid
that L6920 and the battery are destroyed in case of
wrong battery insertion.
Start-up
In addition, this circuit has been designed so that the
current required by the battery is zero also in reverse
polarity.
One of the key features of L6920 is the startup at supply voltage down to 1V (please see the diagram in
Figure 3. in case of heavy load).
APPLICATION INFORMATION
The device leaves the startup mode of operation as
soon as VOUT goes over 1.4V. During startup, the
synchronous switch is off and the energy is transferred to the load through its intrinsic body diode.
Output voltage must be selected acting on FB pin.
Three choices are available: fixed 3.3V, 5V or adjustable output set via an external resistor divider.
The N-channel switches with a very low RDSon
thanks to an internal charge pump used to bias the
power mos gate. Because of this modified behavior,
TON/TOFF times are lengthened. Current limit and
zero crossing detection are still available.
Shutdown
In shutdown mode (SHDN pulled low) all internal circuitries are turned off, minimizing the current provided by the battery (ISHDN < 100 nA, in typical case).
Both switches are turned off, and the low battery
comparator output is forced in high impedance state.
Output voltage selection
OUTPUT VOLTAGE SELECTION
VOUT = 3.3V
FB pin connected to OUT (see
application circuit)
VOUT = 5V
FB pin connected to GND
2V ≤ VOUT ≤ 5.2V
FB pin connected to a resistive
divider
VOUT = 1.23V  1 + R4
--------

R5
7/12
L6920
Figure 7. Demoboard Circuit
Panasonic
ELL6RH100M
+VBATT
VBATT
R1
N.C.
LBI
7
GND
8
C4
100nF
4
VOUT
6
1
VOUT
5
C1
47µF
C3
N.C.
R3
N.C.
L6920
3
GND
Panasonic
EEFCDJ470R
GND
LBO
LBO
SHDN
J1
1
2
3
SHDN
1
F.B.
R4 N.C.
2
J2
3
R5 N.C.
not mounted components
Jumper
Panasonic
EEFCDJ470R
C2
47µF
2
R2
N.C.
VREF
+VBATT
L1 10µH
Position
D01IN1310
Function
1-2
Device enabled
2-3
Device disabled
J1
None
J2
Adjustable using R4 and R5 [not
mounted]
1-2
3.3V output voltage
2-3
5V output voltage
R4, R5 should be selected in the range of 100kΩ - 10MΩ to minimize consumption and error due to current sunk
by FB pin (few nA).
Output capacitor selection
The output capacitor affects both efficiency and output ripple so its choice has to be considered with particular
care.
The capacitance value should be in the range of about 10µF-100µF.
An additional, smaller, low ESR capacitor can be in parallel for high frequency filtering. A typical value can be
around 1µF.
If very high performances, in terms of efficiency and output voltage ripple, are required, a very low ESR capacitor has to be chosen.
Ceramic capacitors are the lowest ESR but they are very expensive.
Other possibilities are low-ESR tantalum capacitors, available from KEMET, AVX and other sources. POSCAP
capacitors from SANYO and polymeric capacitors from PANASONIC are also good.
Below there is a list of some capacitors suppliers. The cap values and rated voltages are only a suggested possibility
8/12
L6920
Table 1. Capacitors distributors main list
Manufacturer
Series
Cap Value (µF)
Rated Voltage (V)
ESR (mΩ)
AVX
TPS
15 to 470
6.3
50 to 1500
KEMET
T510/T494/
T495
10 to 470
6
30 to 1000
PANASONIC
EEFCD
22 to 47
6.3
50 to 700
SANYO POSCAP
TPA/B/C
22 to 230
6.3
40 to 80
SPRAGUE
595D
100 to 390
6.3
160 to 700
Inductor selection
Usually, inductors ranging between 5µH to 40µH satisfy most of the applications.
Small value inductors have smaller physical size and guarantee a faster response to load transient but in steady
state condition a bigger ripple on output voltage is generated. In fact the output ripple voltage is given by Ipeak
multiplied by ESR. Furthermore, as shown in equation (1), inductor size affects also the maximum current deliverable to the load. Lastly, a low series resistance is suggested if very high efficiency values are needed. Anyway, the saturation current of the choke should be higher than the peak current limit of the device (1A).
Good surface mounting inductors are available from COILCRAFTS, COILTRONICS, MURATA and other souces. In the following table are listed some suggested components.
Table 2. Inductors distributors main list
Manufacturer
Coilcraft
Series
Inductor Value (uH)
Saturation Current (A)
DO1813HC
22 to 33
1 to 1.2
DO1608
4.7 to 15
0.9 to 1.5
UP1B
22 to 33
1 to 1.2
TP3
4.7 to 15
0.97 to 1.6
HM76-2
22 to 33
1 to 1.2
HM76-1
4.7 to 10
1 to 1.5
Murata
LQN6C
10 to 22
1.2 to 1.7
Panasonic
ELL6SH
10 to 22
0.9 to 1.5
ELL6RH
5.1 to10
11 to 1.55
CR43
4.7 to 10
0.84 to 1.15
Coiltronics
BI
Sumida
Layout Guidelines
The board layout is very important in order to minimize noise, high frequency resonance problems and electromagnetic interference.
It is essential to keep as small as possible the high switching current circulating paths to reduce radiation and
resonance problems. So, the output and input cap should be very close to the device.
The external resistor dividers, if used, should be as close as possible to the pins of the device (FB and LBI) and
as far as possible from the high current circulating paths, to avoid pick up noise.
Large traces for high current paths and an extended groundplane, help to reduce the noise and increase the
efficiency.
For an example of recommended layout see the following evaluation board
9/12
L6920
Figure 8. Figure 8. Demoboard Components (Top side).
4.5cm
4cm
Figure 9. Demoboard Layout (Top side).
4.5cm
4cm
Figure 10. Demoboard Layout (Bottom side).
4.5cm
4cm
10/12
L6920
mm
inch
DIM.
MIN.
TYP.
A
MAX.
MIN.
TYP.
1.20
A1
0.050
A2
0.800
b
MAX.
0.047
0.150
0.002
1.050
0.031
0.190
0.300
0.007
0.012
c
0.090
0.200
0.003
0.008
D (1)
2.900
3.000
3.100
0.114
0.118
0.122
E
6.200
6.400
6.650
0.244
0.252
0.260
E1 (1)
4.300
4.400
4.500
0.169
0.173
0.177
e
L
L1
k
aaa
Note:
1.000
0.650
0.450
0.600
OUTLINE AND
MECHANICAL DATA
0.006
0.039
0.041
0.026
0.750
0.018
1.000
0.024
0.027
0.039
0˚ (min.) 8˚ (max.)
0.100
0.004
1. D and F does not include mold flash or protrusions.
Mold flash or potrusions shall not exceed 0.15mm
(.006inch) per side.
TSSOP8
(Body 4.4mm)
0079397 (Jedec MO-153-AA)
11/12
L6920
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
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