SN74LVC1G07 www.ti.com .................................................................................................................................................. SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 SINGLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT FEATURES 1 • Available in the Texas Instruments NanoFree™ Package • Supports 5-V VCC Operation • Input and Open-Drain Output Accept Voltages up to 5.5 V • Max tpd of 4.2 ns at 3.3 V • Low Power Consumption, 10-µA Max ICC • ±24-mA Output Drive at 3.3 V • 2 • • DCK PACKAGE (TOP VIEW) DBV PACKAGE (TOP VIEW) N.C. 1 A 2 GND 3 VCC 5 Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) N.C. 1 A 2 GND 3 DRL PACKAGE (TOP VIEW) VCC 5 N.C. 1 A 2 GND 3 5 VCC 4 Y Y 4 Y 4 DRY PACKAGE (TOP VIEW) N.C. 1 6 VCC A 2 5 N.C. GND 3 4 Y N.C. – No internal connection See mechanical drawings for dimensions. YZP PACKAGE (TOP VIEW) DNU A1 A2 A B1 B2 GND C1 C2 VCC Y YZP PACKAGE TERMINAL ASSIGNMENTS 1 2 A DNU VCC B A No ball C GND Y DNU – Do not use YZV PACKAGE (TOP VIEW) A GND A1 A2 VCC B1 B2 Y YZV PACKAGE TERMINAL ASSIGNMENTS 1 2 A A VCC B GND Y 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2000–2008, Texas Instruments Incorporated SN74LVC1G07 SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 .................................................................................................................................................. www.ti.com DESCRIPTION/ORDERING INFORMATION This single buffer/driver is designed for 1.65-V to 5.5-V VCC operation. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. The output of the SN74LVC1G07 device is open drain and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA. This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION –40＝C to 85＝C Reel of 3000 SN74LVC1G07YZPR _ _ _CV_ NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZV (Pb-free) Reel of 3000 SN74LVC1G07YZVR ____ CV SON – DRY Reel of 5000 SOT (SC-70) – DCK SOT (SOT-553) – DRL (3) 2 TOP-SIDE MARKING (3) NanoFree™ – WCSP (DSBGA) 0.23-mm Large Bump – YZP (Pb-free) SOT (SOT-23) – DBV (1) (2) ORDERABLE PART NUMBER PACKAGE (1) (2) TA SN74LVC1G07DRYR SN74LVC1G07DRYRG4 Reel of 3000 SN74LVC1G07DBVR Reel of 250 SN74LVC1G07DBVT Reel of 3000 SN74LVC1G07DCKR Reel of 250 SN74LVC1G07DCKT Reel of 4000 SN74LVC1G07DRLR CV_ C07_ CV_ CV_ Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. DBV/DCK/DRL/DRY: The actual top-side marking has one additional character that designates the assembly/test site. YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2 has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Submit Documentation Feedback Copyright © 2000–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1G07 SN74LVC1G07 www.ti.com .................................................................................................................................................. SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 FUNCTION TABLE INPUT A OUTPUT Y L L H Z LOGIC DIAGRAM (POSITIVE LOGIC) (DBV, DCK, DRL, DRY, and YZP Package) A 2 4 Y LOGIC DIAGRAM (POSITIVE LOGIC) (YZV Package) A 1 3 Y ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCC MIN MAX Supply voltage range –0.5 6.5 UNIT V (2) VI Input voltage range –0.5 6.5 V VO Voltage range applied to any output in the high-impedance or power-off state (2) –0.5 6.5 V VO Voltage range applied to any output in the high or low state (2) (3) –0.5 6.5 V IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through VCC or GND θJA Tstg (1) (2) (3) (4) Package thermal impedance (4) DBV package 206 DCK package 252 DRL package 142 DRY package 234 YZP package 132 YZV package 116 Storage temperature range –65 150 °C/W °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The value of VCC is provided in the recommended operating conditions table. The package thermal impedance is calculated in accordance with JESD 51-7. Submit Documentation Feedback Copyright © 2000–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1G07 3 SN74LVC1G07 SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 .................................................................................................................................................. www.ti.com RECOMMENDED OPERATING CONDITIONS (1) VCC Operating Supply voltage Data retention only 1.65 5.5 V 2 0.7 × VCC VCC = 1.65 V to 1.95 V Low-level input voltage V 1.7 VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VIL UNIT 0.65 × VCC VCC = 2.3 V to 2.7 V High-level input voltage MAX 1.5 VCC = 1.65 V to 1.95 V VIH MIN 0.35 × VCC VCC = 2.3 V to 2.7 V 0.7 VCC = 3 V to 3.6 V 0.8 VCC = 4.5 V to 5.5 V V 0.3 × VCC VI Input voltage 0 5.5 V VO Output voltage 0 5.5 V VCC = 1.65 V 4 VCC = 2.3 V IOL Low-level output current Δt/Δv 8 16 VCC = 3 V Input transition rise or fall rate VCC = 4.5 V 32 VCC = 1.8 V ±0.15 V, 2.5 V ± 0.2 V 20 VCC = 3.3 V ± 0.3 V 10 VCC = 5 V ± 0.5 V TA (1) mA 24 ns/V 5 Operating free-air temperature –40 85 °C All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. ELECTRICAL CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOL = 100 µA VOL VCC 1.65 V to 5.5 V 0.1 IOL = 4 mA 1.65 V 0.45 IOL = 8 mA 2.3 V 0.3 IOL = 16 mA IOL = 32 mA A input 0.4 3V IOL = 24 mA II MIN TYP (1) MAX V 0.55 4.5 V VI = 5.5 V or GND UNIT 0.55 0 to 5.5 V ±5 µA 0 ±10 µA 1.65 V to 5.5 V 10 µA 3 V to 5.5 V 500 µA Ioff VI or VO = 5.5 V ICC VI = 5.5 V or GND, IO = 0 ΔICC One input at VCC – 0.6 V, Other inputs at VCC or GND Ci VI = VCC or GND 3.3 V 4 pF Co VO = VCC or GND 3.3 V 5 pF (1) 4 All typical values are at VCC = 3.3 V, TA = 25°C. Submit Documentation Feedback Copyright © 2000–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1G07 SN74LVC1G07 www.ti.com .................................................................................................................................................. SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 SWITCHING CHARACTERISTICS over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A Y VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V MIN MAX MIN MAX MIN MAX MIN MAX 2.4 8.3 1 5.5 1.5 4.2 1 3.5 UNIT ns OPERATING CHARACTERISTICS TA = 25°C Cpd PARAMETER TEST CONDITIONS Power dissipation capacitance f = 10 MHz VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V VCC = 5 V TYP TYP TYP TYP 3 3 4 6 Submit Documentation Feedback Copyright © 2000–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1G07 UNIT pF 5 SN74LVC1G07 SCES296W – FEBRUARY 2000 – REVISED JUNE 2008 .................................................................................................................................................. www.ti.com PARAMETER MEASUREMENT INFORMATION (OPEN DRAIN) VLOAD S1 RL From Output Under Test Open TEST GND RL CL (see Note A) S1 tPZL (see Notes E and F) VLOAD tPLZ (see Notes E and G) VLOAD tPHZ/tPZH VLOAD LOAD CIRCUIT INPUT VCC VI 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5 V ± 0.5 V VM tr/tf ≤ 2 ns ≤ 2 ns ≤ 2.5 ns ≤ 2.5 ns VCC VCC 3V VCC VLOAD VCC/2 VCC/2 1.5 V VCC/2 2 × VCC 2 × VCC 6V 2 × VCC CL RL V∆ 30 pF 30 pF 50 pF 50 pF 1 kΩ 500 Ω 500 Ω 500 Ω 0.15 V 0.15 V 0.3 V 0.3 V VI Timing Input VM 0V tw tsu th VI VM Input VM VM VM Data Input 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VI VM Input VM 0V Output VM VOL tPHL VM tPLZ VLOAD/2 VM tPZH VM VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VM 0V Output Waveform 1 S1 at VLOAD (see Note B) tPLH VOH Output VM tPZL VOH VM VI Output Control tPHL tPLH VI VOL + V∆ VOL tPHZ Output Waveform 2 S1 at VLOAD (see Note B) VM VLOAD/2 − V∆ VLOAD/2 ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω. D. The outputs are measured one at a time, with one transition per measurement. E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd. F. tPZL is measured at VM. G. tPLZ is measured at VOL + V∆. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 Submit Documentation Feedback Copyright © 2000–2008, Texas Instruments Incorporated Product Folder Link(s): SN74LVC1G07 PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74LVC1G07DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DBVTE4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKT ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKTE4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DCKTG4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DRLR ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DRLRG4 ACTIVE SOT DRL 5 4000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DRYR ACTIVE SON DRY 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07DRYRG4 ACTIVE SON DRY 6 5000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVC1G07YZPR ACTIVE DSBGA YZP 5 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM SN74LVC1G07YZVR ACTIVE DSBGA YZV 4 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 8-Dec-2008 package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74LVC1G07 : • Enhanced Product: SN74LVC1G07-EP NOTE: Qualified Version Definitions: • Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 24-Sep-2009 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) SN74LVC1G07DBVR SOT-23 DBV 5 3000 178.0 9.0 SN74LVC1G07DBVR SOT-23 DBV 5 3000 180.0 SN74LVC1G07DBVT SOT-23 DBV 5 250 178.0 SN74LVC1G07DBVT SOT-23 DBV 5 250 SN74LVC1G07DCKR SC70 DCK 5 SN74LVC1G07DCKR SC70 DCK SN74LVC1G07DCKT SC70 DCK SN74LVC1G07DCKT SC70 W Pin1 (mm) Quadrant 3.23 3.17 1.37 4.0 8.0 Q3 9.2 3.23 3.17 1.37 4.0 8.0 Q3 9.0 3.23 3.17 1.37 4.0 8.0 Q3 180.0 9.2 3.23 3.17 1.37 4.0 8.0 Q3 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 5 3000 180.0 9.2 2.24 2.34 1.22 4.0 8.0 Q3 5 250 180.0 9.2 2.24 2.34 1.22 4.0 8.0 Q3 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 SN74LVC1G07DRLR SOT DRL 5 4000 180.0 9.2 1.78 1.78 0.69 4.0 8.0 Q3 SN74LVC1G07DRYR SON DRY 6 5000 179.0 8.4 1.2 1.65 0.7 4.0 8.0 Q1 SN74LVC1G07YZPR DSBGA YZP 5 3000 180.0 8.4 1.02 1.52 0.63 4.0 8.0 Q1 SN74LVC1G07YZVR DSBGA YZV 4 3000 180.0 8.4 1.02 1.02 0.63 4.0 8.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Sep-2009 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVC1G07DBVR SOT-23 DBV 5 3000 180.0 180.0 18.0 SN74LVC1G07DBVR SOT-23 DBV 5 3000 205.0 200.0 33.0 SN74LVC1G07DBVT SOT-23 DBV 5 250 180.0 180.0 18.0 SN74LVC1G07DBVT SOT-23 DBV 5 250 205.0 200.0 33.0 SN74LVC1G07DCKR SC70 DCK 5 3000 180.0 180.0 18.0 SN74LVC1G07DCKR SC70 DCK 5 3000 205.0 200.0 33.0 SN74LVC1G07DCKT SC70 DCK 5 250 205.0 200.0 33.0 SN74LVC1G07DCKT SC70 DCK 5 250 180.0 180.0 18.0 SN74LVC1G07DRLR SOT DRL 5 4000 202.0 201.0 28.0 SN74LVC1G07DRYR SON DRY 6 5000 220.0 205.0 50.0 SN74LVC1G07YZPR DSBGA YZP 5 3000 220.0 220.0 34.0 SN74LVC1G07YZVR DSBGA YZV 4 3000 220.0 220.0 34.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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