NJU3152 PRELIMINARY 4-BIT SINGLE CHIP OTP TINY CONTROLLER ■ PACKAGE OUTLINE ■ GENERAL DESCRIPTION The NJU3152 is the C-MOS 4-bit Single Chip OTP type Micro Controller with programmable Flash Memory. It is completely compatible with the NJU3102 in function and the pin configuration. Therefore, the NJU3152 is suitable for the final evaluation before NJU3102 mask generation, the small quantity production and short leadtime. * In this data sheet, only OTP programming and the difference between NJU3152 and NJU3102 are mentioned mainly. Therefore the detail function and specification should be referred on the NJU3102 data sheet. NJU3152L NJU3152G ■ FEATURES ● ● ● ● ● Internal One Time Programmable ROM 1,024 X 8bits Internal Data RAM 32 X 4bits Wide operating voltage range 2.7V ~ 5.5V Package outline SDIP22 / SOP22 ROM programmer “SUPERPRO/L” by XELTEK co,. ■ PIN CONFIGURATION IN OTP PROGRAMMING MODE 1 22 VDD D0 2 21 Open D1 3 20 CNT2 D2 4 19 CNT1 5 18 D7 6 17 7 16 PROM 8 15 D6 CLK 9 14 D5 REQ 10 13 D4 11 12 RESET Open Open D3 Open VSS Open Note) The pin configuration in Normal operating mode is the same as NJU3102. -1- NJU3152 ■ BLOCK DIAGRAM CPU CORE STACK TLUaddr X-Reg Y-Reg X’-Reg Y’-Reg AC VDD VSS PC MUX OTP ROM TEST RESET ALU CPU TIMING GENERATOR 1024 x 8 bit OSC OSC2 IR RAM STANDBY CONTROLLER -2- PORT_C PC1 PORT_D PC0 PB0 PB1 PB2 PB3 PORT_E PE1 PORT_B PE0 PORT_A PA0 PA1 PA2 PA3 ID PD0 PD1 PD2 PD3 32 x 4 bit OSC1 NJU3152 ■ TERMINAL DESCRIPTION IN OTP PROGRAMMING MODE No. SYMBOL INPUT/OUTPUT FUNCTION 12 RESET INPUT RESET terminal. When the low-level input-signal, the system is initialized. 2 - 4, 6, 13 - 15, 18 19, 20 10 9 8 22 11 Note 1) 2) D0 - D7 INPUT/OUTPUT Data bus CNT1 CNT2 REQ CLK PROM VDD VSS INPUT INPUT OUTPUT INPUT INPUT - OTP control input terminal Request output terminal Clock input terminal OTP programming enable terminal Power Source (5V) Power Source (0V) Use at VDD=5V in OTP programming mode. Non connect anything to the other terminals. ■ Difference between NJU3152 (OTP version) and NJU3102 (MASK version) ● Operating mode NJU3152 has two operating modes. One is ”Normal operating mode” and the other is “OTP programming mode”. ● • Normal operating mode The ”TEST” terminal is set to low level. (The terminal is recommended to connect to GND.) Operating voltage range; 2.7V ~ 5.5V. • OTP Programming mode User program is read out from or written into the OTP by the universal programmer “SUPERPRO/L” and converting adapter made by XELTEK co,.(USA). Option information set in the initialization When the initialization is performed(RESET terminal is “L”), the operation information stored in option area is set as shown in the following timing chart . The option information is set in the term of 1 / fOSC x 256clock after RESET releasing and oscillation stability time. After information set, the program counter is set to 0000H and the NJU3152 operates in normal. [ TIMING CHART ] Oscillation Stability Time Option information setting 1/fOSCx256clock Normal Operation Oscillator Clock Oscillation Start RESET PC=0000H fOSC=4MHz about 64µsec -3- NJU3152 ■ ABSOLUTE MAXIMUM RATINGS (Ta=25°C) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD -0.3 ~ +7.0 V Input Voltage VIN -0.3 ~ VDD + 0.3 V Output Voltage VOUT -0.3 ~ VDD + 0.3 V Operating Temperature Topr -20 ~ +75 °C Storage Temperature Tstg -55 ~ +125 °C Note) The difference of electrical characteristics between NJU3152 (OTP version) and NJU3102 (MASK version) NJU3102 NJU3152 Supply Voltage (VDD) MIN. 2.4V → 2.7V Supply Current 5V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. 4.5mA 4.5mA 4.3mA 5.0µA → → → 30mA 30mA 30mA 20µA 3V (IDD1) Max. (IDD2) Max. (IDD3) Max. (IDD4) Max. 2.3mA 2.3mA 2.1mA 3.0µA → → 20mA 20mA 20mA 20µA • • -4- → NJU3152 ■ ELECTRICAL CHARACTERISTICS PARAMETER Supply Voltage SYM BOL VDD IDD1 IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage Low-level Input Voltage High-Level Input Current VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH IIL1 Low-Level Input Current IIL2 High-Level Output Voltage Low-Level Output Voltage VOH VOL1 VOL2 Output Leakage Current IOD DC CHARACTERISTICS 1 CONDITIONS VDD VDD VDD=5V, fOSC=2MHz X’tal Oscillation in Reset VDD VDD=5V, fOSC=2MHz Ceramic Oscillation in Reset VDD VDD=5V, fOSC=2MHz CR Oscillation in Reset VDD VDD=5V, STANDBY Mode VDD VDD=5V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 VDD=5.5V, VIN=5.5V PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=5.5V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=5.5V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOH=-100µA PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOL1=400µA PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1 IOL2=15mA PD0~PD3 CIN 30 mA *3 30 mA *3 30 mA *3 20 µA *3 30 mA *3 0.7VDD VDD V *1 0.8VDD VDD-1.0 VDD VDD V V *1 0 0.3VDD V *1 0 0 0.2VDD 1.0 V V *1 10 µA *1 -10 µA *1 -100 µA *1 V *2 0.5 V *2 2.0 V *2 10 µA *2 20 pF VDD-0.5 VDD=5.5V, VOH=5.5V PD0~PD3 Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. Input Capacitance (VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C) NOT MIN TYP MAX UNIT E 3.6 5.5 V 10 -5- NJU3152 ■ ELECTRICAL CHARACTERISTICS PARAMETER Supply Voltage SYM BOL VDD IDD1 IDD2 Supply Current IDD3 IDD4 IDD5 High-Level Input Voltage Low-level Input Voltage High-Level Input Current VIH1 VIH2 VIH3 VIL1 VIL2 VIL3 IIH IIL1 Low-Level Input Current IIL2 High-Level Output Voltage Low-Level Output Voltage VOH VOL1 VOL2 Output Leakage Current IOD DC CHARACTERISTICS 2 CONDITIONS VDD VDD VDD=3V, fOSC=1MHz X’tal Oscillation in Reset VDD VDD=3V, fOSC=1MHz Ceramic Oscillation in Reset VDD VDD=3V, fOSC=1MHz CR Oscillation in Reset VDD VDD=3V, STANDBY Mode VDD VDD=3V, fOSC=4MHz, Operating PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 PE0, PE1, RESET OSC1 VDD=3.6V, VIN=3.6V PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=3.6V, VIN=0V Without pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1, RESET VDD=3.6V, VIN=0V With pull-up resistance PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOH=-80µA PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3, PE0, PE1 IOL1=350µA PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1 IOL2=5mA PD0~PD3 -6- CIN 20 mA *3 20 mA *3 20 mA *3 20 µA *3 20 mA *3 0.8VDD VDD V *1 0.85VDD VDD-0.3 VDD VDD V V *1 0 0.2VDD V *1 0 0 0.15VDD 0.3 V V *1 10 µA *1 -10 µA *1 -100 µA *1 V *2 0.5 V *2 1.0 V *2 10 µA *2 20 pF VDD-0.5 VDD=3.6V, VOH=3.6V PD0~PD3 Except VDD, VSS terminals fOSC=1MHz Other terminals : 0V *1 Input/output port is set as an Input terminal. *2 Input/output port is set as an Output terminal. *3 Except the current through Pull-up resister. Input Capacitance (VDD=2.7~3.6V, VSS=0V, Ta=-20~75°C) NOT MIN TYP MAX UNIT E 2.7 3.6 V 10 NJU3152 ■ ELECTRICAL CHARACTERISTICS AC CHARACTERISTICS 1 (VSS=0V, Ta= -20~75°C) PARAMETER SYM BOL CONDITIONS VDD=2.7~3.6V Operating Frequency fOSC VDD=3.6~5.5V Instruction Cycle Time External Clock Pulse Width External Clock Rise Time Fall Time RESET Low-Level Width RESET Rise Time Port Input Level Width Edge Detection (PC1) Rise Time Fall Time Restart Signal (PC0) Rise Time X’tal Resonator Ceramic Resonator External Resistor Oscillation External Clock X’tal Resonator Ceramic Resonator External Resistor Oscillation External Clock MIN TYP MAX 0.03 0.03 2.0 2.0 0.03 1.0 0.03 0.03 0.03 2.0 4.0 4.0 0.03 2.0 0.03 4.0 6/fOSC tC 250 125 UNIT MHz s tCPH tCPL VDD=2.7~3.6V VDD=3.6~5.5V 16600 16600 ns tCPR tCPF VDD=2.7~5.5V 20 ns tRST VDD=2.7~5.5V tRSR VDD=2.7~5.5V tPIN VDD=2.7~5.5V tEDR tEDF VDD=2.7~5.5V 200 ns tSTR VDD=2.7~5.5V 200 ns 4/fOSC s 20 6/fOSC ms s -7- NJU3152 ■ AC CHARACTERISTICS 1 TIMING CHART EXTERNAL CLOCK 1/fOSC VIH3 OSC1 VIL3 tCPH tCPF RESET INPUT tRST tCPR tCPL tRSR VIH2 RESET VIL2 PORT INPUT tPIN VIH1, VIH2 PORT VIL1, VIL2 EDGE DETECTOR INPUT tEDF tEDR VIH1 PC1 VIL1 RESTART SIGNAL INPUT tSTR VIH1 PC0 VIL1 -8- NJU3152 ■ OPTION as same as mask version (NJU3102) 1) INPUT OUTPUT Terminal Selection All of input-output terminals select a terminal type from the following table for each group as a PORT by the mask option. [ CIRCUIT TYPE TABLE ] TERMINAL TYPES SYMBOL Port of Input Port of Output Input / Output Terminal*1 Port A (PA0～PA3) Port B (PB0～PB3) Port C (PC0, PC1) ICP IC ICP IC ICP IC OC EXTRA FUNCTION REMARKS OC Restart signal input *2 Edge detection *2 OC R F Rise edge detection Fall edge detection Port D ICP ONP (PD0～PD3) IC ON Port E ISP OC (PE0, PE1) IS Note) The symbol in the above table is the same as in mask option generator software. *1) The symbol and the detail circuits of INPUT OUTPUT TERMINAL are written in INPUT OUTPUT TERMINAL TYPE. *2) When the PORTC(PHY3) is set as the input, the extra function are added for terminals. [MASK OPTION LIST] 記号 機 能 ICP C-MOS input with pull-up resistance ISP C-MOS Schmitt trigger input with pull-up resistance IC C-MOS input IS C-MOS Schmitt trigger input ONP Nch-FET Open-Drain output with pull-up resistance OC C-MOS output ON Nch-FET Open-Drain output R Rise edge detection F Fall edge detection -9- NJU3152 [ INPUT OUTPUT TERMINAL TYPE ] Types With Pull-up Without Pull-up Type ICP Type IC PA0~PA3, PB0~PB3, PC0, PC1, PD0~PD3 Type ISP Type IS PE0, PE1 Type ON PA0~PA3, PB0~PB3, PC0, PC1, PE0, PE1 Type ON PD0~PD3 C-MOS INPUT TERMINAL Terminals SCHMITT TRIGGER OUTPUT TERMINAL C-MOS Type ONP N-channel(Nch) OPEN DRAIN 2) Edge Detector Selection PC1 terminal is added the “Edge detect function” by the mask option. Rising edge - 10 - Falling edge NJU3152 MEMO [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - 11 -