NTE1721 & NTE1723 Integrated Circuit Pulse Width Modulator (PWM) Regulator Description: The NTE1721 and NTE1723 are pulse width modulator control–circuits designed to offer improved performance and lowered external parts count when implemented for controlling all types of switching power supplies. The no–chip +5.1V reference is trimmed to ±1% and the input common–mode range of the errror amplifier includes the reference voltage, thus eliminating the need for external divider resistors. A sync input to the oscillator enables multiple units to be slaved or a single unit to be synchronized to an external system clock. A wide range of dead time can be programmed by a single resistor connected between the CT and the Discharge pins. These devices also feature a built–in soft–start circuitry, requiring only an external timing capacitor. A shutdown pin controls both the soft– start circuitry and the output stages, provided instantaneous turn–off through the PWM latch with pulsed shutdown, as well as soft–start recycle with longer shutdown commands. The under voltage lockout inhibits the outputs and the changing of the soft–start capacitor when VCC is below nominal. The output stages are totem–pole design capable of sinking and sourcing in excess of 200mA. The output stages of the NTE1721 features NOR logic resulting in a low output for an off state while the NTE1723 utilizes OR logic which gives a high output when off. Features: D 8V to 35V Operation D +5.1V ±1% Trimmed Reference D 100Hz to 400kHz Oscillator Range D Separate Oscillator Sync Pin D Adjustable Dead Time Control D D D D Input Undervoltage Lockout Latching PWM to Prevent Multiple Pulses Pulse–by–Pulse Shutdown Dual Source/Sink Outputs: ±400mA Peak Absolute Maximum Ratings: (Note 1) Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V Collector Supply Voltage, VC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +5.5V Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to VCC Output Current, Source or Sink, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±500mA Reference Output Current, Iref . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Oscillator Charging Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Power Dissipation (TA = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000mW Derate Above 50°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mW/°C Power Dissipation (TC = +25°C), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000mW Derate Above 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16mW/°C Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +125°C Thermal Resistance, Junction–to–Ambient, RthJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100°C/W Thermal Resistance, Junction–to–Case, RthJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W Lead Temperature (During Soldering, 10sec), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C Note 1 Values beyond which damage may occur Recommended Operating Conditions: Parameter Symbol Min Typ Max Unit Supply Voltage VCC 8.0 – 35.0 V Collector Supply Voltage VC 4.5 – 35.0 V Output Sink/Source Current Steady State IO 0 – ±100 mA 0 – ±400 mA Peak Reference Load Current Iref 0 – 20 mA Oscillator Frequency Range fosc 0.1 – 400 kHz Oscillator Timing Resistor RT 2.0 – 150 kΩ Oscillator Timing Capacitor CT 0.001 – 0.2 µF Deadtime Resistor Range RD 0.5 – – Ω Operating Ambient Temperature Range TA 0 – 70 °C Electrical Characteristics: (VCC = +20V, TA = 0° to +70°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 5.0 5.1 5.2 V Reference Section Reference Output Voltage Vref TJ = +25°C Line Regulation Regline +8V ≤ VCC ≤ +35V – 10 20 mV Load Regulation Regload 0mA ≤ IL ≤ 20mA – 20 50 mV Temperature Stability ∆Vref/∆T – 20 – mV ∆Vref 4.95 – 5.25 V Total Output Variation (Includes Line and Load Regulation over Temperature Short Circuit Current ISC Vref = 0V, TJ = +25°C – 80 100 mA Output Noise Voltage Vn 10Hz ≤ f ≤ 10kHz, TJ = +25°C – 40 200 µVrms Long Term Stability S TJ = +25°C, Note 2 – 20 50 mV/kHr Oscillator Section (Tested at fosc = 40kHz, RT = 3.6kΩ, CT = 0.001µF, RD = 0Ω unless otherwise specified) Initial Accuracy Frequency Stability with Voltage Frequency Stability with Temperature fosc/VCC TJ = +25°C – ±2 ±6 % +8V ≤ VCC ≤ +35V – ±1 ±2 % – ±3 – % – 50 – Hz fosc/T Minimum Frequency fmin RT = 150kΩ, CT = 0.2µF Maximum Frequency fmax RT = 2kΩ, CT = 1.0nF 400 – – kHz IRT = 2mA 1.7 2.0 2.2 mA 3.0 3.5 – V 0.3 0.5 1.0 µs 1.2 2.0 2.8 V – 1.0 2.5 mA Current Mirror Clock Amplitude Clock Width TJ = +25°C Sync Threshold Sync Input Current Sync Voltage = +3.5V Error Amplifier Section (VCM = +5.1V) Input Offset Voltage VIO – 2.0 10.0 mV Input Bias Current IIB – 1.0 10.0 µA Note 2. Since long term stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. Electrical Characteristics (Cont’d): (VCC = +20V, TA = 0° to +70°C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Unit 60 75 – dB Error Amplifier Section (Cont’d) (VCM = +5.1V) RL ≤ 10MΩ DC Open Loop Gain AVOL Low Level Output Voltage VOL – 0.2 0.5 V High Level Output Voltage VOH 3.8 5.6 – V Common Mode Rejection Ratio CMRR +1.5V≤ VCM ≤ +5.2V 60 75 – dB Power Supply Rejection Ratio PSRR +8V ≤ VCC ≤ +35V 50 60 – dB PWM Comparator Section Minimum Duty Cycle DCmin – – 0 % Maximum Duty Cycle DCmax 45 49 – % 0.6 0.9 – V – 3.3 3.6 V – 0.05 1.0 µA Input Threshold, Zero Duty Cycle VTH Input Threshold, Maximum Duty Cycle Input Bias Current fosc = 40kHz, RT = 3.6kΩ, CT = 0.01µF, RD = 0Ω Ω IIB Soft–Start Section Soft–Start Current Vshutdown = 0V 25 50 80 µA Soft–Start Voltage Vshutdown = 2.0V – 0.4 0.6 V Shutdown Input Current Vshutdown = 2.5V – 0.4 1.0 mA Isink = 20mA – 0.2 0.4 V Isink = 100mA – 1.0 2.0 V Isink = 20mA 18 19 – V Isink = 100mA 17 18 – V VUL V8 and V9 = High 6.0 7.0 8.0 V IC(leak) VC = +35V, Note 3 – – 200 µA Output Drivers (Each Output, VCC = +20V) Output Low Level Output High Level Under Voltage Lockout Collector Leakage VOL VOH Rise Time tr CL = 1.0nF, TJ = +25°C – 100 600 ns Fall Time tf CL = 1.0nF, TJ = +25°C – 50 300 ns Shutdown Delay tds VDS = +3V, CS = 0, TJ = +25°C – 0.2 0.5 µs Supply Current ICC VCC = +35V – 14 20 mA Note 3.Applies to NTE1721 Only, due to polarity of output pulses. Application Information (Shutdown Options): Since both the compensation and soft–start terminals (Pin9 and Pin8) have current source pull–ups, either can readily accept a pull–down signal which only has to sink a maximum of 100µA to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins. An alternate approach is the use of the shutdown circuitry of Pin10 which has been improved to enhance the available shutdown options. Activating this circuit by applying a positive signal on Pin10 performs two functions: the PWM latch is immediately set providing the fastest turn–off signal to the outputs; and a 150µA current sink begins to discharge the external soft–start capacitor. If the shutdown command is short, the PWM signal is terminated without significant discharge of the soft–start capacitor, thus, allowing, for example, a convenient implementation of pulse–by–pulse current limiting. Holding Pin10 high for a longer duration, however, will ultimately discharge this external capacitor, recycling slow turn–on upon release. Pin10 should not be left floating as noise pickup could conceivably interrupt normal operation. Pin Connection Diagram Invert Input 1 16 Vref Non–Invert Input 2 15 VIN Sync 3 14 Output B 13 VC OSC Output 4 CT 5 12 GND RT 6 11 Output A Discharge 7 10 Shutdown Soft–Start 8 9 Compensation 16 9 1 8 .870 (22.0) Max .260 (6.6) Max .200 (5.08) Max .100 (2.54) .700 (17.78) .099 (2.5) Min