NTE834 & NTE834SM Integrated Circuit Low Power Low Offset Voltage Comparator Description: The NTE834 and NTE834SM are precision voltage comparators designed to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also has a unique characteristic in that the input common–mode voltage range includes GND, even though operated from a single power supply voltage. Features: D Wide Single Supply Voltage Range: 2V to 36V D Very Low Supply Current Drain: 0.8mA Typ D Low Input Biasing Current: 25nA D Low Offset Voltage: ±3mV D Low Input Offset Current: ±5nA D Output Voltage Compatible with TTL, DTL, ECL, MOS, and CMOS Logic Systems D Available in Standard 14–Lead DIP (NTE834) and Surface Mount SOIC–14 (NTE834SM) Applications: D Limit Comparators D Simple Analog to Digital Converters D Pulse, Squarewave, and Time Delay Generators Absolute Maximum Ratings: Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V or ±18V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±36V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to +36V Power Dissipation (Note 1), PD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 775mW Derate above +25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2mW/°C Output Short–Circuit to GND (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous Input Current (VIN < –0.3V, Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA Operating Temperature Range, Topr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +70°C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C Lead Temperature (Soldering, 10 seconds), TL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C Electrical Characteristics: (V+ = 5V, –55°C ≤ TA ≤ +125°C, unless otherwise specified) Parameter Test Conditions Min Typ Max Unit Input Offset Voltage TA = +25°C, Note 6 – ±2.0 ±5.0 mV Input Bias Current IIN(+) or IIN(–) with Output in Linear Range, TA = +25°C, Note 4 IIN(+) – IIN(–), TA = +25°C – 25 250 nA – ±5.0 ±50 nA Input Common–Mode Voltage TA = +25°C, Note 5 Range Supply Current RL = ∞ on all Comparators, TA = +25°C 0 – V+ –1.5 V – 0.8 2.0 mA RL ≥ 15kΩ, = 15V (To Support Large VO Swing), TA = +25°C Large Signal Response Time VIN = TTL Logic Swing, VREF = 1.4V, VRL = 5V, RL = 5.1kΩ, TA = +25°C Response Time VRL = 5V, RL = 5.1kΩ, TA = +25°C – 200 – V/mV – 300 – ns – 1.3 – µs 6.0 16 – mA – 250 400 mV – 0.1 – nA – – 9.0 mVDC ±150 nA 400 nA Input Offset Current Voltage Gain V+ Input Offset Voltage VIN(–) ≥ 1V, VIN(+) = 0, VO ≤ 1.5V, TA = +25°C VIN(–) ≥ 1V, VIN(+) = 0, ISINK ≤ 4mA, TA = +25°C VIN(+) ≥ 1V, VIN(–) = 0, VO = 5V, TA = +25°C Note 6 Input Offset Current IIN(+) – IIN(–) – – Input Bias Current IIN(+) or IIN(–) with Output in Linear Range – – Output Sink Current Saturation Voltage Output Leakage Current Input Common Mode Voltage Range Saturation Voltage VIN(–) ≥ 1V, VIN(+) = 0, ISINK ≤ 4mA V+ 0 – –2.0 V – – 700 mV Output Leakage Current VIN(+) ≥ 1V, VIN(–) = 0, VO = 30V – – 1.0 µA Differential Input Voltage All VIN’s ≥ 0V (or V–, if used) – – 36 V Note 1 For operating at high temperatures, these devices must be derated based on a +125°C maximum junction temperature and a thermal resistance of +175°C/W which applies for the device soldered to a printed circuit board, operating in ambient still air. The low bias dissipation and the “ON–OFF” characteristic of the outputs keeps the chip dissipation very low (PD ≤ 100mW), provided the output transistors are allowed to saturate. Note 2 Short circuits from the output to V+ can cause excessive heating and eventual destruction. The maximum output current is approximately 20mA independent of the magnitude of V+. Note 3 This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector–base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. Note 4 The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference to input lines. Note 5 The input common–mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end of the common–mode voltage range is V+ –1.5V, but either or both inputs can go to +30V without damage. Note 6. At output switch point, VO ≅ 1.4V, RS = 0Ω with V+ from 5V; and over the full input common– mode range (0V to V+ – 1.5V). Pin Connection Diagram Output 2 1 14 Output 3 Output 1 V (+) 2 3 13 Output 4 12 GND Input 1 (–) 4 11 Input 4 (+) Input 1 (+) 5 10 Input 4 (–) Input 2 (–) Input 2 (+) 6 7 9 8 Input 3 (+) Input 3 (–) NTE834 (14–Lead DIP) 14 8 1 7 .785 (19.95) Max .300 (7.62) .200 (5.08) Max .100 (2.45) .099 (2.5) Min .600 (15.24) NTE834SM (SOIC–14) .340 (8.64) 14 8 1 7 .050 (1.27) .236 (5.99) .154 (3.91) 016 (.406) 061 (1.53) .006 (.152) NOTE: Pin1 on Beveled Edge .198 (5.03)