PM5382 S/UNI®-16x155 Advance 16-Channel OC-3c ATM and POS Physical Layer Device PMC-2001825 (A1) APPLICATIONS • ATM and Multiservice Switches, Routers, and Switch/Routers. • SONET/SDH Add/Drop Multiplexers with data processing capabilities • Uplink Cards. • SONET/SDH ATM/POS Test Equipment. • SONET/SDH Transport Equipment. Rx Line O/H Processor Section/ Line DCC Extraction Sync Status, BERM JTAG Test Access Port External APS Interface Tx ATM Cell Processor Section Trace Buffer Rx Path O/H Processor Tx POS Frame Processor Tx ATM Cell Processor UTOPIA Level 3/ POS-PHY Level 3 System Interface Rx Section O/H Processor Tx POS Frame Processor TFCLK TENB TADR[3:0] TSX TCA/TPA STPA TSOC/TSOP TPRTY TDAT[31:0] TMOD[1:0] TEOP TERR RFCLK RENB RADR[3:0] RSX RCA/RVAL RSOC/RSOP RPRTY RDAT[31:0] RMOD[1:0] REOP RERR Microprocessor Interface PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE POS_ATMB WAN Sync. Path Crossbar/ APS Cross Connect Section Trace Buffer Tx Path O/H Processor APREF0,APREF1 APECLV APSI[3:0]+/APSO[3:0]+/- Tx Line O/H Processor TDO TDI TMS TCK TRSTB Tx Section O/H Processor RDCLK[15:0] RDCC[15:0] RALARM[15:0] RFPO RCLK Section Line Interface Section/ Line DCC Insertion TXD[15:0]+/RXD[15:0]+/SD[15:0] REFCLK+/TDREF1, TDREF0 ATP[1:0] QAVD QAVS AVD[8:0] AVS[8:0] SPECLV SDTTL • Provides a generic 16-bit microprocessor bus interface for configuration, control, and status monitoring. • Low power 2.5 V CMOS core logic with 3.3 V CMOS/TTL compatible digital inputs and digital outputs. PECL inputs and outputs are 3.3 V compatible. • Industrial temperature range (-40 °C to +85 °C). • 520 pin SBGA package. • Pin and software compatible with the PM5358 S/UNI-4x622. TFPO TFPI TDCLK[15:0] BLOCK DIAGRAM TDCC[15:0] • Single chip 16-channel ATM and POS User Network Interface operating at 155 Mbit/s. • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Recommendation I.432. • Implements the Point-to-Point Protocol (PPP) over SONET/SDH specification according to RFC 2615(1619)/1662 of the PPP Working Group of the Internet Engineering Task Force (IETF). • Processes sixteen bit-serial 155 Mbit/s STS-3c (STM-1) data streams with onchip clock and data recovery and clock synthesis. • Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer and intrinsic jitter criteria. • Each channel provides termination for SONET Section, Line and Path overhead or SDH Regenerator Section, Multiplexer Section and High TCLK Order Path overhead. • Provides UTOPIA Level 3 32-bit wide System Interface (clocked up to 104 MHz) with parity support for ATM applications. • Provides SATURN® POS-PHY Level 3™ 32-bit System Interface (clocked up to 104 MHz) for Packet over SONET (POS), or ATM applications. • Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from the line side transmit stream to the line side receive stream interface. • Provides support for automatic protection switching including a bidirectional 4-bit PECL 622 MHz port for external APS with mate device. • Built-in APS cross-connect for internal and external 1+1 and 1:n protection switching. • Provides a standard five signal IEEE 1149.1 JTAG test port for boundary scan board test purposes. D [7:0] A [13:0] ALE CSB WRB RDB RSTB INTB FEATURES © Copyright PMC-Sierra, Inc. 2000. Advance PM5382 S/UNI®-16x155 16-Channel OC-3c ATM and POS Physical Layer Device TYPICAL APPLICATIONS TYPICAL STS-3C/STM-1 ATM SWITCH PORT APPLICATION ATM Layer Device UTOPIA Level 3 Interface PM5382 S/UNI-16x155 TxClk TFCLK RXD[0]+/SD[0] TxEnb TENB TXD[0]+/- Optical Transceiver 155 Mbit/s Optical Transceiver 155 Mbit/s TADR[1:0] TxAdr[1:0] TxClav TCA TxSOC TSOC RXD[1]+/SD[1] TxPrty TPRTY TXD[1]+/- TDAT[31:0] TxData[31:0] RxClk RFCLK RxEnb RENB RxAddr[1:0] • • • RADR[1:0] RxClav RCA RxSOC RSOC RxPrty RPRTY RXD[15]+/SD[15] RDAT[31:0] TXD[15]+/- RxData[31:0] Optical Transceiver 155 Mbit/s TYPICAL STS-3C/STM-1 PACKET-OVER-SONET/SDH APPLICATION Link Layer Device TFCLK TENB TSX TPRTY PM5382 S/UNI-16x155 TFCLK TENB TSX TPRTY TDAT[31:0] TDAT[31:0] TMOD[1:0] TMOD[1:0] RXD[0]+/SD[0] TSOP RXD[1]+/SD[1] TEOP TEOP TXD[1]+/- TERR PTPA STPA STPA RENB RSX RVAL RPRTY RDAT[31:0] RSOP REOP RERR 155 Mbit/s Optical Transceiver 155 Mbit/s TERR • • • TADR[1:0] PTPA RFCLK Optical Transceiver TXD[0]+/- TSOP TADR[1:0] Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 POS-PHY Level 3 Interface RFCLK RENB RSX RVAL RXD[15]+/SD[15] RPRTY TXD[15]+/- Optical Transceiver 155 Mbit/s RDAT[31:0] RSOP REOP RERR To order documentation, send email to: [email protected] or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: [email protected] PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE PMC-2001825 (A1) © Copyright PMC-Sierra, Inc. 2000. All rights reserved. SATURN and S/UNI are registered trademarks of PMC-Sierra, Inc. POS-PHY Level 3 is a trademark of PMC-Sierra, Inc.