POINN TISP2150F3

TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
Copyright © 1997, Power Innovations Limited, UK
MARCH 1994 - REVISED SEPTEMBER 1997
TELECOMMUNICATION SYSTEM SECONDARY PROTECTION
●
Ion-Implanted Breakdown Region
Precise and Stable Voltage
Low Voltage Overshoot under Surge
DEVICE
VDRM
T
1
8
G
V(BO)
NC
2
7
G
NC
3
6
G
R
4
5
G
V
V
‘2125F3
100
125
‘2150F3
120
150
‘2180F3
145
180
P PACKAGE
(TOP VIEW)
Planar Passivated Junctions
Low Off-State Current < 10 µA
●
Rated for International Surge Wave Shapes
STANDARD
8
T
G
2
7
G
A
G
3
6
G
R
4
5
R
ITSP
FCC Part 68
175
ANSI C62.41
120
10/160 µs
FCC Part 68
60
10/560 µs
FCC Part 68
45
0.5/700 µs
RLM 88
38
FTZ R12
50
VDE 0433
50
CCITT IX K17/K20
50
REA PE-60
35
Surface Mount and Through-Hole Options
PACKAGE
PART # SUFFIX
Small-outline
D
Small-outline taped
and reeled
●
1
8/20 µs
10/1000 µs
●
T
2/10 µs
10/700 µs
MDXXAE
NC - No internal connection
●
WAVE SHAPE
D PACKAGE
(TOP VIEW)
Specified T terminal ratings require connection of pins 1 and 8.
Specified R terminal ratings require connection of pins 4 and 5.
SL PACKAGE
(TOP VIEW)
T
1
G
2
R
3
MDXXAG
P
Single-in-line
SL
MD23AA
device symbol
DR
Plastic DIP
MDXXAF
T
R
UL Recognized, E132482
description
These medium voltage dual symmetrical
transient voltage suppressor devices are
designed to protect ISDN and telecommunication
applications with battery backed ringing against
transients caused by lightning strikes and a.c.
power lines. Offered in three voltage variants to
meet battery and protection requirements they
are guaranteed to suppress and withstand the
listed international lightning surges in both
polarities. Transients are initially clipped by
breakdown clamping until the voltage rises to the
breakover level, which causes the device to
PRODUCT
SD2XAA
G
Terminals T, R and G correspond to the
alternative line designators of A, B and C
crowbar. The high crowbar holding current
prevents d.c. latchup as the current subsides.
These monolithic protection devices are
fabricated in ion-implanted planar structures to
ensure precise and matched breakover control
INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
description (Continued)
and are virtually transparent to the system in normal operation
The small-outline 8-pin assignment has been carefully chosen for the TISP series to maximise the inter-pin
clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand
ratings.
absolute maximum ratings
RATING
SYMBOL
‘2125F3
Repetitive peak off-state voltage (0°C < TJ < 70°C)
‘2125F3
VALUE
UNIT
± 100
VDRM
± 120
‘2180F3
V
± 145
Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3)
1/2 µs (Gas tube differential transient, open-circuit voltage wave shape 1/2 µs)
350
2/10 µs (FCC Part 68, open-circuit voltage wave shape 2/10 µs)
175
8/20 µs (ANSI C62.41, open-circuit voltage wave shape 1.2/50 µs)
120
10/160 µs (FCC Part 68, open-circuit voltage wave shape 10/160 µs)
60
5/200 µs (VDE 0433, open-circuit voltage wave shape 2 kV, 10/700 µs)
0.5/310 µs (RLM 88, open-circuit voltage wave shape 1.5 kV, 0.5/700 µs)
38
5/310 µs (CCITT IX K17/K20, open-circuit voltage wave shape 2 kV, 10/700 µs)
50
5/310 µs (FTZ R12, open-circuit voltage wave shape 2 kV, 10/700 µs)
50
10/560 µs (FCC Part 68, open-circuit voltage wave shape 10/560 µs)
45
10/1000 µs (REA PE-60, open-circuit voltage wave shape 10/1000 µs)
Non-repetitive peak on-state current (see Notes 2 and 3)
50 Hz,
35
4
D Package
1s
P Package
6
ITSM
SL Package
Initial rate of rise of on-state current,
A
50
ITSP
Linear current ramp, Maximum ramp value < 38 A
A rms
6
diF/dt
250
A/µs
TJ
-40 to +150
°C
Tstg
-40 to +150
°C
Junction temperature
Storage temperature range
NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section.
2. Initially the TISP must be in thermal equilibrium with 0°C < TJ <70°C. The surge may be repeated after the TISP returns to its initial
conditions.
3. Above 70°C, derate linearly to zero at 150°C lead temperature.
electrical characteristics for the T and R terminals, TJ = 25°C
PARAMETER
IDRM
ID
TEST CONDITIONS
Repetitive peak offstate current
Off-state current
TISP2150F3
TISP2180F3
MIN
MIN
MIN
VD = ±VDRM, 0°C < TJ < 70°C
VD = ±50 V
f = 100 kHz, Vd = 100 mV
Coff
TISP2125F3
Off-state capacitance
Third terminal voltage = 0
MAX
MAX
MAX
UNIT
±10
±10
±10
µA
±10
±10
±10
µA
35
pF
VD = 0,
20†
35
20†
35
20†
(see Notes 4 and 5)
NOTES: 4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is
connected to the guard terminal of the bridge.
5. Further details on capacitance are given in the Applications Information section.
† Typical value of the parameter, not a limit value.
PRODUCT
2
INFORMATION
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
electrical characteristics for the T and G or the R and G terminals, TJ = 25°C
PARAMETER
IDRM
TEST CONDITIONS
Repetitive peak offstate current
TISP2125F3
TISP2150F3
TISP2180F3
MIN
MIN
MIN
VD = ±VDRM , 0°C < TJ < 70°C
MAX
MAX
MAX
UNIT
±10
±10
±10
µA
±125
±150
±180
V
±143†
±168†
±198†
V
±0.6
A
±3
V
dv/dt = ±250 V/ms,
V(BO)
V(BO)
Breakover voltage
Source Resistance = 300 Ω
Impulse breakover volt- dv/dt = ±1000 V/µs,
di/dt < 20 A/µs
Source Resistance = 50 Ω
age
dv/dt = ±250 V/ms,
I(BO)
Breakover current
VT
On-state voltage
IT = ±5 A, tW = 100 µs
IH
Holding current
di/dt = -/+30 mA/ms
Critical rate of rise of
Linear voltage ramp,
off-state voltage
Maximum ramp value < 0.85V(BR)MIN
dv/dt
ID
Off-state current
Off-state capacitance
±0.6
±0.15
±3
±0.6
±0.15
±3
±0.15
±0.15
±0.15
A
±5
±5
±5
kV/µs
VD = ±50 V
±10
µA
VD = 0,
52†
±10
90
52†
90
52†
90
pF
Third terminal voltage = 0
VD = -5 V
26†
45
26†
45
26†
45
pF
(see Notes 6 and 7)
VD = -50 V
11†
20
11†
20
11†
20
pF
f = 100 kHz,
Coff
±0.15
Source Resistance = 300 Ω
Vd = 100 mV
±10
NOTES: 6 These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is
connected to the guard terminal of the bridge.
7. Further details on capacitance are given in the Applications Information section.
† Typical value of the parameter, not a limit value.
thermal characteristics
MIN
PARAMETER
RθJA
Junction to free air thermal resistance
PRODUCT
TYP
MAX
D Package
160
P Package
100
SL Package
105
UNIT
°C/W
INFORMATION
3
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
ITSP
Switching
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
V(BR)M
VDRM
-v
VD
ID
ID
I(BR)
V(BR)
V(BR)
I(BR)
IDRM
VD
IDRM
+v
VDRM
V(BR)M
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR ANY PAIR OF TERMINALS
The high level characteristics for terminals R and T are not guaranteed.
PRODUCT
4
INFORMATION
PMXXAA
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and G, or R and G terminals
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
TC2MAO
TC2MAL
100
Normalised to V(BR)
Normalised Breakdown Voltages
1.2
ID - Off-State Current - µA
10
1
VD = 50 V
VD = -50 V
0·1
0·01
0·001
I(BR) = 100 µA and 25°C
Positive Polarity
V(BO)
1.1
V(BR)M
1.0
V(BR)
0.9
-25
0
25
50
75
100
125
TJ - Junction Temperature - °C
Figure 2.
PRODUCT
150
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
Figure 3.
INFORMATION
5
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and G, or R and G terminals
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
TC2MAP
TC2MAQ
100
Normalised to V(BR)
I(BR) = 100 µA and 25°C
Negative Polarity
1.1
IT - On-State Current - A
Normalised Breakdown Voltages
1.2
V(BO)
V(BR)M
1.0
10
V(BR)
25°C
150°C
0.9
-25
0
25
50
75
100
125
150
1
2
TJ - Junction Temperature - °C
5
6
7 8 9 10
NORMALISED BREAKOVER VOLTAGE
vs
RATE OF RISE OF PRINCIPLE CURRENT
TC2MAM
1.0
0.9
0.8
0.7
I(BO)
0.5
0.4
0.3
IH
0.2
TC2MAF
1.3
Normalised Breakover Voltage
IH, I(BO) - Holding Current, Breakover Current - A
4
Figure 5.
HOLDING CURRENT & BREAKOVER CURRENT
vs
JUNCTION TEMPERATURE
0.6
3
VT - On-State Voltage - V
Figure 4.
1.2
1.1
Negative
Positive
0.1
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
Figure 6.
PRODUCT
6
-40°C
1
INFORMATION
1.0
0·001
0·01
0·1
1
10
di/dt - Rate of Rise of Principle Current - A/µs
Figure 7.
100
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and G, or R and G terminals
OFF-STATE CAPACITANCE
vs
TERMINAL VOLTAGE (POSITIVE)
100
OFF-STATE CAPACITANCE
vs
TERMINAL VOLTAGE (NEGATIVE)
TC2MAB
TC2MAD
100
Third Terminal Bias = -50 V
Third Terminal Bias = -50 V
Off-State Capacitance - pF
Off-State Capacitance - pF
Third Terminal Bias = 0
10
Third Terminal Bias = 50 V
1
0·1
1
10
Third Terminal Bias = 0
10
Third Terminal Bias = 50 V
1
0·1
50
1
Terminal Voltage (Positive) - V
10
50
Terminal Voltage (Negative) - V
Figure 8.
Figure 9.
OFF-STATE CAPACITANCE
vs
JUNCTION TEMPERATURE
100
TC2MAH
Off-State Capacitance - pF
Third Terminal Bias = 50 V
Terminal Bias = 50 V
10
Terminal Bias = 0
Terminal Bias = -50 V
1
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
Figure 10.
PRODUCT
INFORMATION
7
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and G, or R and G terminals
OFF-STATE CAPACITANCE
vs
JUNCTION TEMPERATURE
500
OFF-STATE CAPACITANCE
vs
JUNCTION TEMPERATURE
TC2MAI
Third Terminal Bias = -50 V
Off-State Capacitance - pF
Third Terminal Bias = 0
Off-State Capacitance - pF
TC2MAJ
500
100
Terminal Bias = 0
100
Terminal Bias = 0
Terminal Bias = 50 V
Terminal Bias = 50 V
Terminal Bias = -50 V
Terminal Bias = -50 V
10
10
-25
0
25
50
75
100
125
150
-25
TJ - Junction Temperature - °C
25
Figure 12.
SURGE CURRENT
vs
DECAY TIME
1000
TC2MAA
100
10
2
10
100
Decay Time - µs
Figure 13.
PRODUCT
8
50
75
100
TJ - Junction Temperature - °C
Figure 11.
Maximum Surge Current - A
0
INFORMATION
1000
125
150
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and R terminals
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
100
NORMALISED BREAKDOWN VOLTAGES
vs
JUNCTION TEMPERATURE
TC2MAK
TC2MAN
VD = ±50 V
Normalised to V(BR)
Normalised Breakdown Voltages
1.2
ID - Off-State Current - µA
10
1
0·1
0·01
0·001
I(BR) = 100 µA and 25°C
Both Polarities
V(BO)
1.1
V(BR)M
1.0
V(BR)
0.9
-25
0
25
50
75
100
125
150
-25
0
TJ - Junction Temperature - °C
25
50
75
100
125
150
TJ - Junction Temperature - °C
Figure 14.
Figure 15.
NORMALISED BREAKOVER VOLTAGE
vs
RATE OF RISE OF PRINCIPLE CURRENT
TC2MAG
Normalised Breakover Voltage
2.5
2.0
1.5
1.0
0·001
0·01
0·1
1
10
100
di/dt - Rate of Rise of Principle Current - A/µs
Figure 16.
PRODUCT
INFORMATION
9
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
TYPICAL CHARACTERISTICS
T and R terminals
OFF-STATE CAPACITANCE
vs
TERMINAL VOLTAGE (POSITIVE)
OFF-STATE CAPACITANCE
vs
TERMINAL VOLTAGE (NEGATIVE)
TC2MAC
100
Third Terminal Bias = -50 V
Off-State Capacitance - pF
Off-State Capacitance - pF
Third Terminal Bias = -50 V
10
Third Terminal Bias = 0
1
Third Terminal Bias = 50 V
0·1
0·1
TC2MAE
100
1
10
10
Third Terminal Bias = 0
1
Third Terminal Bias = 50 V
0·1
0·1
50
Terminal Voltage (Positive) - V
1
10
50
Terminal Voltage (Negative) - V
Figure 17.
Figure 18.
THERMAL INFORMATION
VGEN = 250 Vrms
RGEN = 10 to 150 Ω
10
SL Package
P Package
D Package
1
0·1
1
10
100
1000
t - Current Duration - s
Figure 19.
PRODUCT
10
THERMAL RESPONSE
TI2MAA
ZθJΑΑ - Transient Thermal Impedance - °C/W
ITRMS - Maximum Non-Recurrent 50 Hz Current - A
MAXIMUM NON-RECURRING 50 Hz CURRENT
vs
CURRENT DURATION
TI2MAA
INFORMATION
100
D Package
P Package
SL Package
10
1
0·0001 0·001
0·01
0·1
1
10
t - Power Pulse Duration - s
Figure 20.
100
1000
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
electrical characteristics
The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a
characteristic value will depend on the junction temperature at the instant of measurement. The values given
in this data sheet were measured on commercial testers, which generally minimise the temperature rise
caused by testing. Application values may be calculated from the parameters’ temperature curves, the power
dissipated and the thermal response curve (Zθ ).
lightning surge
wave shape notation
Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an
exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage
or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave
shape is amplitude, rise time/decay time. A 50A, 5/310 µs wave shape would have a peak current value of
50 A, a rise time of 5 µs and a decay time of 310 µs. The TISP surge current graph comprehends the wave
shapes of commonly used surges.
generators
There are three categories of surge generator type, single wave shape, combination wave shape and circuit
defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage
and short circuit current (e.g. 10/1000 µs open circuit voltage and short circuit current). Combination
generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current
(e.g. 1.2/50 µs open circuit voltage and 8/20 µs short circuit current) Circuit specified generators usually
equate to a combination generator, although typically only the open circuit voltage waveshape is referenced
(e.g. a 10/700 µs open circuit voltage generator typically produces a 5/310 µs short circuit current). If the
combination or circuit defined generators operate into a finite resistance the wave shape produced is
intermediate between the open circuit and short circuit values.
current rating
When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave
shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to
assess the required TISP surge capability. As an example, the CCITT IX K17 1.5 kV, 10/700 µs surge is
changed to a 38 A, 5/310 µs waveshape when driving into a short circuit. Thus the TISP surge current
capability, when directly connected to the generator, will be found for the CCITT IX K17 waveform at 310 µs
on the surge graph and not 700 µs. Some common short circuit equivalents are tabulated below:
STANDARD
OPEN CIRCUIT
VOLTAGE
SHORT CIRCUIT
CURRENT
CCITT IX K17
CCITT IX K20
RLM88
VDE 0433
FTZ R12
1.5 kV, 10/700 µs
1 kV, 10/700 µs
1.5 kV, 0.5/700 µs
2.0 kV, 10/700 µs
2.0 kV, 10/700 µs
38 A, 5/310 µs
25 A, 5/310 µs
38 A, 0.2/310 µs
50 A, 5/200 µs
50 A, 5/310 µs
Any series resistance in the protected equipment will reduce the peak circuit current to less than the
generators’ short circuit value. A 2 kV open circuit voltage, 50 A short circuit current generator has an
effective output impedance of 40 Ω (2000/50). If the equipment has a series resistance of 25 Ω then the
surge current requirement of the TISP becomes 31 A (2000/65) and not 50 A.
PRODUCT
INFORMATION
11
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
protection voltage
The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This
increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its
breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate
V(BO) (250 V/ms) value by the normalised increase at the surge’s di/dt (Figure 7.) . An estimate of the di/dt
can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance.
As an example, the CCITT IX K17 1.5 kV, 10/700 µs surge has an average dv/dt of 150 V/µs, but, as the rise
is exponential, the initial dv/dt is higher, being in the region of 450 V/µs. The instantaneous generator output
resistance is 25 Ω. If the equipment has an additional series resistance of 20 Ω, the total series resistance
becomes 45 Ω. The maximum di/dt then can be estimated as 450/45 = 10 A/µs. In practice the
measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope
resistance of the TISP breakdown region.
capacitance
off-state capacitance
The off-state capacitance of a TISP is sensitive to junction temperature, TJ , and the bias voltage, comprising
of the dc voltage, VD , and the ac voltage, Vd . All the capacitance values in this data sheet are measured
with an ac voltage of 100 mV. The typical 25°C variation of capacitance value with ac bias is shown in Figure
21. When VD >> Vd the capacitance value is independent on the value of Vd . The capacitance is essentially
constant over the range of normal telecommunication frequencies.
NORMALISED CAPACITANCE
vs
RMS AC TEST VOLTAGE
1.05
AIXXAA
Normalised Capacitance
1.00
0.95
0.90
0.85
0.80
Normalised to Vd = 100 mV
0.75
DC Bias, VD = 0
0.70
1
10
100
Vd - RMS AC Test Voltage - mV
Figure 21.
PRODUCT
12
INFORMATION
1000
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
APPLICATIONS INFORMATION
longitudinal balance
Figure 22 shows a three terminal TISP with its equivalent "delta" capacitance Each capacitance, CTG , CRG
and CTR , is the true terminal pair capacitance measured with a three terminal or guarded capacitance
bridge. If wire R is biased at a larger potential than wire T then CTG > CRG . Capacitance CTG is equivalent to
a capacitance of CRG in parallel with the capacitive difference of (C TG - CRG ). The line capacitive unbalance
is due to (CTG - CRG ) and the capacitance shunting the line is CTR + CRG/2 .
Figure 22.
All capacitance measurements in this data sheet are three terminal guarded to allow the designer to
accurately assess capacitive unbalance effects. Simple two terminal capacitance meters (unguarded third
terminal) give false readings as the shunt capacitance via the third terminal is included.
PRODUCT
INFORMATION
13
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008
plastic small-outline package
This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
D008
Designation per JEDEC Std 30:
PDSO-G8
5,00 (0.197)
4,80 (0.189)
8
7
6
5
1
2
3
4
6,20 (0.244)
5,80 (0.228)
4,00 (0.157)
3,81 (0.150)
7° NOM
3 Places
1,75 (0.069)
1,35 (0.053)
0,50 (0.020)
x 45°NOM
0,25 (0.010)
0,203 (0.008)
0,102 (0.004)
0,79 (0.031)
0,28 (0.011)
7° NOM
4 Places
0,51 (0.020)
0,36 (0.014)
8 Places
Pin Spacing
1,27 (0.050)
(see Note A)
6 Places
5,21 (0.205)
4,60 (0.181)
0,229 (0.0090)
0,190 (0.0075)
4° ± 4°
1,12 (0.044)
0,51 (0.020)
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTES: A.
B.
C.
D.
Leads are within 0,25 (0.010) radius of true position at maximum material condition.
Body dimensions do not include mold flash or protrusion.
Mold flash or protrusion shall not exceed 0,15 (0.006).
Lead tips to be planar within ±0,051 (0.002).
PRODUCT
14
INFORMATION
MDXXAA
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
P008
plastic dual-in-line package
This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions The package is intended for
insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted,
sufficient tension is provided to secure the package in the board during soldering. Leads require no
additional cleaning or processing when used in soldered assembly.
P008
Designation per JEDEC Std 30:
PDIP-T8
10,2 (0.400) MAX
8
7
6
5
Index
Dot
C
L
1
2
3
C
L
7,87 (0.310)
7,37 (0.290)
T.P.
4
6,60 (0.260)
6,10 (0.240)
1,78 (0.070) MAX
4 Places
5,08 (0.200)
MAX
Seating
Plane
0,51 (0.020)
MIN
3,17 (0.125)
MIN
2,54 (0.100) T.P.
6 Places
(see Note A)
0,533 (0.021)
0,381 (0.015)
8 Places
105°
90°
8 Places
0,36 (0.014)
0,20 (0.008)
8 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position
PRODUCT
MDXXABA
INFORMATION
15
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
SL003
3-pin plastic single-in-line package
This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SL003
4,57 (0.180)
MAX
10,2 (0.400) MAX
6,60 (0.260)
6,10 (0.240)
8,31 (0.327)
MAX
Index
Dot
12,9 (0.492)
MAX
4,267 (0.168)
MIN
1
1,854 (0.073) MAX
2
3
Pin Spacing
2,54 (0.100) T.P.
(see Note A)
2 Places
0,356 (0.014)
0,203 (0.008)
3 Places
0,711 (0.028)
0,559 (0.022)
3 Places
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position.
B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane.
PRODUCT
16
INFORMATION
MDXXAD
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
MECHANICAL DATA
D008
tape dimensions
D008 Package (8 pin SOIC) Single-Sprocket Tape
4,10
3,90
8,05
7,95
1,60
1,50
2,05
1,95
0,40
0,8 MIN.
5,55
5,45
6,50
6,30
Direction of Feed
Embossment
Cover
0 MIN.
ø 1,5 MIN.
Carrier Tape
12,30
11,70
Tape
2,2
2,0
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter:
Reel hub diameter:
Reel axial hole:
MDXXAT
330 +0,0/-4,0 mm
100 ±2,0 mm
13,0 ±0,2 mm
B. 2500 devices are on a reel.
PRODUCT
INFORMATION
17
TISP2125F3, TISP2150F3, TISP2180F3
DUAL SYMMETRICAL TRANSIENT
VOLTAGE SUPPRESSORS
MARCH 1994 - REVISED SEPTEMBER 1997
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any
semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the
information being relied on is current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI
deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except as mandated by government requirements.
PI accepts no liability for applications assistance, customer product design, software performance, or infringement
of patents or services described herein. Nor is any license, either express or implied, granted under any patent
right, copyright, design right, or other intellectual property right of PI covering or relating to any combination,
machine, or process in which such semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE
SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1997, Power Innovations Limited
PRODUCT
18
INFORMATION