TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS Copyright © 1997, Power Innovations Limited, UK MARCH 1994 - REVISED SEPTEMBER 1997 TELECOMMUNICATION SYSTEM SECONDARY PROTECTION ● Ion-Implanted Breakdown Region Precise and Stable Voltage Low Voltage Overshoot under Surge T 1 8 R VDRM V(BO) T 2 7 R V V T 3 6 R ‘4072F3 58 72 T 4 5 R ‘4082F3 66 82 DEVICE ● ● D PACKAGE (TOP VIEW) Specified ratings require the connection of pins 1, 2, 3 and 4 for the T terminal. Planar Passivated Junctions Low Off-State Current < 10 µA SL PACKAGE (TOP VIEW) Rated for International Surge Wave Shapes WAVE SHAPE STANDARD ITSP FCC Part 68 8/20 µs ANSI C62.41 70 10/160 µs FCC Part 68 60 10/560 µs FCC Part 68 45 10/700 µs 1 R 2 80 RLM 88 38 FTZ R12 50 VDE 0433 50 CCITT IX K17/K20 50 REA PE-60 35 10/1000 µs T A 2/10 µs 0.5/700 µs MDXXAH MD4XAA device symbol D PACKAGE 3 SL PACKAGE T T 1 2 T 1 Surface Mount and Through-Hole Options PACKAGE PART # SUFFIX Small-outline D Small-outline taped and reeled Single-in-line ● T T 4 ● MDXXAI DR SL 5 6 R 8 7 R R 2 R R SD4XAE Terminals T and R correspond to the alternative line designators of A and B UL Recognized, E132482 description These low voltage symmetrical transient voltage suppressor devices are designed to protect two wire telecommunication applications against transients caused by lightning strikes and a.c. power lines. Offered in two voltage variants to meet battery and protection requirements they are guaranteed to suppress and withstand the listed international lightning surges in both polarities. Transients are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar. The high crowbar holding current prevents d.c. latchup as the current subsides. PRODUCT These monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation The small-outline 8-pin assignment has been carefully chosen for the TISP series to maximise the inter-pin clearance and creepage distances which are used by standards (e.g. IEC950) to establish voltage withstand ratings. INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 absolute maximum ratings RATING SYMBOL ‘4072F3 Repetitive peak off-state voltage (0°C < TJ < 70°C) VALUE ± 58 VDRM ‘4082F3 UNIT V ± 66 Non-repetitive peak on-state pulse current (see Notes 1, 2 and 3) 1/2 µs (Gas tube differential transient, open-circuit voltage wave shape 1/2 µs) 120 2/10 µs (FCC Part 68, open-circuit voltage wave shape 2/10 µs) 80 8/20 µs (ANSI C62.41, open-circuit voltage wave shape 1.2/50 µs) 70 10/160 µs (FCC Part 68, open-circuit voltage wave shape 10/160 µs) 60 5/200 µs (VDE 0433, open-circuit voltage wave shape 2 kV, 10/700 µs) 0.2/310 µs (RLM 88, open-circuit voltage wave shape 1.5 kV, 0.5/700 µs) 38 5/310 µs (CCITT IX K17/K20, open-circuit voltage wave shape 2 kV, 10/700 µs) 50 5/310 µs (FTZ R12, open-circuit voltage wave shape 2 kV, 10/700 µs) 50 10/560 µs (FCC Part 68, open-circuit voltage wave shape 10/560 µs) 45 10/1000 µs (REA PE-60, open-circuit voltage wave shape 10/1000 µs) 35 Non-repetitive peak on-state current (see Notes 2 and 3) 50 Hz, D Package 1s 4 ITSM SL Package Initial rate of rise of on-state current, A 50 ITSP Linear current ramp, Maximum ramp value < 38 A A rms 6 diT/dt 250 A/µs TJ -40 to +150 °C Tstg -40 to +150 °C Junction temperature Storage temperature range NOTES: 1. Further details on surge wave shapes are contained in the Applications Information section. 2. Initially the TISP must be in thermal equilibrium with 0°C < TJ <70°C. The surge may be repeated after the TISP returns to its initial conditions. 3. Above 70°C, derate linearly to zero at 150°C lead temperature. electrical characteristics for the T and R terminals, TJ = 25°C TISP4072F3 PARAMETER IDRM V(BO) V(BO) TEST CONDITIONS Repetitive peak offstate current Breakover voltage MIN UNIT dv/dt = ±250 V/ms, RSOURCE = 300 Ω ±72 ±82 V age di/dt < 20 A/µs RSOURCE = 50 Ω, dv/dt = ±250 V/ms, RSOURCE = 300 Ω On-state voltage IT = ±5 A, tW = 100 µs IH Holding current di/dt = +/-30 mA/ms Critical rate of rise of Linear voltage ramp off-state voltage Maximum ramp value < 0.85V(BR)MIN Off-state current VD = ±50 V NOTE MAX µA Impulse breakover volt- dv/dt = ±1000 V/µs, Off-state capacitance TYP ±10 Breakover current Coff MIN ±10 I(BO) ID MAX VD = ±VDRM , 0°C < TJ < 70°C VT dv/dt TYP TISP4082F3 f = 100 kHz, ±86 ±0.15 ±96 ±0.6 ±0.15 ±3 (see Note 4) ±0.6 A ±3 V ±0.15 ±0.15 A ±5 ±5 kV/µs ±10 Vd = 100 mV V ±10 µA VD = 0, 82 140 82 140 pF VD = -5 V 49 85 49 85 pF VD = -50 V 25 40 25 40 pF TYP MAX UNIT 4: Further details on capacitance are given in the Applications Information section. thermal characteristics PARAMETER RθJA Junction to free air thermal resistance PRODUCT 2 TEST CONDITIONS MIN Ptot = 0.8 W, TA = 25°C D Package 160 5 cm2, FR4 PCB SL Package 105 INFORMATION °C/W TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 PARAMETER MEASUREMENT INFORMATION +i Quadrant I ITSP Switching Characteristic ITSM IT V(BO) VT I(BO) IH V(BR)M ID VD VDRM -v ID I(BR) V(BR) I(BR) IDRM IDRM VD +v VDRM V(BR)M V(BR) IH I(BO) VT V(BO) IT ITSM Quadrant III ITSP Switching Characteristic -i PMXXAA Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL PRODUCT INFORMATION 3 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and T terminals OFF-STATE CURRENT vs JUNCTION TEMPERATURE 100 NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE TC3LAF TC3LAI Normalised to V(BR) I(BR) = 100 µA and 25°C Normalised Breakdown Voltages 1.2 ID - Off-State Current - µA 10 1 VD = 50 V 0·1 VD = -50 V 0·01 0·001 Positive Polarity 1.1 V(BR)M V(BO) 1.0 V(BR) 0.9 -25 0 25 50 75 100 125 150 -25 TJ - Junction Temperature - °C 0 25 50 75 100 125 150 TJ - Junction Temperature - °C Figure 2. Figure 3. NORMALISED BREAKDOWN VOLTAGES vs JUNCTION TEMPERATURE TC3LAJ ON-STATE CURRENT vs ON-STATE VOLTAGE 100 TC3MAL Normalised to V(BR) I(BR) = 100 µA and 25°C Negative Polarity IT - On-State Current - A Normalised Breakdown Voltages 1.2 1.1 V(BR)M V(BO) 1.0 10 V(BR) 25°C 150°C -40°C 0.9 1 -25 0 25 50 75 100 125 150 TJ - Junction Temperature - °C Figure 4. PRODUCT 4 INFORMATION 1 2 3 4 5 VT - On-State Voltage - V Figure 5. 6 7 8 9 10 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and T terminals NORMALISED BREAKOVER VOLTAGE vs RATE OF RISE OF PRINCIPLE CURRENT TC3LAH 1.0 0.9 0.8 0.7 0.6 0.5 I(BO) 0.4 0.3 IH 0.2 0.1 -25 0 25 50 75 100 125 TC3LAB 1.3 Normalised Breakover Voltage IH, I(BO) - Holding Current, Breakover Current - A HOLDING CURRENT & BREAKOVER CURRENT vs JUNCTION TEMPERATURE 1.2 Positive 1.1 Negative 1.0 0·001 150 TJ - Junction Temperature - °C 0·01 0·1 1 10 100 di/dt - Rate of Rise of Principle Current - A/µs Figure 6. Figure 7. OFF-STATE CAPACITANCE vs TERMINAL VOLTAGE OFF-STATE CAPACITANCE vs JUNCTION TEMPERATURE TC3LAE 100 500 TC3LAD Off-State Capacitance - pF Off-State Capacitance - pF Positive Bias Negative Bias 100 Terminal Bias = 0 Terminal Bias = 50 V Terminal Bias = -50 V 10 0·1 10 1 10 50 Terminal Voltage - V Figure 8. PRODUCT -25 0 25 50 75 100 125 150 TJ - Junction Temperature - °C Figure 9. INFORMATION 5 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS R and T terminals SURGE CURRENT vs DECAY TIME TC3LAA Maximum Surge Current - A 1000 100 10 2 10 100 1000 Decay Time - µs Figure 10. THERMAL INFORMATION MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION THERMAL RESPONSE TI3MAC VGEN = 250 Vrms ZθJΑΑ - Transient Thermal Impedance - °C/W ITRMS - Maximum Non-Recurrent 50 Hz Current - A TI4LAA RGEN = 10 to 150 Ω 10 SL Package D Package 1 0·1 1 10 100 1000 t - Current Duration - s Figure 11. PRODUCT 6 INFORMATION 100 D Package SL Package 10 1 0·0001 0·001 0·01 0·1 1 10 t - Power Pulse Duration - s Figure 12. 100 1000 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 APPLICATIONS INFORMATION electrical characteristics The electrical characteristics of a TISP are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. Application values may be calculated from the parameters’ temperature curves, the power dissipated and the thermal response curve (Zθ ). lightning surge wave shape notation Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of peak amplitude (voltage or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave shape is amplitude, rise time/decay time. A 50A, 5/310 µs wave shape would have a peak current value of 50 A, a rise time of 5 µs and a decay time of 310 µs. The TISP surge current graph comprehends the wave shapes of commonly used surges. generators There are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g. 10/1000 µs open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 µs open circuit voltage and 8/20 µs short circuit current) Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 µs open circuit voltage generator typically produces a 5/310 µs short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. current rating When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to assess the required TISP surge capability. As an example, the CCITT IX K17 1.5 kV, 10/700 µs surge is changed to a 38 A, 5/310 µs waveshape when driving into a short circuit. Thus the TISP surge current capability, when directly connected to the generator, will be found for the CCITT IX K17 waveform at 310 µs on the surge graph and not 700 µs. Some common short circuit equivalents are tabulated below: STANDARD OPEN CIRCUIT VOLTAGE SHORT CIRCUIT CURRENT CCITT IX K17 CCITT IX K20 RLM88 VDE 0433 FTZ R12 1.5 kV, 10/700 µs 1 kV, 10/700 µs 1.5 kV, 0.5/700 µs 2.0 kV, 10/700 µs 2.0 kV, 10/700 µs 38 A, 5/310 µs 25 A, 5/310 µs 38 A, 0.2/310 µs 50 A, 5/200 µs 50 A, 5/310 µs Any series resistance in the protected equipment will reduce the peak circuit current to less than the generators’ short circuit value. A 2 kV open circuit voltage, 50 A short circuit current generator has an effective output impedance of 40 Ω (2000/50). If the equipment has a series resistance of 25 Ω then the surge current requirement of the TISP becomes 31 A (2000/65) and not 50 A. PRODUCT INFORMATION 7 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 APPLICATIONS INFORMATION protection voltage The protection voltage, (V(BO) ), increases under lightning surge conditions due to thyristor regeneration. This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its breakdown region. The V(BO) value under surge conditions can be estimated by multiplying the 50 Hz rate V(BO) (250 V/ms) value by the normalised increase at the surge’s di/dt (Figure 7.) . An estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance. As an example, the CCITT IX K17 1.5 kV, 10/700 µs surge has an average dv/dt of 150 V/µs, but, as the rise is exponential, the initial dv/dt is higher, being in the region of 450 V/µs. The instantaneous generator output resistance is 25 Ω. If the equipment has an additional series resistance of 20 Ω, the total series resistance becomes 45 Ω. The maximum di/dt then can be estimated as 450/45 = 10 A/µs. In practice the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the TISP breakdown region. capacitance off-state capacitance The off-state capacitance of a TISP is sensitive to junction temperature, TJ , and the bias voltage, comprising of the dc voltage, VD , and the ac voltage, Vd . All the capacitance values in this data sheet are measured with an ac voltage of 100 mV. The typical 25°C variation of capacitance value with ac bias is shown in Figure 13 When VD >> Vd the capacitance value is independent on the value of Vd . The capacitance is essentially constant over the range of normal telecommunication frequencies. NORMALISED CAPACITANCE vs RMS AC TEST VOLTAGE 1.05 AIXXAA Normalised Capacitance 1.00 0.95 0.90 0.85 0.80 Normalised to Vd = 100 mV 0.75 DC Bias, VD = 0 0.70 1 10 100 Vd - RMS AC Test Voltage - mV Figure 13. PRODUCT 8 INFORMATION 1000 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 Designation per JEDEC Std 30: PDSO-G8 5,00 (0.197) 4,80 (0.189) 8 7 6 5 1 2 3 4 6,20 (0.244) 5,80 (0.228) 4,00 (0.157) 3,81 (0.150) 7° NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,50 (0.020) x 45°NOM 0,25 (0.010) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 7° NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 5,21 (0.205) 4,60 (0.181) 0,229 (0.0090) 0,190 (0.0075) 4° ± 4° 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within ±0,051 (0.002). PRODUCT MDXXAA INFORMATION 9 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 MECHANICAL DATA SL002 2-pin plastic single-in-line package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. SL002 10,2 (0.400) MAX 4,57 (0.180) MAX 6,60 (0.260) 6,10 (0.240) 8,31 (0.327) MAX Index Dot 12,9 (0.492) MAX 4,267 (0.168) MIN 0,711 (0.028) 0,559 (0.022) 2 Places 1 2 1,500 (0.059) MAX 2 Places 5,08 (0.200) T.P. (see Note A) 0,356 (0.014) 0,203 (0.008) 2 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. Each pin centerline is located within 0,25 (0.010) of its true longitudinal position. B. Body molding flash of up to 0,15 (0.006) may occur in the package lead plane. PRODUCT 10 INFORMATION MDXXAC TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 MECHANICAL DATA D008 tape dimensions D008 Package (8 pin SOIC) Single-Sprocket Tape 4,10 3,90 8,05 7,95 1,60 1,50 2,05 1,95 0,40 0,8 MIN. 5,55 5,45 6,50 6,30 Direction of Feed Embossment Cover 0 MIN. ø 1,5 MIN. Carrier Tape 12,30 11,70 Tape 2,2 2,0 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. Taped devices are supplied on a reel of the following dimensions:Reel diameter: Reel hub diameter: Reel axial hole: MDXXAT 330 +0,0/-4,0 mm 100 ±2,0 mm 13,0 ±0,2 mm B. 2500 devices are on a reel. PRODUCT INFORMATION 11 TISP4072F3, TISP4082F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS MARCH 1994 - REVISED SEPTEMBER 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1997, Power Innovations Limited PRODUCT 12 INFORMATION