LZ93B53 LZ93B53 Synchronous Signal Generator for CCD PIN CONNECTIONS DESCRIPTION The LZ93B53 is a CMOS synchronous signal generator LSI which provides B/W TV synchronous pulses and video signal processing pulses, in combination with the timing signal generator LSI (LZ93N61, LZ95F50, or LZ93F33). 18-PIN MFP TOP VIEW CLKI 1 0 CLKO 2 FEATURES . Switchable between 270000 pixels B/W CCD and 320000 pixels B/W CCD . Switchable between EIA and CCIR systems ● Single + 5 V power supply . External synchronization is possible . Package : f 8-pin MFP(MFPOI 8-P) 17 VDI NMD 3 16 VD2 CPMD 4 15 HDI CKMD 5 14 HD2 13 CBLK VRI [ 6 TSTI 7 12 HBLK TST2 8 8 11 CSYN [ 10 BCPI } BLOCK DIAGRAM Vcc VDI VD2 HD2 HDI CBLK HBLK CSYN BCP I I I 1 7-BIT COUNTER I GATE CONTROL t t I ) CLKI ~ ~ & ~ & & ~ ~ CLKO TVMD CPMD CKMD VRI TST I TST2 GND LZ93B53 ABSOLUTE MAXIMUM RATINGS PARAM~ER I SYMBOL Power voltaae Input voltage I I -0.3 Vo ] Tstg to v vm+o.3 / v –20 to +70 ‘c –55 to +150 \ (VCC=+5 Vtl O%, T a = – 2 0 t o +7VC) I SYMBOL \ Low level input voltage VIL High level input voltage VIH rtii~h level threshold voltage Low level threshold voltage Hysteresis voltaae I I I –VTVOL High level output voltage VOH I Low level in~ut current ] I Schmitt buffer I High level input current I IIH1 High level input current I 11H2 I I I v Schmitt buffer 0,4 v =4 mA Vl=o v Vl=o v VI= Vcc VI= Vm mA 0.4 4.0 v v 2 3 ,uA 4 1.0 PA 6 60 PA 7 1.0 8.0 1 13.71VI Schmitt buffer IoH=–2 IIL1 I v 1,0 IOL IIIL21 I UNIT I NOTE v 3.5 VT+ VT+ MIN. ] TYP. I MAX. CONDITIONS 1,5 VT - Low level output voltage I LOW level input current I I“cl DC CHARACTERISTICS PARAM=ER v – 0.3 to Vcc + 0.3 Tovr Ooeratina temperature UN~ – 0.3 to 7.0 VI Output voltage Storage temperature RATING Vcc NOTES : 1. Applied to inputs (IC, ICU, ICD). 2. Applied to input (ICSU). 3. Applied to all outputs (0). 4. Applied to inputs (IC, ICU, Icsu ). 5. Applied to input (lCD). 6. Applied to inputs (IC, ICD). 7. Applied to inputs (ICU, ICSU). 251 LZ93B53 PIN FUNCTION 10. ~ r ‘DWL ‘f ~ , r,,. ,.m,v, L ‘uwn’ ‘ ‘ “,.”, ,”,. This is a pin to input the clock which is used as the reference of the horizontal and vertical pulses. This pin should be connected to DO on the timing LSI. The frequency varies depending on CKMD (pin 1 CLKI Ic m Main clock 5) as follows. ● EIA system 270000 pixels fck : 9.534964 MHz(606 fH) 360000 pixels fck : 12.713285 MHz(808 fH) . CCIR system 320000 pixels fck : 9,656250 MHz(6I 8 fH) 420 MO pixels fck : 12.875000 MHz(824 fH) 2 CLKO o lrf 3 lVMD ICD — Clock out This is an inverted output pin for CLKI (pin 1). TV mode select This is a pin to select TV systems. ● Low level : EIA system ● 4 CPMD Icu — Clamp pulse mode select High level : CCIR system This is a pin to control stop and continuance of BCPI (pin 10) within the vertical blanking period. ● High level : BCPI outputs continuous pulses. ● Low level : BCP I stops outputting composite pulses while there is no effective pixel within the V blanking period. This is an input pin to switch the frequency devision in accordance with the area sensor as follows. 5 CKMD – Icu Clock mode select Frequency division output 1/3 1/4 CKMD High Low Number of pixels 270000 360000 This is an input pin for the external V reset pulse which is used to apply vertical synchronization to the counter (2 fck counter) on the synchronization. This resetting takes priority over the internal resetting. Since the rise of input at VRI is taken at the horizontal synchronous frequency (2 fH) which is two times as high as the internal frequency, when the 6 VRI Icsu u Vertical reset vertical pulses which were separated in terms of frequency from the composite synchronous signal from other equipment are used, the fall must have a phase difference of less than 1/2 fH compared with the start timing of the vertical synchronous signal. When the interal synchronization is obtained, the High level should be selected. The input is designed as a schmitt trigger buffer. 7 252 TSTI ICD – Test tarminal 1 This is an input pin for tests, Typically, this pin should be open or at the Low level. LZ93B53 SYMBOL 9 1/0 TST2 ICD GND — FUNCTION PIN NAME WLARITY Test tarminal 2 This is an input pin for tests. Typically, this pin should be open or at the Low level. This is a grounding pin. Ground This pin output pulse which is used to clamp optical black on each line of the sensor output, Typi10 BCP I o n Optical block clamp pulse cally, these are horizontal synchronization continuous pulses. However, setilng CPMD (pin 4) to the Low level allows the composite output which becomes the Low level while there is no effective pixel within the vertical blanking period. This pin outputs EIA and CCIR standard composite 11 CSYN o Composite synchronous 12 HBLK o Horizontal blanking signal pulse synchronous signals. ● EIA system : Compatible with RS-170 . CCIR system : Compatible with CCIR This pin outputs a pulse to stop tie horizontal transfer pulses which drive the horizontal register in the area sensor. This pin outputs pulses which are used for video 13 CBLK o Composite blanking blanking in the encoder. pulse . EIA system : 11.01 ps, V20 H is cleared. . CCIR system : 12.12/s, V25 H is cleared. This pin outputs pulses which are synchronous with 14 o HD2 Horizontal drive pulse 2 the start of each line and used as the H reference of the timing LSI. This pin outputs pulses which are synchronous with 15 o HDI L Horizontal drive pulse 1 the start of each line and used as the H reference of external equipment. 16 17 o VD2 This pin outputs pulses which are obtained at the n Vertical drive pulse 2 start of each field and used as the V reference of the timing LSI. This pin outputs pulses which are obtained at the VDI 0 n Vertical drive pulse 1 Vcc — — Power supply start of each field and used as the V reference of external equipment. supply +5 V power : lnDut Din (CMOS level). Ic ICU : Input pin (CMOS level with pull-up resistor). ICD : Input pin (CMOS level with pull-down resistor). ICSU : Schmiti-trigger input pin (CMOS level with pull-uP o : Output resistor) pin 253 LZ93B53 TIMING DIAGRAM VERTICAL TIMING < EIA > (ODD FIELD) 523524525 1 H D VD CBLK CSYN * BCPI HBLK 2 3 4 5 6 7 8 9 1 0 1 1 m~fl n n n u u n n u u n u n u n n 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 n I uuuuuu~uuuuuuu n n n u u u u u u u u u u 2 2 n n n n n n n u n u & u u n n u u u u u u u u u u u u u u u u u u u u n * CPMD = L (EVEN FIELD) 260261 262 2N 2M 265266267269269270271 272273274275276277278 279280281 282283284 HD VD CBLK CSYN * BCPI HBLK n u n u n u n u n u n u n n n I Iu uuuuuuu~uuuuu n n n u u u u u u u U u u n n n M n n n n n n L d u u u u u u u u u u u u u u H u u u u u n u 14 15 u— u n u * CPMD=L VERTICAL TIMING < CCIR > (Ist, 3rd FIELD) 622623624625 HD VD CBLK CSYN * BCPI HBLK 1 2 3 4 5 6 7 8 9 10 11 12 13 16 21 22 23 24 n n n n n n n n n n n n n n n n n n n n rL n n n n 2 ~’ ~ u u u u u u u u u u u u u u n n n n n n n u u u u u u u u u u u u u u u u u u u u u u u u u * CPMD=L (2nd, 4th FIELD) 310311 312313314315316317318 319 32U 321 322323324325326327328 329 334=236237 HD CB~ CSYN * BCPI HBLK ~E u u u u * CPMD = L 254 u u u 11 u u u u u u u u u u u u v’ L1 u u u LZ93B53 HORIZONTAL TIMING < EIA > Unit : fls HD —~ CBLK ~ 1.57 CSYN ~ 1,57 (EQ) ~“ –3.15 (SAW) 1.57 -.~ 072 2,05 BCPI 1 ’ HBLK ‘r NOTES : . Applied ● = to the CCD of 542 horizontal pixels (CKMD = H) : A= 3.88, B 2.94, C 8 . 6 0 Applied to the CCD of 726 horizontal pixels (CKMD = L) : A=3.93, B =2.91, C =8.57 = HORIZONTAL TIMING < CCIR > Unit : ~s HD CBLK ~ ~ 1.55 6,21 CSYN 155 (EQ) ~ –3.1 1 1.55 (SAW) 078 2.02 BCPI HBLK ~B~ NOTES : ● Applied to the CCD of 542 horizontal pixels (CKMD = H) : A =3.83, B =2.90, C= 9.73 ● Applied to the CCD of 726 horizontal pixels (CKMD = L) : A =3.88, B =2.87, C=9.70 255