SL74LS244 Octal 3-State Noninverting Buffer/Line Driver/Line Receiver These octal buffers and line drivers and designed specifically to improve both the performance and density of three-state memory address drivers, clock drivers, and busoriented receivers and transmitters. This devise features high fan-out, improved fan-in, and 400 mV noise margin. It can be used to drive terminated lines down to 133 ohms. • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • P-N-P Inputs Reduce D-C Loading • Hysteresis at Inputs Improves Noise Margins ORDERING INFORMATION SL74LS244N Plastic SL74LS244D SOIC TA = 0° to 70° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs PIN 20=VCC PIN 10 = GND Enable A, Enable B A,B YA,YB L L L L H H H X Z X=don’t care Z = high impedance SLS System Logic Semiconductor Outputs SL74LS244 MAXIMUM RATINGS * Symbol Parameter Value Unit VCC Supply Voltage 7.0 V VIN Input Voltage 7.0 V VOUT Output Voltage 5.5 V Tstg Storage Temperature Range -65 to +150 °C * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Max Unit 5.25 V VCC Supply Voltage 4.75 VIH High Level Input Voltage 2.0 VIL Low Level Input Voltage 0.8 V IOH High Level Output Current -15 mA IOL Low Level Output Current 24 mA TA Ambient Temperature Range +70 °C 0 V DC ELECTRICAL CHARACTERISTICS over full operating conditions Guaranteed Limit Symbol Parameter Test Conditions Min VIK Input Clamp Voltage VCC = min, IIN = -18 mA VOH High Level Output Voltage VCC = min, IOH = -1.0 mA 2.7 VCC = min, IOH = -3.0 mA 2.4 VCC = min, IOH = -15 mA 2.0 VOL VT+ - VT- Low Level Output Voltage Max Unit -1.5 V V VCC = min, IOL = 12 mA 0.4 VCC = min, IOL = 24 mA 0.5 0.2 V Hysteresis VCC = min V IOZH Output Off Current HIGH VCC = max, VOUT = 2.7 V 20 µA IOZL Output Off Current LOW VCC = max, VOUT = 0.4 V -20 µA IIH High Level Input Current VCC = max, VIN = 2.7 V 20 µA VCC = max, VIN = 7.0 V 0.1 mA -0.2 mA -225 mA mA IIL Low Level Input Current VCC = max, VIN = 0.4 V IO Output Short Circuit Current VCC = max, VO =0 V (Note 1) ICC Supply Outputs High VCC = max 27 Current Outputs Low Outputs open 46 -40 All outputs disabled 54 SLS System Logic Semiconductor SL74LS244 note 1: Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second AC ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, tr = 15 ns, tf = 6.0 ns) Symbol Parameter Test Condition Min Max Unit 18 ns 18 ns tPLH Propagation Delay, Data to Output tPHL Propagation Delay, Data to Output tPZH Output Enable Time 23 ns tPZL Output Enable Time 30 ns tPHZ Output Disable Time CL = 5 pF 18 ns tPLZ Output Disable Time RL = 667 Ω 25 ns CL = 45 pF, RL = 667 Ω tPZL - S1 closed, S2 opened tPZH- S1 opened, S2 closed tPLZ, t PHZ - S1 and S2 closed Figure 1. Switching Waveforms (See Figure 3) NOTES A. CL includes probe and jig capacitance. B. All diodes are 1N916 or 1N3064. Figure 3. Test Circuit SLS System Logic Semiconductor Figure 2. Switching Waveforms (See Figure 4) NOTES A. CL includes probe and jig capacitance. B. All diodes are 1N916 or 1N3064. Figure 4. Test Circuit SL74LS244 EXPANDED LOGIC DIAGRAM SLS System Logic Semiconductor