CXA1846AM/AN Electronic volume control For the availability of this product, please contact the sales office. Description The CXA1846AM/AN is an electrical volume control IC for use in car radios/stereos and radiocassette recorders featuring serial data control. It has improved over the CXA1846M/N by reducing the ‘pop’ noise during volume level-switchings. Features • Volume adjustment (0dB to –87dB, – ∞dB) • Balance • Serial data control (DATA, CLK, CE) • Single 8V power supply • Zero-cross detection circuit CXA1846AM 20 pin SOP (Plastic) CXA1846AN 20 pin SSOP (Plastic) Absolute Maximum Ratings (Ta=25 °C) • Supply voltage VCC 13 V • Operating temperature Topr –40 to +85 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation 350 (75°C) mW PD SOP SSOP 220 (75°C) mW Structure Bipolar silicon monolithic IC Recommended Supply Voltage Range Supply voltage VCC 6 to 12 V INP1 INN1 VCT1 INAO1 VRIN1 OUT1 NC GND VCT VCC Block Diagram and Pin Configuration 20 19 18 17 16 15 14 13 12 11 LATCH LATCH CONTROL 100k VCTBUFF VCTBUFF 50K VOLUME 1dB STEP VCTBUFF 100k VOLUME 8dB STEP ZCDET SHIFT REGISTER INN2 VCT2 INAO2 VRIN2 6 7 8 9 10 INIT 5 CLK 4 DATA 3 VOLUME 1dB STEP CE 2 VOLUME 8dB STEP OUT2 1 INP2 50K Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. —1— E97102B8Y CXA1846AM/AN Pin Description Pin No. Symbol I/O resistance voltage Equivalent circuit Description VCC 1 20 INP2 INP1 50kΩ VCT 129 Input operational amplifier positive phase input 1 20 GND VCC 2 19 INN2 INN1 — VCT 129 Input operational amplifier reversed phase input 2 19 GND VCC 3 18 VCT2 VCT1 — VCT VCT buffer output 3 18 GND VCC 4 17 INAO2 INAO1 — VCT 4 Input operational amplifier 17 GND VCC 5 16 VRIN2 VRIN1 8.2kΩ VCT Volume input 5 16 GND —2— CXA1846AM/AN Pin No. Symbol I/O resistance voltage Equivalent circuit Description VCC 6 15 OUT2 OUT1 — VCT Volume output 6 GND VCC 7 CE ≅∞ — 129 Latch enable 7 GND VCC 8 DATA ≅∞ — 129 Serial data input 8 GND VCC 9 CLK ≅∞ — 129 Serial clock 9 GND VCC 10 INIT — — 129 10 System reset GND 11 VCC — 12 VCT — VCT 13 GND — — + power supply Mid-point potential GND —3— CXA1846AM/AN Electrical Characteristics Item Circuit current Total harmonic distortion Output noise voltage Maximum output voltage Separation Maximum attenuation High Input voltage Low Input voltage range Maximum output current (Unless otherwise specified VCC = 8V, Ta = 25°C) Symbol ICC THD Vn Vom CS ATTm Vsh Vsl Vin Imax Measurement Condition No signal 1kHz, 5dBm Input shorted 1kHz 1kHz Data, INIT CLK, CE Input buffer amplifier output current Min. 5 — — 8 85 85 3 0 1 — Typ. Max. Unit 8 12 mA 0.003 0.01 % 5 7 µVrms — — dBm 90 — dB 90 — dB — 6 V — 1.5 V — VCC – 1 V — 1 mA RESET The IC is reset by reducing the voltage at the INIT pin to 1V or less when CLK is high. Reset can not be performed when CLK is low. The table below shows the status when the IC has been reset. MODE VRC1 VRF1 VRC2 VRF2 Setting –∞ –7dB –∞ –7dB —4— CXA1846AM/AN Data Allocation Fast bit D1 NOP D2 D3 D4 D5 VRC1 D6 D7 D8 VRF1 D9 NOP D10 D11 D12 D13 VRC2 D14 D15 D16 VRF2 MSB LSB VRC1/VRC2 Setting 0 –8 –16 –24 –32 –40 –48 –56 –64 –72 –80 –∞ –∞ D2/D10 1 1 1 1 1 1 1 1 0 0 0 0 0 D3/D11 1 1 1 1 0 0 0 0 1 1 1 1 0 D4/D12 1 1 0 0 1 1 0 0 1 1 0 0 0 D6/D14 1 1 1 1 0 0 0 0 D7/D15 1 1 0 0 1 1 0 0 D8/D16 1 0 1 0 1 0 1 0 VRF1/VRF2 Setting 0 –1 –2 –3 –4 –5 –6 –7 —5— D5/D13 1 0 1 0 1 0 1 0 1 0 1 0 0 CXA1846AM/AN Data Timing CE DATA D1 D2 D3 D15 D16 CLK Min. 0.5µs Min. 0.5µs Max. 1MHz CE Min. 4µs —6— CXA1846AM/AN Test Circuit TP1 TP2 TP3 V4 50mV R3 R6 C6 V6 AC –60dBm GND GND B S1 S4 1k V2 10µ C9 10k 1µ 10µ A 1k C2 C4 S3 R4 100p 10k R8 10µ VCC S2 AC C7 20 19 18 17 16 15 14 13 12 11 INP1 INN1 VCT1 INAO1 VRIN1 OUT1 NC GND VCT VCC GND V7 8V VRIN2 OUT2 CE DATA CLK INIT 3 4 5 6 7 8 9 10 1k 1k 1k S8 S7 C3 100p R1 GND –60dBm 10µ R5 1k R2 10k C1 C5 1k GND V5 10k 1µ AC R7 50mV V3 TP4 5V 0V CLK B V1 10µ A S6 1n INAO2 2 C10 VCT2 1 S5 AC INN2 GND INP2 GND TP5 —7— C8 DATA CE 5V 0V 5V 0V CXA1846AM/AN Application Circuit VCC OUT1 C7 GND 10µ 10k IN1 C2 R4 C5 C8 10µ 10k 10µ 10µ 47µ C10 R4 IN2 19 17 VRIN1 OUT1 GND VCT VRIN2 OUT2 CE DATA CLK INIT 1 2 3 4 5 6 7 8 9 10 10µ 10k C1 R1 VCC INAO1 INAO2 11 VCT1 12 VCT2 13 INN1 14 INN2 15 INP1 16 INP2 18 NC GND 20 10µ C11 0.01µ R4 10k R3 10µ GND OUT2 C6 SERIAL CTL Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. —8— CXA1846AM/AN Total harmonic distortion 1.0 Total harmonic distortion [%] RL = 10kΩ VCC = 8V Volumue = 0dB 0.1 20kHz 100Hz 0.01 1kHz 0.001 –30 –20 –10 Output level [dBm] —9— 0 2 4 6 8 10 CXA1846AM/AN Package Outline Unit : mm CXA1846AM 20PIN SOP (PLASTIC) + 0.4 12.45 – 0.1 + 0.4 1.85 – 0.15 20 11 6.9 10 + 0.1 0.2 – 0.05 1.27 0.24 0.5 ± 0.2 1 0.45 ± 0.1 + 0.2 0.1 – 0.05 7.9 ± 0.4 + 0.3 5.3 – 0.1 0.15 M PACKAGE STRUCTURE SONY CODE SOP-20P-L01 EIAJ CODE SOP020-P-0300 JEDEC CODE CXA1846AN PACKAGE MATERIAL EPOXY RESIN LEAD TREATMENT SOLDER PLATING LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.3g 20PIN SSOP (PLASTIC) + 0.2 1.25 – 0.1 ∗6.5 ± 0.1 0.1 11 20 1 6.4 ± 0.2 ∗4.4 ± 0.1 A 10 0.65 b (0.15) (0.22) 0.5 ± 0.2 0.1 ± 0.1 DETAIL B : SOLDER b=0.22 ± 0.03 + 0.03 0.15 – 0.01 + 0.1 b=0.22 – 0.05 + 0.05 0.15 – 0.02 0.13 M DETAIL B : PALLADIUM NOTE: Dimension “∗” does not include mold protrusion. 0° to 10° PACKAGE STRUCTURE DETAIL A PACKAGE MATERIAL EPOXY RESIN SONY CODE SSOP-20P-L01 LEAD TREATMENT SOLDER / PALLADIUM PLATING EIAJ CODE SSOP020-P-0044 LEAD MATERIAL 42/COPPER ALLOY PACKAGE MASS 0.1g JEDEC CODE NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). —10—