ZILOG Z86C65

Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
PRELIMINARY
CUSTOMERPROCUREMENTSPECIFICATION
Z86C60/65
CMOS Z8®
32KROMMICROCONTROLLER
FEATURES
Part
ROM
(KB)
RAM*
(Bytes)
I/O
Speed 28-pin
(MHz) DIP
Z86C60
Z86C65
16
32
256
256
22
22
16
16
X
X
■
Low EMI Mode Option
■
Auto Latches
■
Two Programmable 8-Bit Counter/Timers Each with 6Bit Programmable Prescaler
■
Three Vectored, Priority Interrupts from Three Different
Sources
■
On-Chip Oscillator that Accepts a Crystal Ceramic
Resonator, LC, or External Clock Source
■
ROM Mask Options:
– ROM Protect
– RAM Protect
*General-Purpose
■
28-Pin DIP Package
■
3.0V to 5.5V Operating Range
■
Low-Power Consumption: 200 mW
■
Fast Instruction Pointer: 0.75 µs @ 16 MHz
■
Two Standby Modes: STOP and HALT
GENERAL DESCRIPTION
The Z86C60/65 microcontrollers introduce a new level of
sophistication to single-chip architecture. The Z86C65 is a
member of the Z8 single-chip microcontroller family with
32 Kbytes of ROM and 256 bytes of RAM. The Z86C60 is
identical, except that it only has 16 Kbytes of ROM.
and output. These lines are grouped into four ports. Each
port is configurable under software control to provide
timing, status signals, serial or parallel I/O with or without
handshake, and an address/data bus for interfacing external memory.
The Z86C60/65 are housed in a 28-pin DIP package, and
manufactured in CMOS technology. The Z86C96 ROMless
Z8 will support the Z86C60/65.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Data
Memory, and 236 General-Purpose Registers.
Zilog’s CMOS microcontroller offers fast execution, more
efficient use of memory, more sophisticated interrupts,
input/output bit manipulation capabilities, and easy hardware/software system expansion along with low cost and
low power consumption.
To unburden the program from coping with the real-time
problems such as counting/timing and serial data communication, the Z86C60/65 offers two on-chip counter/timers
with a large number of user selectable modes.
The Z86C60/65 architecture is characterized by Zilog’s
8-bit microcontroller core. The device offers a flexible I/O
scheme, an efficient register and address space structure,
multiplexed capabilities between address/data, I/O, and a
number of ancillary features that are useful in many industrial and advanced scientific applications.
For applications which demand powerful I/O capabilities,
the Z86C60/65 fulfills this with 22 pins dedicated to input
CP96Z8X0400
(5/96)
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
Ground
VCC
GND
VDD
VSS
1
Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
GENERAL DESCRIPTION
Output Input
Vcc
GND
XTAL
/DS
/RESET
Machine Timing and
Port 3
Instruction Control
ALU
FLAGS
Counter/
Timers
(2)
Prg. Memory
Register
Pointer
Interrupt
Control
Register File
Program
Counter
Port 0
Port 1
Port 2
2
I/O
(Bit Programmable)
4
Address or I/O
(Nibble Programmable)
8
Address/Data or I/O
(Byte Programmable)
Figure 1. Z86C60/65 Functional Block Diagram
2
Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
PIN DESCRIPTION
Z86C60/65 28-Pin DIP Pin Identification
VCC
1
28
P36
Pin #
Symbol
Function
Direction
XTAL2
2
27
P31
XTAL1
3
26
P25
1
2
3
VCC
XTAL2
XTAL1
Power Supply
Crystal, Oscillator Clock
Crystal, Oscillator Clock
Input
Output
Input
RESET
4
25
P24
/DS
5
24
P23
4
5
6
/RESET
/DS
P35
Reset
Data Strobe
Port 3, Pin 5
Input
Output
Output
P35
6
23
P22
GND
7
22
P21
7
8-13
14-21
GND
P05-P00
P17-P10
Ground
Input
Port 0, Pins 0,1,2,3,4,5
In/Output
Port 1, Pins 0,1,2,3,4,5,6,7 In/Output
P00
8
21
P17
P01
9
20
P16
22-26
27
28
P25-P21
P31
P36
Port 2, Pins 1,2,3,4,5
Port 3, Pin 1
Port 3, Pin 6
P02
10
19
P15
P03
11
18
P14
P04
12
17
P13
P05
13
16
P12
P10
14
15
P11
In/Output
Input
Output
Figure 2. Z86C60/65 28-Pin DIP
Pin Assignments
3
Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
ABSOLUTE MAXIMUM RATINGS
Symbol
Description
Min
Max
Units
VCC
TSTG
TA
Supply Voltage*
–0.3
Storage Temp
–65
Oper Ambient Temp
†
+7.0
+150
†
V
C
Notes:
* Voltages on all pins with respect to GND.
† See ordering information
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; operation of the device at
any condition above those indicated in the operational
sections of these specifications is not implied. Exposure to
absolute maximum rating conditions for an extended period may affect device reliability.
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load).
From Output
Under Test
I
Figure 3. Test Load Diagram
4
150 pF
Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
DC ELECTRICAL CHARACTERISTICS
Z86C60/65
Sym Parameter
TA = 0°C
to +70°C
Min
Max
VCC
4.5
VCH
VCL
OperatingVoltage
MaxInputVoltage
ClockInputHighVoltage
ClockInputLowVoltage
VIH
VIL
VOH
InputHighVoltage
InputLowVoltage
OutputHighVoltage
VOH
VOH
VOL
VOL
VRH
OutputHighVoltage
OutputHighVoltage(LowEMI)
OutputLowVoltage
OutputLowVoltage(LowEMI)
ResetInputHighVoltage
VRl
IIL
IOL
ResetInputLowVoltage
InputLeakage
OutputLeakage
IIR
ICC
ICC
ICC1
ICC1
ICC2
IALL
ResetInputCurrent
SupplyCurrent(StandardMode)
SupplyCurrent(LowEMI)
StandbyCurrent(StandardMode)
StandbyCurrent(LowEMI)
StandbyCurrent
AutoLatchLowCurrent
Typical
at
25°C
Units
Conditions
0.85VCC
VSS–0.3
5.5
7
VCC+0.3
0.8
V
V
V
V
[3]
[3] IIN < 250µA
DrivenbyExternalClockGenerator
DrivenbyExternalClockGenerator
2
VSS–0.3
2.4
VCC+0.3
0.2VCC
VCC
V
V
V
IOH=–2.0mA
VCC–100mV
0.85VCC
0.4
0.4
VCC+0.3
V
V
V
V
V
–0.3
–2
–2
0.2VCC
2
2
V
µA
µA
VIN =0V,VCC
VIN =0V,VCC
–14
–180
35
6.0
15
1.6
10
+14
µA
mA
mA
mA
mA
µA
µA
VRL=0V
[1]@16MHz
@4MHz
[1]HALTModeVIN=0V,VCC@16MHz
@4MHz
[1]STOPModeVIN=0V,VCC
VCC=5.0V
2.4
24
4.0
4.5
0.8
5
5
IOH =–100µA
IOH =–0.5mA
IOL = +5.0 mA [2]
IOL = +2.0 mA [2]
Notes:
[1] All inputs driven to either 0V or VCC, outputs floating.
[2] VCC = 4.5V to 5.5V
[3] /Reset pin must be a maximum of VCC + 0.3V.
5
Z86C60/65
CP96Z8X0400
P R E L I M I N A R Y
AC CHARACTERISTICS
Additional Timing Diagram
3
1
Clock
2
2
3
7
7
TIN
4
5
6
IRQN
8
9
Figure 4. Additional Timing
AC CHARACTERISTICS
Additional Timing Table
Z86C60/65 (Standard Mode Only)
No
Symbol
Parameter
1
2
3
4
5
TpC
TrC,TfC
TwC
TwTinL
TwTinH
Input Clock Period
Clock Input Rise & Fall Times
Input Clock Width
Timer Input Low Width
Timer Input High Width
62.5
6
7
8a
8b
9
TpTin
TrTin,TfTin
TwIL
TwIL
TwIH
Timer Input Period
Timer Input Rise and Fall Times
Interrupt Request Input Low Times
Interrupt Request Input Low Times
Interrupt Request Input High Times
Notes:
[1] Clock timing references use 0.85VCC for a logic 1 and 0.8V for a logic 0.
[2] Timing references use 2.0V for a logic 1 and 0.8V for a logic 0.
[3] Interrupt references request through Port 3.
[4] Interrupt request through Port 3 (P33-P31).
[5] Interrupt request through Port 30.
6
TA = 0°C
to +70°C
16 MHz
Min
Max
Units
Notes
31
75
5 TpC
ns
ns
ns
ns
ns
[1]
[1]
[1]
[2]
[2]
8 TpC
100
70
5 TpC
5 TpC
ns
ns
ns
ns
ns
[2]
[2]
[2,4]
[2,5]
[2,3]
DC
10
P R E L I M I N A R Y
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-con-
© 1996 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
Z86C60/65
CP96Z8X0400
formance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
Zilog’s products are not authorized for use as critical components in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
FAX 408 370-8056
Internet: http://www.zilog.com
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