S E M I C O N D U C T O R HI-5040 thru HI-5051 HI-5046A and HI-5047A CMOS Analog Switches December 1993 Features Description • ±15V Wide Analog Signal Range This family of CMOS analog switches offers low resistance switching performance for analog voltages up to the supply rails and for signal currents up to 80mA. “ON” resistance is low and stays reasonably constant over the full range of operating signal voltage and current. RON remains exceptionally constant for input voltages between +5V and -5V and currents up to 50mA. Switch impedance also changes very little over temperature, particularly between 0oC and +75oC. RON is nominally 25Ω for HI-5048 through HI-5051 and HI-5046A and HI-5047A and 50Ω for HI-5040 through HI-5047. • Low “ON” Resistance 25Ω (Typical) • High Current Capability 80mA (Typical) • Break-Before-Make Switching - Turn-On Time 370ns (Typical) - Turn-Off Time 280ns (Typical) • No Latch-Up • Input MOS Gates are Protected from Electrostatic Discharge • DTL, TTL, CMOS, PMOS Compatible Applications • High Frequency Switching • Sample and Hold There are 14 devices in this switch series which are differentiated by type of switch action and value of RON (see Functional Description). All devices are available in 16 lead DIP packages. The HI-5040 and HI-5050 switches can directly replace IH-5040 series devices except IH5048, and are functionally compatible with the DG180 and DG190 family. Each switch type is available in the -55oC to +125oC and 0oC to +75oC performance grades. • Digital Filters • Operational Amplifier Gain Switching Functional Block Diagram Functional Description PART NUMBER TYPE All devices provide break-before-make switching and are TTL and CMOS compatible for maximum application versatility. Performance is further enhanced by Dielectric Isolation processing which insures latch-free operation with very low input and output leakage currents (0.8nA at +25oC). This family of switches also features very low power operation (1.5mW at +25oC). TYPICAL DIAGRAM RON HI-5040 SPST 50Ω HI-5041 Dual SPST 50Ω HI-5042 SPDT 50Ω HI-5043 Dual SPDT 50Ω HI-5044 DPST 50Ω HI-5045 Dual DPST 50Ω HI-5046 DPDT 50Ω HI-5046A DPDT 25Ω HI-5047 4PST 50Ω HI-5047A 4PST 25Ω HI-5048 Dual SPST 25Ω HI-5049 Dual DPST 25Ω HI-5050 SPDT 25Ω HI-5051 Dual SPDT 25Ω S A © Harris Corporation 1993 P D CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright N 9-110 File Number 3127 HI-5040 Series Ordering Information PART NUMBER TEMPERATURE RANGE HI1-5040-7 0oC to +75oC + 96 Hr. Burn-In HI3-5040-5 0oC to +75oC HI1-5040-2 -55oC to +125oC o o PART NUMBER PACKAGE 16 Lead Ceramic DIP PACKAGE HI1-5048-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5048-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI3-5048-5 0oC to +75oC 16 Lead Plastic DIP 16 Lead Ceramic DIP TEMPERATURE RANGE o o 16 Lead Plastic DIP HI1-5040-5 0 C to +75 C 16 Lead Ceramic DIP HI1-5048-2 -55 C to +125 C 16 Lead Ceramic DIP HI3-5041-5 0oC to +75oC 16 Lead Plastic DIP HI1-5049-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5041-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5049-2 -55oC to +125oC 16 Lead Ceramic DIP o o o o HI1-5041-2 -55 C to +125 C 16 Lead Ceramic DIP HI3-5049-5 0 C to +75 C HI1-5041-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI1-5049-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI3-5042-5 0oC to +75oC 16 Lead Plastic DIP HI1-5050-5 0oC to +75oC 16 Lead Ceramic DIP o o 16 Lead Plastic DIP HI1-5042-5 0 C to +75 C 16 Lead Ceramic DIP HI1-5050-2 -55oC to +125oC HI1-5042-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI3-5050-5 0oC to +75oC HI1-5050-7 -55oC to +125oC 16 Lead Ceramic DIP 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI1-5042-2 HI1-5043-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI1-5051-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5043-2 -55oC to +125oC 16 Lead Ceramic DIP HI3-5043-5 0oC to +75oC 16 Lead Plastic DIP HI1-5043-5 0oC to +75oC o o 16 Lead Ceramic DIP 16 Lead Plastic DIP HI1-5051-2 -55 C to +125 C 16 Lead Ceramic DIP HI1-5051-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP 16 Lead Ceramic DIP HI4P5051-5 0oC to +75oC 20 Lead PLCC 0 C to +75 C + 96 Hr. Burn-In 16 Lead Ceramic DIP HI3-5051-5 0oC to +75oC 16 Lead Plastic DIP HI1-5044-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5041/883 -55 C to +125 C 16 Lead Ceramic DIP HI3-5044-5 0oC to +75oC 16 Lead Plastic DIP HI1-5042/883 -55oC to +125oC 16 Lead Ceramic DIP HI1-5044-2 -55oC to +125oC 16 Lead Ceramic DIP HI1-5043/883 -55oC to +125oC 16 Lead Ceramic DIP HI1-5045-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5044/883 -55 C to +125 C 16 Lead Ceramic DIP HI1-5045-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI1-5045/883 -55oC to +125oC 16 Lead Ceramic DIP HI1-5045-2 -55oC to +125oC 16 Lead Ceramic DIP HI1-5046/883 -55oC to +125oC 16 Lead Ceramic DIP HI3-5045-5 0oC to +75oC HI1-5046-2 -55oC to +125oC 16 Lead Ceramic DIP HI1-5046-5 0oC to +75oC 16 Lead Ceramic DIP HI1-5046-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI1-5044-7 HI3-5046-5 HI1-5046A-7 HI3-5046A-5 HI1-5046A-2 o o o o 0 C to +75 C 0oC to +75oC + 96 Hr. Burn-In 0oC to +75oC o o -55 C to +125 C o o HI1-5040/883 16 Lead Plastic DIP 16 Lead Plastic DIP -55oC to +125oC o o o o o o 16 Lead Ceramic DIP HI1-5046A/883 -55 C to +125 C 16 Lead Ceramic DIP HI1-5047/883 -55oC to +125oC 16 Lead Ceramic DIP HI1-5047A/883 -55oC to +125oC 16 Lead Ceramic DIP o o HI1-5048/883 -55 C to +125 C 16 Lead Ceramic DIP HI1-5049/883 -55oC to +125oC 16 Lead Ceramic DIP HI1-5050/883 -55oC to +125oC 16 Lead Ceramic DIP o o HI1-5051/883 -55 C to +125 C 16 Lead Ceramic DIP HI4-5043/883 -55oC to +125oC 20 Lead CLCC 16 Lead Plastic DIP HI4-5045/883 -55oC to +125oC 16 Lead Ceramic DIP 16 Lead Ceramic DIP HI4-5051/883 -55oC to +125oC 16 Lead Ceramic DIP 16 Lead Ceramic DIP o o HI1-5046A-5 0 C to +75 C 16 Lead Ceramic DIP HI9P5043-5 0 C to +75 C 16 SOIC (N) HI1-5047-5 0oC to +75oC 16 Lead Ceramic DIP HI9P5045-5 0oC to +75oC 16 SOIC (N) HI1-5047-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Ceramic DIP HI9P5049-5 0oC to +75oC 16 SOIC (N) HI9P5051-5 0 C to +75 C 16 SOIC (N) HI1-5047-2 -55oC to +125oC 16 Lead Ceramic DIP HI9P5043-9 -40oC to +85oC 16 SOIC (N) HI3-5047-5 0oC to +75oC 16 Lead Plastic DIP HI9P5045-9 -40oC to +85oC 16 SOIC (N) HI1-5047A-5 0oC to +75oC 16 Lead Ceramic DIP HI9P5049-9 -40 C to +85 C 16 SOIC (N) HI1-5047A-2 -55oC to +125oC 16 Lead Ceramic DIP HI9P5051-9 -40oC to +85oC 16 SOIC (N) HI3-5047A-5 0oC to +75oC HI1-5047A-7 0oC to +75oC + 96 Hr. Burn-In 16 Lead Plastic DIP 16 Lead Ceramic DIP 9-111 o o o o HI-5040 Series Pin Configurations Switch States are Logic “0” Input SINGLE CONTROL SPST HI-5040 (50Ω) SPDT HI-5042 (50Ω), HI-5050 (25Ω) DPST HI-5044 (50Ω) D 1 16 S D1 1 15 A 2 16 S1 15 A D1 1 2 3 14 V- D2 3 14 V- D2 3 14 4 13 VR S2 4 S2 4 13 5 5 5 12 6 12 VL 11 V+ 13 VR 12 VL 6 11 V+ 6 11 7 10 7 10 7 10 8 9 8 9 8 9 DPDT HI-5046 (50Ω), HI-5046A (25Ω) 2 15 A 2 15 A 14 V- D1 3 14 V- S1 4 13 VR 12 VL S1 4 13 VR 12 VL S4 5 D4 6 11 V+ 10 7 VVR VL V+ 11 V+ 10 7 9 S3 D3 8 S1 15 A 16 S2 D2 1 D1 3 S4 5 D4 6 16 4PST HI-5047 (50Ω), HI-5047A (25Ω) 16 S2 D2 1 2 9 S3 D3 8 DUAL CONTROL DUAL SPST HI-5041 (50Ω) DUAL SPDT HI-5043 (50Ω), HI-5051 (25Ω) 16 S1 15 A1 D1 1 2 3 14 V- 4 5 13 VR 12 VL 6 11 V+ 7 10 A2 7 D2 8 9 S2 D2 8 2 16 S1 15 A1 D3 3 14 V- D3 3 14 V- S3 4 13 VR 12 VL S3 4 S4 5 13 VR 12 VL 11 V+ D4 6 11 V+ 10 A2 7 10 A2 9 S2 D2 8 9 S2 S4 5 D4 6 NC S1 A1 DUAL SPDT HI-5043 (50Ω), HI-5051 (25Ω) D1 DUAL SPST HI-5048 (25Ω) D1 1 2 16 S1 15 A1 NC D1 1 3 2 1 20 19 D3 4 18 V- S1 4 13 VR S3 5 17 V R S2 5 NC 6 16 NC D2 6 12 VL 11 V+ S4 7 7 15 VL 10 A2 D4 8 14 V+ 9 9 10 11 12 13 A2 14 V- S2 D1 3 D2 15 A1 NC 16 2 NC 1 8 DUAL DPST HI-5045 (50Ω), HI-5049 (25Ω) NOTE: Unused pins may be internally connected. Ground all unused pins. 9-112 HI-5040 Series Switch Functions Switch States are Logic “1” Input SPST HI-5040 (50Ω) VL 12 S DUAL SPST HI-5041 (50Ω) V+ VL 1 D S1 A1 A A2 15 S2 13 VR 12 S1 S3 A1 A2 S2 S4 S2 9 V+ VL 8 6 D2 12 S2 S3 S4 A A 13 VR 3 8 6 15 S1 D2 A1 S1 D2 S2 D3 S3 D4 S4 A S1 S3 A1 A2 S2 S4 12 8 5 6 D1 D4 15 S1 D2 D3 13 VR VL 11 A1 A2 4 15 3 D1 D3 S1 S2 8 6 VR 14 V- 13 D2 D4 A VL 12 3 D1 S1 S3 D2 A1 A2 S2 S4 13 VR 14 V- 9-113 D1 D2 14 V- DUAL SPDT HI-5051 (25Ω) 1 15 6 VR 11 4 3 5 V+ 10 11 15 14 16 V+ 10 V- 12 1 V- 4 SPDT HI-5050 (25Ω) V+ D4 14 DUAL SPST HI-5048 (25Ω) VL 9 14 16 13 D2 9 5 11 1 V- 9 5 8 6 10 V+ 16 DUAL DPST HI-5049 (25Ω) 12 D1 D3 VR S2 VL 3 V- 3 11 1 13 4 V+ 4 15 4PST HI-5047 (50Ω), HI-5047A (25Ω) D1 V- 16 14 12 9 D1 A2 S2 VL 1 12 S4 11 16 VL 15 V+ 14 DUAL DPST HI-5045 (50Ω) 1 VR D2 15 11 4 D1 D2 S3 V- 3 13 3 V+ 13 4 VR 4 V- 16 14 5 A D4 DPDT HI-5046 (50Ω), HI-5046A (25Ω) S1 S1 S2 VL 1 14 12 11 D1 D3 11 16 DPST HI-5044 (50Ω) 15 VR 8 VR 3 V+ 10 13 1 13 S1 15 V- 10 9 5 12 1 D1 14 16 4 VL 11 16 DUAL SPDT HI-5043 (50Ω) VL V+ 12 11 16 SPDT HI-5042 (50Ω) V+ 11 16 1 4 15 3 D1 D3 8 6 D2 10 9 5 13 VR 14 V- D4 Specifications HI-5040 Series Absolute Maximum Ratings Thermal Information Supply Voltage (V+, V-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V VR to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+, VDigital and Analog Input Voltage . . . . . +VSUPPLY +4V, -VSUPPLY -4V Analog Current (S to D) Continuous. . . . . . . . . . . . . . . . . . . . . 30mA Analog Current (S to D) Peak. . . . . . . . . . . . . . . . . . . . . . . . . . 80mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Thermal Resistance θJA θJC Ceramic DIP Package . . . . . . . . . . . . . . . 80oC/W 24oC/W SOIC Package. . . . . . . . . . . . . . . . . . . . . 120oC/W Plastic DIP Package . . . . . . . . . . . . . . . . 100oC/W PLCC Package . . . . . . . . . . . . . . . . . . . . 80oC/W CLCC Package . . . . . . . . . . . . . . . . . . . . 75oC/W 20oC/W Junction Temperature Plactic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150oC Ceramic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Operating Temperature Range HI-50XX-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC HI-50XX-5, -7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC HI-50XX-9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to +85oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications Supplies = +15V, -15V; VR = 0V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, VL = +5V, Unless Otherwise Specified. For Test Conditions, Consult Performance Characteristics, Unused Pins are Grounded. PARAMETER -55oC To +125oC 0oC To +75oC TEST CONDITIONS TEMP MIN TYP MAX MIN TYP MAX UNITS (Note 4) +25oC - 370 500 - 370 500 ns SWITCHING CHARACTERISTICS tON, Switch On Time o tOFF, Switch Off Time (Note 4) +25 C - 280 500 - 280 500 ns Charge Injection (Note 2) +25oC - 5 20 - 5 - mV “Off Isolation” (Note 3) +25oC “Crosstalk” (Note 3) 75 80 - - 80 - dB o 80 88 - - 88 - dB o +25 C CS(OFF), Input Switch Capacitance +25 C - 11 - - 11 - pF CD(OFF), Output Switch Capacitance +25oC - 11 - - 11 - pF CD(ON), Output Switch Capacitance +25oC - 22 - - 22 - pF o - 5 - - 5 - pF o +25 C - 0.5 - - 0.5 - pF VAL, Input Low Threshold Full - - 0.8 - - 0.8 V VAH, Input High Threshold Full 2.4 - - 2.4 - - V IA, Input Leakage Current (High or Low) Full - 0.01 1.0 - 0.01 1.0 µA Full CA, Digital Input Capacitance +25 C CDS(OFF), Drain-To-Source Capacitance DIGITAL INPUT CHARACTERISTICS ANALOG SWITCH CHARACTERISTICS Analog Signal Range RON, On Resistance RON, On Resistance RON, Channel-to-Channel Match RON, Channel-to-Channel Match IS(OFF) = ID(OFF), Off Input or Output Leakage Current (Note 1A) (Note 1B) (Note 1A) (Note 1B) -15 - +15 -15 - +15 V o +25 C - 50 75 - 50 75 Ω Full - - 150 - - 150 Ω +25oC - 25 45 - 25 45 Ω Full - - 50 - - 50 Ω o - 2 10 - 2 10 Ω o +25 C - 1 5 - 1 5 Ω +25oC - 0.8 2 - 0.8 2 nA Full - 100 200 - 100 200 nA +25 C 9-114 Specifications HI-5040 Series Electrical Specifications Supplies = +15V, -15V; VR = 0V; VAH (Logic Level High) = 2.4V, VAL (Logic Level Low) = +0.8V, VL = +5V, Unless Otherwise Specified. For Test Conditions, Consult Performance Characteristics, Unused Pins are Grounded. (Continued) TEST CONDITIONS -55oC To +125oC 0oC To +75oC TEMP MIN TYP MAX MIN TYP MAX UNITS +25oC - 0.01 2 - 0.01 2 nA Full - 2 200 - 2 200 nA PD, Quiescent Power Dissipation +25oC - 1.5 - - 1.5 - mW I+, I-, IL, IR +25oC - - 0.2 - - 0.3 mA PARAMETER ID(ON), On Leakage Current POWER REQUIREMENTS I+, +15V Quiescent Current (Note 4) Full - - 0.3 - - 0.5 mA I-, -15V Quiescent Current (Note 4) Full - - 0.3 - - 0.5 mA IL, +5V Quiescent Current (Note 4) Full - - 0.3 - - 0.5 mA IR, Ground Quiescent Current (Note 4) Full - - 0.3 - - 0.5 mA NOTES: 1. VOUT = ±10V, IOUT = 1mA A). For HI-5040 thru HI-5047 B). For HI-5048 thru HI-5051, HI-5046A/5047A. 2. VIN = 0V, CL = 10,000pF. 3. RL = 100Ω, f = 100kHz, VIN = 2.0VP-P, CL = 5pF. 4. VAL = 0V, VAH = 5V. Switching Waveforms INPUT INPUT OUTPUT OUTPUT Top: TTL Input (1V/Div.) VAH = 5V, VAL = 0V Bottom: Output (2V/Div.) Horizontal: 200ns/Div. Top: CMOS Input (5V/Div.) VAH = 10V, VAL = 0V Bottom: Output (5V/Div.) Horizontal: 200ns/Div. FIGURE 1. FIGURE 2. 9-115 HI-5040 Series Typical Performance Curves and Test Circuits TA = +25oC, V+ = +15V, V- = -15V, VL = +5V, VR = 0V, VAH = 3.0V and VAL = 0.8V, Unless Otherwise Specified 1mA RON = V2 1/2 1mA IN OUT ±VIN FIGURE 3. “ON” RESISTANCE vs ANALOG SIGNAL LEVEL, SUPPLY VOLTAGE AND TEMPERATURE NORMALIZED “ON” RESISTANCE (REFERRED TO +25oC) “ON” RESISTANCE (Ω) 80 60 V+ = +12V V- = -12V V+ = +10V V- = -10V 40 20 0 -15 V+ = +15V V- = -15V -10 0 +5 -5 ANALOG SIGNAL LEVEL (V) +10 1.2 1.1 1.0 0.9 0.8 0.7 0.6 +15 VIN = 0V -50 -25 0 +25 +50 +75 +100 FIGURE 4. “ON” RESISTANCE vs ANALOG SIGNAL LEVEL AND POWER SUPPLY VOLTAGE FIGURE 5. NORMALIZED “ON” RESISTANCE vs TEMPERATURE OFF LEAKAGE CURRENT vs TEMPERATURE IS(OFF) 100nA A ID(OFF) IN OUT 10V IS(OFF) = ID(OFF) ON LEAKAGE CURRENT vs TEMPERATURE 1nA IN OUT ID(ON) 100pA A 10pA 25 A ± LEAKAGE CURRENT ±10V 10nA 50 75 100 +125 TEMPERATURE (oC) 125 TEMPERATURE (oC) FIGURE 6. ON/OFF LEAKAGE CURRENT vs TEMPERATURE 9-116 ID(ON) ±10V HI-5040 Series Typical Performance Curves and Test Circuits TA = +25oC, V+ = +15V, V- = -15V, VL = +5V, VR = 0V, VAH = 3.0V and VAL = 0.8V, Unless Otherwise Specified (Continued) NORMALIZED “ON” RESISTANCE (REFERRED TO 1mA) 1.4 1.3 “ON” RESISTANCE vs ANALOG CURRENT 1.2 IN OUT I ±VIN 1.1 RON = VIN I 1.0 0 20 40 60 80 ANALOG CURRENT (mA) FIGURE 7. NORMALIZED “ON” RESISTANCE vs ANALOG CURRENT IN -160 50Ω (2V)pp RL = 100Ω -120 OUT VOUT VIN RL -80 "OFF" ISOLATION = 20 LOG RL = 10kΩ -40 10 1 1K 100 10K 100K VIN VOUT 1M FREQUENCY (Hz) FIGURE 8. “OFF” ISOLATION vs FREQUENCY 200 CROSSTALK (dB) OFF ISOLATION (dB) -200 SWITCHED CHANNEL 160 VIN (2V)pp 120 50Ω VOUT RL 80 40 0 "CROSSTALK" = 20 LOG 1 10 100 1K 10K 100K 1M FREQUENCY (Hz) FIGURE 9. CROSSTALK vs FREQUENCY 9-117 VIN VOUT RL HI-5040 Series Typical Performance Curves and Test Circuits TA = +25oC, V+ = +15V, V- = -15V, VL = +5V, VR = 0V, VAH = 3.0V and VAL = 0.8V, Unless Otherwise Specified (Continued) POWER CONSUMPTION (mW) 200 160 +10V 120 TOGGLE AT 50% DUTY -10V A VL VR V+ V- 80 IL I+ I- 40 +5V 0 0 1K 10K 100K +15V -15V 1M TOGGLE FREQUENCY (50% DUTY CYCLE) (Hz) FIGURE 10. POWER CONSUMPTION vs FREQUENCY Switching Characteristics VAH VAL VA 90% 90% IN1 OUT 1 tON +10V tOFF 90% IN2 1K 90% OUT 2 1K VA tON tOFF FIGURE 11. ON/OFF SWITCH TIME vs LOGIC LEVEL 720 720 660 660 600 600 540 540 480 480 420 420 tON 360 300 360 tOFF 240 240 180 180 120 120 60 2.4 3.0 3.6 DIGITAL “HIGH” (V) tON 300 4.2 FIGURE 12. SWITCHING TIMES FOR POSITIVE DIGITAL TRANSITION 60 4.8 tOFF 0 0.5 1.0 DIGITAL “LOW” (V) 1.5 FIGURE 13. SWITCHING TIMES FOR NEGATIVE DIGITAL TRANSITION 9-118 HI-5040 Series Switching Characteristics (Continued) V+ P15 P16 P14 35µA VL QN1 QP1 25µA 25µA N13 QP4 100µA QP3 R3 25µA R6 R4 QP5 QP6 P13 R2 25µA QP8 R5 V+ QP7 16µA VR 25µA QN2 to VR’ R7 QP2 N14 N15 N16 V- to VL’ FIGURE 14. TTL/CMOS REFERENCE CIRCUIT (Note 1) NOTE: 1. Connect V+ to VL for minimizing power consumption when driving from CMOS circuits. 9-119 HI-5040 Series Switching Characteristics (Continued) A1 (A2) N1 V+ N2 N3 IN OUT P2 VP1 A1 (A2) FIGURE 15. SWITCH CELL V+ P3 P5 P1 V+ P4 N1 P6 D1 R4 P8 P7 P9 P10 P11 P12 A1 A1 VR' A 200Ω D2 A2 A2 VL' N6 V- N7 N8 N9 N10 P2 N4 N2 N5 N3 V- NOTES: 1. All n-channel bodies to V-, all p-channel bodies to V+ except as shown. 2. For further information refer to Application Notes 520, 521, 531, 532 and 557. FIGURE 16. DIGITAL INPUT BUFFER AND LEVEL SHIFTER 9-120 N11 N12