TI TL441N

TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
D
D
D
D
D
N PACKAGE
(TOP VIEW)
Excellent Dynamic Range
Wide Bandwidth
Built-In Temperature Compensation
Log Linearity (30-dB Sections) . . . 1 dB Typ
Wide Input Voltage Range
CA2
VCC –
CA2′
A1
Y
Y
A2
VCC +
description
1
16
2
15
3
14
4
13
5
12
6
11
NC
CB2
CB2′
GND
B1
Z
Z
B2
This amplifier circuit contains four 30-dB
10
7
logarithmic stages. Gain in each stage is such that
9
8
the output of each stage is proportional to the
logarithm of the input voltage over the 30-dB input
NC — No internal connection
voltage range. Each half of the circuit contains two
of these 30-dB stages summed together in one
differential output that is proportional to the sum of the logarithms of the input voltages of the two stages. The
four stages may be interconnected to obtain a theoretical input voltage range of 120-dB. In practice, this permits
the input voltage range typically to be greater than 80-dB with log linearity of ± 0.5-dB (see application data).
Bandwidth is from dc to 40 MHz.
This circuit is useful in data compression and analog compensation. This logarithmic amplifier is used in log IF
circuitry as well as video and log amplifiers.
The TL441 is characterized for operation over 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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1
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
functional logic diagram (one half)
A1
(B1)
Log
Σ
–15 dB
Log
Y (Z)
Log
Y (Z)
CA2
(CB2)
A2
(B2)
–15 dB
Log
CA2′
(CB2′)
Y ∝ log A1 + log A2; Z ∝ log B1 + log B2 where: A1, A2, B1, and B2 are in dBV, 0 dBV = 1 V.
CA2, CA2′, CB2, and CB2′ are detector compensation inputs.
schematic
VCC +
Y
Y
A2
A1
8
6
10
5
11
7
9
4
12
13
CA2′
CA2
VCC –
2
3
14
1
15
2
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Z
Z
B2
B1
GND
CB2′
CB2
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltages (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
VCC – . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 8 V
Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Output sink current (any one output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Package thermal impedance, θJA (see Notes 2 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages, except differential out voltages, are with respect to network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
Peak-to-peak input voltage for each 30-dB stage
MAX
UNIT
0.01
1
V
0
70
°C
Operating free-air temperature, TA
electrical characteristics, VCC± = ±6 V, TA = 25°C
TEST
FIGURE
PARAMETER
MIN
TYP
MAX
±40
Differential output offset voltage
1
Quiescent output voltage
2
5.45
5.6
5.85
DC scale factor (differential output), each 3-dB stage, – 35 dBV to – 5 dBV
3
6
8
12
AC scale factor (differential output)
DC error at – 20 dBV (midpoint of – 35 dBV to – 5 dBV range)
3
Input impedance
Output impedance
mV
4
Supply current from VCC+
2
Supply current from VCC –
Power dissipation
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V
mV/dB
8
mV/dB
1
dB
500
Ω
Ω
200
Rise time, 10% to 90% points, CL = 24 pF
UNIT
20
30
ns
14.5
18.5
23
mA
2
–6
– 8.5
– 10.5
mA
2
123
162
201
mW
3
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
VCC+
ICC +
VCC–
VCC+
VCC–
ICC –
CA2 CA2′ VCC+ VCC–
Y
A1
CA2 CA2′ VCC + VCC –
Y
A1
A2
B1
Y
B2
Z
DVM
Z
Y
A2
B1
Z
B2
Z
CB2 CB2′ GND
CB2 CB2′ GND
VO
PD = VCC+
Figure 1
4
•
ICC+ + VCC–
Figure 2
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•
ICC–
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
PARAMETER MEASUREMENT INFORMATION
VCC+
VCC–
CA2 CA2′ VCC+ VCC–
Y
A1
Y
A2
B1
Z
B2
18 mV
100 mV
560 mV
Error
ƪ
ƪ
+
+
V
Z
CB2 CB2′ GND
DC
Power
Supply
Scale Factor
DVM
ƫ
–V
mV
out(560 mV) out(18mV)
30 dBV
–0.5 V
–0.5 V
Vout(100 mV)
out(560 mV)
out(18 mV)
Scale Factor
ƫ
Figure 3
VCC+
CI
Atten
100 mV
0 mV
Pulse
Generator
50 Ω
VCC–
1000 pF
CA2 CA2′ VCC+ VCC–
Y
A1
Y
A2
B1
Z
B2
Tektronix
Sampling Scope
With Digital
Readout or
Equivalent
Z
CB2 CB2′
GND
CL
CL
NOTES: A. The input pulse has the following characteristics: tw = 200 ns, tr ≤ 2 ns, tf ≤ 2 ns, PRR ≤ 10 MHz.
B. Capacitor CI consists of three capacitors in parallel: 1 µF, 0.1 µF, and 0.01 µF.
C. CL includes probe and jig capacitance.
Figure 4
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5
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
TYPICAL CHARACTERISTICS†
QUIESCENT OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL OUTPUT OFFSET VOLTAGE
vs
FREE-AIR TEMPERATURE
8
7
50
Quiescent Output Voltage – V
Differential Output Offset Voltage – mV
60
40
30
20
10
VCC ± = ± 6 V
See Figure 1
0
– 75 – 50 – 25
6
5
4
3
2
1
0
25
50
75
100
0
– 75 – 50 – 25
125
Figure 5
DC Error at Midpoint of 30-dBV Range – dBV
DC Scale Factor (Differential Output) – mV/dBV
10
8
6
4
VCC ± = ± 6 V
See Figure 3
25
50
75
100
125
DC ERROR
vs
FREE-AIR TEMPERATURE
12
0
25
Figure 6
DC SCALE FACTOR
vs
FREE-AIR TEMPERATURE
0
– 75 – 50 – 25
0
TA – Free-Air Temperature – °C
TA – Free-Air Temperature – °C
2
VCC ± = ± 6 V
See Figure 2
50
75
100
125
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
VCC ± = ± 6 V
See Figure 3
0
– 75 – 50 – 25
TA – Free-Air Temperature – °C
0
25
50
75
100
125
TA – Free-Air Temperature – °C
Figure 7
Figure 8
† Data at high and low temperatures are applicable only within the recommended operating free-air temperature ranges of the various devices.
6
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TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
TYPICAL CHARACTERISTICS
OUTPUT RISE TIME
vs
LOAD CAPACITANCE
t r – Output Rise Time – ns
25
20
15
10
VCC ± = ± 6 V
TA = 25°C
See Figure 4, outputs
loaded symmetrically
5
0
0
5
10
15
20
25
CL – Load Capacitance – pF
30
Figure 9
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7
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
Although designed for high-performance applications such as infrared detection, this device has a wide range
of applications in data compression and analog computation.
basic logarithmic function
functional block diagram
The basic logarithmic response is derived from
the exponential current-voltage relationship of
collector current and base-emitter voltage. This
relationship is given in the equation:
INPUT
A1
Log
–15 dB
m • VBE = In [(IC + ICES)/ICES]
where:
INPUT
B1
Log
–15 dB
Log
Log
CB2
CA2
IC =
ICES =
m =
VBE =
INPUT
A2
collector current
collector current at VBE = 0
Log
–15 dB
q/kT (in V – 1)
–15 dB
Log
base-emitter voltage
Log
Σ
CA2’
The differential input amplifier allows dual-polarity
inputs, is self-compensating for temperature
variations, and is relatively insensitive to
common-mode noise.
INPUT
B2
Log
Y
Σ
Y
Z
CB2’
Z
Outputs
Figure 10
logarithmic sections
As can be seen from the schematic, there are eight differential pairs. Each pair is a 15-dB log subsection, and
each input feeds two pairs, for a range of 30-dB per stage.
Four compensation points are available to allow slight variations in the gain (slope) of the two individual 15-dB
stages of input A2 and B2. By slightly changing the voltage on any of the compensation pins from their quiescent
values, the gain of that particular 15-dB stage can be adjusted to match the other 15-dB stage in the pair. The
compensation pins also can be used to match the transfer characteristics of input A2 to A1 or B2 to B1.
The log stages in each half of the circuit are summed by directly connecting their collectors together and
summing through a common-base output stage. The two sets of output collectors are used to give two log
outputs, Y and Y (or Z and Z), which are equal in amplitude, but opposite in polarity. This increases the versatility
of the device.
By proper choice of external connections, linear amplification, and linear attenuation, and many different
applications requiring logarithmic signal processing are possible
input levels
The recommended input voltage range of any one stage is given as 0.01 V to 1 V. Input levels in excess of
1 V may result in a distorted output. When several log sections are summed together, the distorted area of one
section overlaps with the next section and the resulting distortion is insignificant. However, there is a limit to the
amount of overdrive that can be applied. As the input drive reaches ± 3.5 V, saturation occurs, clamping the
collector-summing line and severely distorting the output. Therefore, the signal to any input must be limited to
approximately ± 3 V to ensure a clean output.
8
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TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
output levels
Differential-output-voltage levels are low, generally less than 0.6 V. As demonstrated in Figure 12, the output
swing and the slope of the output response can be adjusted by varying the gain by means of the slope control.
The coordinate origin also can be adjusted by positioning the offset of the output buffer.
circuits
Figures 12 through 19 show typical circuits using this logarithmic amplifier. Operational amplifiers not otherwise
designated are TLC271. For operation at higher frequencies, the TL592 is recommended instead of the
TLC271.
TYPICAL TRANSFER
CHARACTERISTICS
1.4
1.2
Output Voltage – V
1.0
Adjusted for Increased
Slope and Offset
0.8
0.6
0.4
0.2
Adjusted For Minimum
Slope With Zero Offset
0
– 0.2
10 – 4
10 –3
10 –2
10 –1
1
101
Input Voltage – V
A1
–
+
Y
Origin
1/2
TL441
+
–
Input
A2 GND
Y
Output
Slope
Figure 12. Output Slope and Origin Adjustment
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9
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
TRANSFER CHARACTERISTICS
OF TWO TYPICAL INPUT STAGES
0.4
Output Voltage – V
0.3
0.2
0.1
0
0.001
1
0.1
0.01
10
Input Voltage – V
2 kΩ, 1%
B1
2 kΩ, 1%
Z
20 kΩ
1/2
TL441
+
–
Output
2 kΩ, 1%
Input
B2 GND
Z
2 kΩ, 1%
Figure 13. Utilization of Separate Stages
10
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TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
TRANSFER CHARACTERISTICS
WITH BOTH SIDES PARALLELED
0.4
Output Voltage – V
0.3
0.2
0.1
0
0.001
0.01
1
0.1
10
Input Voltage – V
2 kΩ, 1%
A1
Y
A2
20 kΩ
TL441
Input
2 kΩ, 1%
Y
–
Z
B1
+
Output
2 kΩ, 1%
B2
GND
Z
2 kΩ, 1%
Figure 14. Utilization of Paralleled Inputs
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TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
TRANSFER CHARACTERISTICS
0.8
0.7
Output Voltage – V
0.6
0.5
0.4
0.3
0.2
0.1
0
10 – 4
10 –3
10 –2
10 –1
1
101
Input Voltage – V
2 kΩ
A1
Y
A2
Y
VCC + = 4 V
1 kΩ
15 kΩ
+
–
VCC – = – 4 V
5 kΩ
1 kΩ
20 kΩ
910 Ω
B1
Z
B2
Z
+
–
VCC + = 4 V
2 kΩ
+
–
100 Ω
Origin
TL441
910 Ω
Input
2 kΩ
Slope
5 kΩ
VCC – = – 4 V
5 kΩ
100 Ω
NOTES: A. Inputs are limited by reducing the supply voltages for the input amplifiers to ± 4 V.
B. The gains of the input amplifiers are adjusted to achieve smooth transitions.
Figure 15. Logarithmic Amplifier With Input Voltage Range Greater Than 80 dB
12
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Output
TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
R
A1
Y
TL441
A2
+
Input
A
–
R
R
R
R
+
Y
see
Note A
+
–
R
B1
+
B2
–
Y
1/2
TL441
A2
Y
+
–
Z
Input
B
OUTPUT W
(see Note B)
A1
–
Z
R
R
R
R
NOTES: A. Connections shown are for multiplication. For division, Z and Z connections are reversed.
B. Output W may need to be amplified to give actual product or quotient of A and B.
C. R designates resistors of equal value, typically 2 kΩ to 10 kΩ.
Multiplication: W = A • B ⇒ log W = log A + log B, or W = a(logaA + logaB)
Division: W = A/B ⇒ log W = log A – log B, or W = a(logaA + logaB)
Figure 16. Multiplication or Division
R
A1
Input
A
1/2
TL441
+
–
A2
nR
R
R
Y
–
R
+
–
B1
+
Y
+
–
B2
1/2
TL441
Z
Output
W
Z
R
nR
R
NOTE: R designates resistors of equal value, typically 2 kΩ to 10 kΩ. The power to which the input variable is raised is fixed by setting nR.
Output W may need to be amplified to give the correct value.
Exponential: W = An ⇒ log W = n log A, or W = a(n loga A)
Figure 17. Raising a Variable to a Fixed Power
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TL441
LOGARITHMIC AMPLIFIER
SLVS328 – OCTOBER 2000
APPLICATION INFORMATION
2 kΩ
Input
A
2 kΩ
Slope
Origin
–
A1
+
20 kΩ
+
A2
1/2
TL441
Y
Output
W
Y
–
2 kΩ
2 kΩ
NOTE: Adjust the slope to correspond to the base “a”.
Exponential to any base: W = a.
Figure 18. Raising a Fixed Number to a Variable Power
2.2 kΩ
A1
Input
1
TL592
0.2 µF
50 Ω
0.2 µF
0.2 µF
50 Ω
Output
1
1 kΩ
1 kΩ
Gain Adj.
2.2 kΩ
Z
20 kΩ
B2
Open
+
–
TL441
B1
+
–
0.2 µF
2.2 kΩ
50 Ω
TL592
TL592
Y
Gain Adj. = 400 Ω
For 30 dB
Input
2
20 kΩ
A2
+
–
Open
50 Ω
Y
TL592
0.2 µF
+
–
0.2 µF
Output
2
Z
CA2 CA2’ CB2 CB2’
10
10
kΩ
kΩ
2.2 kΩ
1 kΩ
1 kΩ
Gain Adj.
Gain Adj. = 400 Ω
For 30 dB
VCC –
Figure 19. Dual-Channel RF Logarithmic Amplifier With 50-dB Input Range Per Channel at 10 MHz
14
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IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright  2000, Texas Instruments Incorporated