LM555QML LM555QML Timer Literature Number: SNOSAP2B LM555QML Timer General Description The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For astable operation as an oscillator, the free running frequency and duty cycle are accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output circuit can source or sink up to 200mA or drive TTL circuits. Features n Direct replacement for SE555/NE555 n Timing from microseconds through hours n Operates in both astable and monostable modes n n n n n Adjustable duty cycle Output can source or sink 200 mA Output and supply TTL compatible Temperature stability better than 0.005% per ˚C Normally on and normally off output Applications n n n n n n n Precision timing Pulse generation Sequential timing Time delay generation Pulse width modulation Pulse position modulation Linear ramp generator Ordering Information NS Part Number SMD Part Number NS Package Number Package Description LM555H/883 H08A 8LD Metal Can LM555J/883 J08A 8LD Ceramic Dip Connection Diagrams Dual-In-Line Package Metal Can Package 20149833 Top View 20149803 Top View © 2006 National Semiconductor Corporation DS201498 www.national.com LM555QML Timer July 2006 LM555QML Schematic Diagram 20149801 www.national.com 2 LM555QML Absolute Maximum Ratings (Note 1) Supply Voltage +18V Power Dissipation (Note 2) Metal Can 760 mW CERDIP 1180 mW −55˚C ≤ TA ≤ +125˚C Operating Temperature Range Maximum Junction Temperature (TJmax) +150˚C −65˚C ≤ TA ≤ +150˚C Storage Temperature Range Soldering Information (Soldering 10 Seconds) 260˚C Thermal Resistance θJA CERDIP Still Air 125˚C/W CERDIP 500LF / Min Air Flow 71˚C/W Metal Can Still Air 176˚C/W Metal Can 500LF / Min Air Flow 96˚C/W θJC CERDIP 20˚C/W Metal Can 42˚C/W ESD Tolerance (Note 3) 500V Quality Conformance Inspection Mil-Std-883, Method 5005 - Group A Subgroup Description Temp ˚C 1 Static tests at 25 2 Static tests at 125 3 Static tests at -55 4 Dynamic tests at 25 5 Dynamic tests at 125 6 Dynamic tests at -55 7 Functional tests at 25 8A Functional tests at 125 8B Functional tests at -55 9 Switching tests at 25 10 Switching tests at 125 11 Switching tests at -55 12 Settling time at 25 13 Settling time at 125 14 Settling time at -55 3 www.national.com LM555QML Electrical Characteristics DC Parameters The following conditions apply to all the following parameters, unless otherwise specified. DC: +5V ≤ VCC ≤ +15V Symbol ICCL Max Unit Subgroups VCC = 5V, RL = ∞ 5.0 mA 1 VCC = 15V, RL = ∞ 12.0 mA 1 VCC = 18V, RL = ∞, V2 = V6 = 18V 18.5 mA 1 100 nA 1 Parameter Supply Current Low State Conditions Notes Min IL7 Leakage Current Pin 7 VCC = 18V, V7 = 18V, V 2 = V6 = 0 VSat Saturation Voltage Pin 7 VCC = 15V, I7 = 15mA, V2 = V6 = 12V (Note 6) 240 mV 1 VCC = 4.5V, I7 = 4.5mA (Note 6) 80 mV 1 VCO Control Voltage VCC = 5V, V2 = V6 = 4V 2.9 3.8 V 1, 2, 3 VCC = 15V, V2 = V6 = 12V 9.6 10.4 V 1, 2, 3 9.5 VTh Threshold Voltage 10.5 V 1 ITh Threshold Current V6 = VTh, V2 = 7.5V, (Note 7) VTh = VTh Test Measured Value 250 nA 1 ITrig Trigger Current V2 = 0 500 nA 1 VTrig Trigger Voltage VCC = 15V 4.8 5.2 V 1 3.0 6.0 V 2, 3 1.45 1.9 V 1, 2, 3 0.4 mA 1 0.4 1.0 V 1 250 mV 1, 2, 3 VCC = 15V, ISink = +10mA, V2 = V6 = 15V 150 mV 1 250 mV 2, 3 VCC = 15V, ISink = +50mA, V2 = V6 = 15V 500 mV 1 800 mV 2, 3 2.2 V 1, 2, 3 VCC = 5V IReset Reset Current VReset Reset Voltage VOL Output Voltage Drop Low (Note 4) V2 = V6 = Gnd VCC = 5V, ISink = +8mA, V7 = 5V, V6 = 5V VCC = 15V, ISink = +85mA, V2 = V6 = 15V VOH Output Voltage Drop High VCC = 15V, ISource= 85mA VCC = 5V, ISource = 85mA 13 V 1 12.75 V 2, 3 3 V 1 V 2, 3 2.75 Aƒ A Stable Frequency tE Timing Error ∆tE / ∆VCC Timing Drift with Supply www.national.com (Note 5) 51 KHz 1 (Note 5) ±2 % 1, 2, 3 VCC = 15V, 1KΩ ≤ RA ≤ 100KΩ, Timing error decreases with an (Note 5) increase in VCC ±2 % 1, 2, 3 5V ≤ VCC ≤ 15V 0.2 %/V 1, 2, 3 VCC = 5V (Note 5) 4 45 LM555QML Electrical Characteristics (Continued) AC Parameters The following conditions apply to all the following parameters, unless otherwise specified. AC: +5V ≤ VCC ≤ +15V Symbol tR tF Parameter Rise Time Fall Time Conditions VTrig = 5V VTrig = 5V Notes Min Max Unit Subgroups 9, 10 (Note 5) 250 nS (Note 5) 400 nS 11 (Note 5) 250 nS 9, 10 (Note 5) 400 nS 11 Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Note 3: Human body model, 1.5KΩ in series with 100pF. Note 4: Guaranteed by tests at VCC = 15V. Note 5: Guaranteed parameter, not tested. Note 6: No protection against excessive pin 7 current is necessary providing the package dissipation rating will not be exceeded. Note 7: This will determine the maximum value of RA + RB for 15V operation. The maximum total (RA + RB) is 20MΩ. 5 www.national.com LM555QML Typical Performance Characteristics Minimum Pulse Width Required for Triggering Supply Current vs. Supply Voltage 20149819 20149804 High Output Voltage vs. Output Source Current Low Output Voltage vs. Output Sink Current 20149821 20149820 Low Output Voltage vs. Output Sink Current Low Output Voltage vs. Output Sink Current 20149823 20149822 www.national.com 6 LM555QML Typical Performance Characteristics (Continued) Output Propagation Delay vs. Voltage Level of Trigger Pulse Output Propagation Delay vs. Voltage Level of Trigger Pulse 20149825 20149824 Discharge Transistor (Pin 7) Voltage vs. Sink Current Discharge Transistor (Pin 7) Voltage vs. Sink Current 20149827 20149826 7 www.national.com LM555QML during this time by the application of a negative pulse to the reset terminal (pin 4). The output will then remain in the low state until a trigger pulse is again applied. Applications Information MONOSTABLE OPERATION When the reset function is not in use, it is recommended that it be connected to VCC to avoid any possibility of false triggering. In this mode of operation, the timer functions as a one-shot (Figure 1). The external capacitor is initially held discharged by a transistor inside the timer. Upon application of a negative trigger pulse of less than 1/3 VCC to pin 2, the flip-flop is set which both releases the short circuit across the capacitor and drives the output high. Figure 3 is a nomograph for easy determination of R, C values for various time delays. NOTE: In monostable operation, the trigger should be driven high before the end of timing cycle. 20149805 20149807 FIGURE 1. Monostable FIGURE 3. Time Delay The voltage across the capacitor then increases exponentially for a period of t = 1.1 RA C, at the end of which time the voltage equals 2/3 VCC. The comparator then resets the flip-flop which in turn discharges the capacitor and drives the output to its low state. Figure 2 shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing interval is independent of supply. ASTABLE OPERATION If the circuit is connected as shown in Figure 4 (pins 2 and 6 connected) it will trigger itself and free run as a multivibrator. The external capacitor charges through RA + RB and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors. 20149806 VCC = 5V Top Trace: Input 5V/Div. TIME = 0.1 ms/DIV. RA = 9.1kΩ Middle Trace: Output 5V/Div. Bottom Trace: Capacitor Voltage 2V/Div. C = 0.01µF 20149808 FIGURE 2. Monostable Waveforms FIGURE 4. Astable During the timing cycle when the output is high, the further application of a trigger pulse will not effect the circuit so long as the trigger input is returned high at least 10µs before the end of the timing interval. However the circuit can be reset In this mode of operation, the capacitor charges and discharges between 1/3 VCC and 2/3 VCC. As in the triggered mode, the charge and discharge times, and therefore the frequency are independent of the supply voltage. www.national.com 8 FREQUENCY DIVIDER (Continued) The monostable circuit of Figure 1 can be used as a frequency divider by adjusting the length of the timing cycle. Figure 7 shows the waveforms generated in a divide by three circuit. Figure 5 shows the waveforms generated in this mode of operation. 20149809 VCC = 5V Top Trace: Output 5V/Div. TIME = 20µs/DIV. Bottom Trace: Capacitor Voltage 1V/Div. 20149811 VCC = 5V Top Trace: Input 4V/Div. RA = 3.9kΩ TIME = 20µs/DIV. Middle Trace: Output 2V/Div. RB = 3kΩ RA = 9.1kΩ Bottom Trace: Capacitor 2V/Div. C = 0.01µF C = 0.01µF FIGURE 5. Astable Waveforms FIGURE 7. Frequency Divider The charge time (output high) is given by: t1 = 0.693 (RA + RB) C And the discharge time (output low) by: t2 = 0.693 (RB) C Thus the total period is: T = t1 + t2 = 0.693 (RA +2RB) C The frequency of oscillation is: PULSE WIDTH MODULATOR When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to pin 5. Figure 8 shows the circuit, and in Figure 9 are some waveform examples. Figure 6 may be used for quick determination of these RC values. The duty cycle is: 20149812 FIGURE 8. Pulse Width Modulator 20149810 FIGURE 6. Free Running Frequency 9 www.national.com LM555QML Applications Information LM555QML Applications Information (Continued) 20149813 VCC = 5V 20149815 Top Trace: Modulation 1V/Div. TIME = 0.2 ms/DIV. VCC = 5V Bottom Trace: Output Voltage 2V/Div. Top Trace: Modulation Input 1V/Div. TIME = 0.1 ms/DIV. RA = 9.1kΩ Bottom Trace: Output 2V/Div. RA = 3.9kΩ C = 0.01µF RB = 3kΩ C = 0.01µF FIGURE 9. Pulse Width Modulator FIGURE 11. Pulse Position Modulator PULSE POSITION MODULATOR This application uses the timer connected for astable operation, as in Figure 10, with a modulating signal again applied to the control voltage terminal. The pulse position varies with the modulating signal, since the threshold voltage and hence the time delay is varied. Figure 11 shows the waveforms generated for a triangle wave modulation signal. LINEAR RAMP When the pullup resistor, RA, in the monostable circuit is replaced by a constant current source, a linear ramp is generated. Figure 12 shows a circuit configuration that will perform this function. 20149816 20149814 FIGURE 12. FIGURE 10. Pulse Position Modulator Figure 13 shows waveforms generated by the linear ramp. The time interval is given by: VBE . 0.6V www.national.com 10 LM555QML Applications Information (Continued) 20149817 VCC = 5V Top Trace: Input 3V/Div. TIME = 20µs/DIV. Middle Trace: Output 5V/Div. R1 = 47kΩ Bottom Trace: Capacitor Voltage 1V/Div. 20149818 R2 = 100kΩ RE = 2.7 kΩ FIGURE 14. 50% Duty Cycle Oscillator C = 0.01 µF Note that this circuit will not oscillate if RB is greater than 1/2 RA because the junction of RA and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator. FIGURE 13. Linear Ramp 50% DUTY CYCLE OSCILLATOR For a 50% duty cycle, the resistors RA and RB may be connected as in Figure 14. The time period for the output high is the same as previous, t1 = 0.693 RA C. For the output low it is t2 = ADDITIONAL INFORMATION Adequate power supply bypassing is necessary to protect associated circuitry. Minimum recommended is 0.1µF in parallel with 1µF electrolytic. Lower comparator storage time can be as long as 10µs when pin 2 is driven fully to ground for triggering. This limits the monostable pulse width to 10µs minimum. Delay time reset to output is 0.47µs typical. Minimum reset pulse width must be 0.3µs, typical. Thus the frequency of oscillation is Pin 7 current switches within 30ns of the output (pin 3) voltage. 11 www.national.com LM555QML Revision History Date Released Revision Section Originator 08/04/05 A 04/10/06 B Ordering Information Table R. Malone NS Package Number and Description was referenced incorrectly. Revision A will be Archived. 07/25/06 C Applications Information, page 8 R. Malone Correct a typo in the paragraph after figure 1 (change the word internal to interval) to reflect same change made to Commercial data sheet. Revision B will be Archived. www.national.com New Release to corporate format 12 L. Lytle Changes 1 MDS datasheet converted into once datasheet in the corporate format. Removed drift endpoints since not performed on 883 product. MNLM555-X Rev 0B0 to be archived LM555QML Physical Dimensions inches (millimeters) unless otherwise noted 8LD Ceramic Dip Package (J) NS Package Number J08A 13 www.national.com LM555QML Timer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8LD Metal Can Package (H) NS Package Number H08A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. For the most current product information visit us at www.national.com. LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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