DP8224 Clock Generator and Driver General Description Features The DP8224 is a clock generator/driver contained in a standard, 16-pin dual-in-line package. The chip, which is fabricated using Schottky Bipolar technology, generates clocks and timing for the 8080A microcomputer family. Included in the DP8224 is an oscillator circuit that is controlled by an external crystal, which is selected by the designer to meet a variety of system speed requirements. Also included in the chip are circuits that provide: a status strobe for the DP8228 or DP8238 system controllers, power-on reset for the 8080A microprocessor, and synchronization of the READY input to the 8080A. Y Y Y Y Y Y Y Crystal-controlled oscillator for stable system operation Single chip clock generator and driver for 8080A microprocessor Provides status strobe for DP8228 or DP8238 system controllers Provides power-on reset for 8080A microprocessor Synchronizes READY input to 8080A microprocessor Provides oscillator output for synchronization of external circuits Reduces system component count 8080A Microcomputer Family Block Diagram TL/F/8752 – 1 C1995 National Semiconductor Corporation TL/F/8752 RRD-B30M105/Printed in U. S. A. DP8224 Clock Generator and Driver June 1986 Absolute Maximum Ratings (Note 2) Operating Conditions If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage VCC VDD Supply Voltage VCC VDD Temperature (TA) 7V 15V b 1V to a 5.5V b 65§ C to a 150§ C Input Voltage Storage Temperature Range Maximum Power Dissipation* at 25§ C Cavity Package Molded Package Lead Temperature (Soldering, 4 seconds) Min Max Units 4.75 11.4 0 5.25 12.6 a 70 V V §C 1509 mW 1476 mW 260§ C * Derate cavity package 10.1 mW/§ C above 25§ C; derate molded package 11.8 mW/§ C above 25§ C. Electrical Characteristics (Note 3) Max Units IF Symbol Input Current Loading Parameter VF e 0.45V Conditions b 0.25 mA IR Input Leakage Current VR e 5.25V 10 mA VC Input Forward Clamp Voltage IC e b5 mA b 1.0 V VIL Input ‘‘Low’’ Voltage VCC e 5V 0.8 V VIH Input ‘‘High’’ Voltage RESIN Input 2.6 2.0 V 0.25 V RESIN Input Hysteresis VCC e 5V VOL Output ‘‘Low’’ Voltage (w1, w2), Ready, Reset STSTB Osc., w2 (TTL) Osc., w2 (TTL) IOL e 2.5 mA IOL e 10 mA IOL e 15 mA Output ‘‘High’’ Voltage w1, w2 Ready, Reset Osc., w2 (TTL), STSTB IOH e b100 mA IOH e b100 mA IOH e b1 mA ISC Output Short-Circuit Current (All Low Voltage Outputs Only), (Note 1) Typ All Other Inputs VIHbVIL VOH Min V 0.45 0.45 0.45 9.4 3.6 2.4 V V V V V V VO e 0V, VCC e 5V b 10 b 60 mA ICC Power Supply Current 115 mA IDD Power Supply Current 12 mA Note 1: Caution b w1 and w2 output drivers do not have short circuit protection. Note 2: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. Except for ‘‘Operating Temperature Range’’ they are not meant to imply that the devices should be operated at these limits. The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation. Note 3: Unless otherwise specified min/max limits apply across the 0§ C to a 70§ C range for the DP8224. All typical values are for TA e 25§ C, VCC e 5V, and VDD e 12V. Crystal Requirements* Tolerance Resonance Load Capacitance 0.005% at 0§ C to a 70§ C Fundamental 20 pF to 30 pF Equivalent Resistance Power Dissipation (Min) *It is good design practice to ground the case of the crystal **With tank circuit, use 3rd overtone mode 2 75X to 20X 4 mW Switching Characteristics (Note 3) Symbol Parameter Conditions Min Typ Max Units tw1 w1 Pulse Width 2tCY b 20 9 ns tw2 w2 Pulse Width 5tCY b 35 9 ns tD1 w1 to w2 Delay 0 ns tD2 w2 to w1 Delay 2tCY b 14 9 ns tD3 w1 to w2 Delay 2tCY 9 tr w1 and w2 Rise Time tf w1 and w2 Fall Time tDw2 w2 to w2 (TTL) Delay tDSS w2 to STSTB Delay tPW STSTB Pulse Width tDRS RDYIN Set-Up Time to Status Strobe tDRH RDYIN Hold Time After STSTB tDR READY or RESET to w2 Delay tCLK CLK Period fMAX Maximum Oscillating Frequency CIN Input Capacitance CL e 20 pF to 50 pF w2 TTL, CL e 30 pF, R1 e 300X, R2 e 600X STSTB, CL e 15 pF 2tCY a 20 9 ns 20 ns 20 ns b5 15 ns 6tCY b 30 9 6tCY 9 ns tCY b 15 9 ns 4tCY 9 ns R1 e 2 kX, R2 e 4 kX 50 b Ready and Reset, CL e 10 pF, R1 e 2 kX, R2 e 4 kX 4tCY 9 ns 4tCY b 25 9 ns tCY 9 ns 27 VCC e 5V, VDD e 12V, VBIAS e 2.5V, f e 1 MHz 8 Test Circuit TL/F/8752 – 2 3 MHz pF Waveforms TL/F/8752 – 3 Voltage Measurement Points: w1, w2 Logic ‘‘0’’ e 1.0V, Logic ‘‘1’’ e 8.0V. All other signals measured at 1.5V. Switching Characteristics (For tCY e 488.28 ns) Symbol Parameter Conditions Min Typ Max Units tw1 w1 Pulse Width 89 tw2 w2 Pulse Width 236 ns tD1 Delay w1 to w2 0 ns tD2 Delay w2 to w1 95 tD3 Delay w1 to w2 Leading Edges 109 tr Output Rise Time tf Output Fall Time tDSS w2 to STSTB Delay tDw2 w2 to w2 (TTL) Delay tPW Status Strobe Pulse Width 40 ns tDRS RDYIN Set-Up Time to STSTB b 167 ns tDRH RDYIN Hold Time after STSTB 217 ns tDR READY or RESET to w2 Delay 192 fMAX Oscillator Frequency w1 and w2 Loaded to CL e 20 to 50 pF Ready and Reset Loaded to 2 mA/10 pF All Measurements Referenced to 1.5V unless Specified Otherwise ns ns 129 ns 20 ns 20 ns 296 326 ns b5 15 ns ns 18.432 4 MHz Functional Pin Definitions The following describes the function of all of the DP8224 input/output pins. Some of these descriptions reference internal circuits. For manual system reset, a momentary contact switch that provides a low (ground) when closed is also connected to the RESIN input. INPUT SIGNALS Crystal Connections (XTAL 1 and XTAL 2): Two inputs that connect an external crystal to the oscillator circuit of the DP8224. Normally, a fundamental mode crystal is used to determine the basic operating frequency of the oscillator. However, overtone mode crystals may also be used. The crystal frequency is 9 times the desired microprocessor speed (that is, crystal frequency equals 1/tCY c 9). When the crystal frequency is above 10 MHz, a selected capacitor (3 to 10 pF) may have to be connected in series with the crystal to produce the exact desired frequency. Figure A . Tank: Allows the use of overtone mode crystals with the oscillator circuit. When an overtone mode crystal is used, the tank input connects to a parallel LC network that is ac coupled to ground. The formula for determining the resonant frequency of this LC network is as follows: Ready In (RDYIN): An asynchronous READY signal that is re-clocked by a D-type flip-flop of the DP8224 to provide the synchronous READY output discussed below. Fe a 5 Volts: VCC supply. a 12 Volts: VDD supply. Ground: 0 volt reference. OUTPUT SIGNALS Oscillator (OSC): A buffered oscillator signal that can be used for external timing purposes. w1 and w2 Clocks: Two non-TTL compatible clock phases that provide nonoverlapping timing references for internal storage elements and logic circuits of the 8080A microprocessor. The two clock phases are produced by an internal clock generator that consists of a divide-by-nine counter and the associated decode gating logic. Figure B . w2 (TTL) Clock: A TTL w2 clock phase that can be used for external timing purposes. Status Strobe (STSTB): Activated (low) at the start of each new machine cycle. The STSTB signal is generated by gating a high-level SYNC input with the w1A timing signal from the internal clock generator of the DP8224. The STSTB signal is used to clock status information into the status latch of the DP8228 system controller and bus driver. Reset: When the RESET signal is activated, the content of the program counter of the 8080A is cleared. After RESET, the program will start at location 0 in memory. Ready: The READY signal indicates to the 8080A that valid memory or input data is available. This signal is used to synchronize the 8080A with slower memory or input/output devices. 1 2q 0LC Synchronizing (SYNC) Signal: When high, indicates the beginning of a new machine cycle. The 8080A microprocessor outputs a status word (which describes the current machine cycle) onto its data bus during the first state (SYNC interval) of each machine cycle. Reset In (RESIN): Provides an automatic system reset and start-up upon application of power as follows. The RESIN input, which is obtained from the junction of an external RC network that is connected between VCC and ground, is routed to an internal Schmitt Trigger circuit. This circuit converts the slow transition of the power supply rise into a sharp, clean edge when its input reaches a predetermined value. When this occurs, an internal D-type flip-flop is synchronously reset, thereby providing the RESET output signal discussed below. Logic and Connection Diagrams Dual-In-Line Package TL/F/8752 – 5 Top View Order Number DP8224J or DP8224N See NS Package Number J16A or N16A TL/F/8752 – 4 5 Applications Information TL/F/8752 – 7 EXAMPLE: (8080 tCY e 500 ns) OSC e 18 MHz/55 ns w1 e 110 ns (2 c 55 ns) w2 e 275 ns (5 c 55 ns) w2 – w1 e 110 ns (2 c 55 ns) FIGURE B. DP8224 Clock Generator Waveforms TL/F/8752–6 FIGURE A. DP8224 Connection Diagram 6 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number DP8224J NS Package Number J16A 7 DP8224 Clock Generator and Driver Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number DP8224N NS Package Number N16A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. National Semiconductor Europe Fax: (a49) 0-180-530 85 86 Email: cnjwge @ tevm2.nsc.com Deutsch Tel: (a49) 0-180-530 85 85 English Tel: (a49) 0-180-532 78 32 Fran3ais Tel: (a49) 0-180-532 93 58 Italiano Tel: (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd. 13th Floor, Straight Block, Ocean Centre, 5 Canton Rd. Tsimshatsui, Kowloon Hong Kong Tel: (852) 2737-1600 Fax: (852) 2736-9960 National Semiconductor Japan Ltd. Tel: 81-043-299-2309 Fax: 81-043-299-2408 National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.