Fast PFET Buck Controller LM51031 FEATURES 1.0 A Totem Pole Output Driver SOP-8 PKG High Speed Oscillator (700 kHz max) No Stability Compensation Required Lossless Short Circuit Protection Vcc Monitor 2.0% Precision Reference Programmable Soft-Start Moisture Sensitivity Level 3 DESCRIPTION The LM51031 is a switching contoller for use in DC-DC converters. It can be used in the buck topology with a minimum number of external components. The LM51031 consists of a Vcc monitor for controlling the state of the device, 1.0A power driver for controlling the gate of a discrete P-Channel transistor, fixed frequency oscillator, short circuit protection timer, programmable Soft-Start, precision reference, fast output voltage monitoring comparator, and output stage driver logic with latch. ORDERING INFORMATION Device Marking Package LM51031D LM51031 SOP-8 The high frequency oscillator allows the use of small inductiors and output capacitors, minimizing PC board area and system cost. The programmable Soft-Start reduces current surges at startup. The short circuit protection timer signifaicantly reduces the duth cycle to approximately 1/30 of its cycle during short circuit conditions. Typical Application (Fixed Output Voltage Versions) Figure 1. Block Diagram and Typical Application HTC 2008 - Ver. 1.0 −1− Fast PFET Buck Controller LM51031 MAXIMUM RATINGS (Absolute Maximum Ratings indicate limits beyond which damage to the device may occur) Rating Symbol Value Unit VCC 20 V Driver Supply Voltage VC 20 V Driver Output Voltage VGATE 20 V COSC, CS, VFB (Logic Pin) - 6 V Peak Output Current - 1 A Steady State Out Current - 200 mA Operating Junction Temperature TJ 0 to 125 ℃ Operating Ambient Temperature Range TA 0 to 70 ℃ Storage Temperature Range TS -65 to 150 ℃ ESD (Human Body Model) - 2.0 kV Wave Solder (through hole sytle only) (note 1) - 260 peak ℃ Reflow (SMD styles only) (note 2) - 230 peak ℃ Maximum Supply Voltage Lead Temperature Soldering Maximum ratings are those value beyond which device damage con occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliablilty may be affected. 1. 10 sec. maximum. 2. 60 sec. max above 183℃ PACKAGE LEAD DESCRIPTION Package Pin Number Pin Symbol Function 1 VGATE Driver pin to gate of external P-ch FET. 2 PGND Output power stage ground connection. 3 COSC Oscilator frequency programming capacitor. 4 GND Logic ground. 5 VFB Feedback voltage input. 6 VCC Logic supply voltage. 7 CS Soft-Start and fault timing capacitor. 8 VC Driver supply Voltage. HTC −2− Fast PFET Buck Controller LM51031 ELECTRICAL CHARACTERISTICS (Specifications apply for 4.5V ≤ VCC ≤ 16V, 3V ≤ VC ≤ 16V, 0℃ ≤ TJ ≤ 125℃, unless otherwise specified.) Characteristic Oscillator Test Conditions Min TYP Max Unit 160 200 240 kHz - 110 - uA - 680 - uA 80.0 83.3 - % uA uA uA ms ms ms % VFB = 1.2V Frequency COSC = 470 pF Charge Current 1.4 V < VCOSC < 2.0 V Discharge Current 2.7 V > VCOSC > 2.0 V Maximum Duty Cycle 1 - (tOFF/tON) Short Circuit Timer VFB = 1.0 V; CS = 0.1 uF; V COSC = 2.0 V Charge Current 1.0 V < VCS < 2.0 V 175 264 325 Fast Discharge Current 2.55 V > VCS < 2.4 V 40.0 66 80 Slow Discharge Current 2.4 V < VCS < 1.5 V 4.0 6 10 Start Fault Inhibit Time 0 V < VCS < 2.5 V 0.7 0.85 1.4 Valid Fault Time 2.6 V > VCS > 2.4 V 0.2 0.3 0.45 GATE Inhibit Time 2.4 V > VCS > 1.5 V 9.0 15 23 2.5 3.1 4.6 Fault Duty Cycle - CS Comparator VFB = 1.0 V Fault Enable CS Voltage - - 2.5 - Max CS Voltage VFB = 1.5 V - 2.6 - Fault Detect Voltage VCS = when GATE goes high - 2.4 - Fault Inhibit Voltage Minimum VCS Hold Off Release Voltage VFB = 0 V Regulator Threshold Voltage Clamp VCS = 1.5 V - 1.5 - 0.4 0.7 1.0 0.725 0.866 1.035 V V V V V V CFB Comparator VCOSC = VCS = 2.0 V Regulator Threshold Voltage TJ = 25℃ (Note 3) 1.225 1.250 1.275 V TJ = 0 to 125℃ 1.210 1.250 1.290 V TJ = 25℃ (Note 3) 1.12 1.15 1.17 V TJ = 0 to 125℃ Fault Threshold Voltage 1.10 1.15 1.19 V Threshold Line Regulation 4.5 V ≤ VCC ≤ 16 V - 6 15 mV Input Bias Current Voltage Tracking VFB = 0 V - 1 4 uA (Regulator Threshold - Fault 70 100 120 mV Input Hysteresis Voltage Threshold Voltage) - - 4.0 20 mV V Power Stage VCC = V C = 10 V; V FB = 1.2 V GATE DC low Saturation Voltage VCOSC = 1.0V;200 mA Sink - 1.2 1.5 GATE DC High Saturation Voltage VCOSC = 2.7V;200 mA Source; VC=VGATE - 1.5 2.1 V Rise Time CGATE = 1.0 nF; 1.5 V < VGATE < 9.0 V - 25 60 ns Fall Time CGATE = 1.0 nF; 1.5 V < VGATE < 9.0 V - 25 60 ns - 4.100 4.300 4.500 V Turn-Off Threshold - 4.085 4.200 4.415 V Hysteresis - 65 130 200 mV VCC Monitor Turn-On Threshold Current Drain ICC 4.5 V < VCC < 16 V, Gate switching 4.5 6.0 mA IC 3.0 V < VC < 16 V, Gate Nonswitching 2.7 4.0 mA Shutdown ICC VCC = 4.0 500 900 A 3. Guaranteed by design, not 100% tested in production. HTC −3− Fast PFET Buck Controller LM51031 Figure 2. Block Diagram THEORY OF OPERATION Control Scheme The LM51031 monitors and the output voltage to operate. This method of control does not its require any determine when to turn on the PFET. If VFB falls loop stability compensation. below the internal reference voltage of 1.25V during Startup theoscillator’s charge cycle, the PFET is turned on The LM51031 has an externally programmable soft start and remains on for the duration.of the charge time. feature that allows the output voltage to come up The PFET gets turned off and remains off during slowly preventing voltage overshoot on the output. the oscillator’s discharge time with the maximum At startup, the voltage on all pins is zero. As VCC rises, duty cycle to 80%. It requires 7mV typical, and the VC voltage along with the internal resistor RG keeps 20mV maximum ripple on the V FB pin is required to HTC −4− Fast PFET Buck Controller LM51031 the PFET off. As VCC and VC continue to rise, the Lossless Short Circuit Protection oscillator capacitor (COSC) and Soft start/Fault The LM51031 has “lossless” short circuit protection Timing capacitor(CS) charges via internal current since there is no current sense resistor reguired. sources. COSC gets charged by the current source When the voltage at the CS pin (the fault timing IC and CS gets charged by the IT source capacitor voltage) reaches 2.5V during startup, the combination described by: fault timing circuitry is enabled. During normal operation the CS voltage is 2.6V. During a short circuit or a transient condition, the output voltage moves lower and the voltage at VFB drops. If VFB drops below 1.15V, the output of the fault comparator goes high and the The internal Holdoff Comparator ensures that the LM51031 goes into a fast discharge mode. The fault external PFET is off until VCS > 0.7V, preventing the timing capacitor, CS, discharges to 2.4V. If the VFB GATE flip-flop (F2) from being set. This allows the voltage is still below 1.15V when the CS pin reaches oscillator to reach its operating frequency before 2.4V, a valid fault condition has been detected. The enabling the drive output. Soft start is obtained by slow discharge comparator output goes high and clamping the VFB comparator’s (A6) reference input enables gate G5 which sets the slow discharge flip to approximately 1/2 of the voltage at the CS pin flop. The Vgate flip flop resets and the output switch is during startup, permitting the control loop and the turned off. The fault timing capacitor is slowly output voltage to slowly increase. Once the CS pin discharged to 1.5V. The LM51031 then enters a normal charges above the Holdoff Comparator trip point of startup routine. If the fault is still present when the 0.7V, the low feedback to the VFB Comparator sets fault timing capacitor voltage reaches 2.5V, the fast and the GATE flip-flop during COSC ’s charge cycle. slow discharge cycles repeat as shown in figure 2. Once the GATE flip-flop is set, VGATE goes low and If the VFB voltage is above 1.15V when CS reaches turns on the PFET. When VCS exceeds 2.4V, the CS 2.4V a fault condition is not detected, normal operation charge sense comparator (A4) sets the V FB resumes and CS charges back to 2.6V. This reduces the comparator reference to 1.25V completing the startup chance of erroneously detecting a load transient as a cycle. fault condition. Figure 3. Voltage on Start Capacitor (V GS), the Gate (VGATE), and in the Feedback Loop (VFB), During Startup, Normal and Fault Conditions HTC −5− Fast PFET Buck Controller LM51031 Buck Regulator Operation A block diagram of a typical buck regulator is shown resistors R1 and R2 and he reference voltage VREF, in Figure 4. If we assume that the output transistor is the power transistor Q1 switches on and current flows initially off, and the system is in discontinuous through the inductor to the output. The inductor current operation, the inductor current IL is zero and the rises at a rate determined by (VIN − VOUT)/L. output voltage is at its nominal value. The current The duty cycle (or “on” time) for the LM51031 is limited drawn by the load is supplied by the output to 80%. If output voltage remains to 80%. If output voltag capacitor CO. When the voltage across CO drops remains higher than nominal during the entire C OSC below the threshold established by the feedback change time, the Q1 does not turn on, skipping the pulse Figure 4. Buck Regulator Block Diagram APPLICATIONS INFORMATION LM51031 Design Example Specications 12 V to 5.0 V, 3.0 A Buck Controller continuous conduction mode is given by: Vin = 12 V ±20% (i.e. 14.4 V max, 121 V nom, 9.6 V min) Vout = 5.0 V±2% Iout = 0.3 A to 3.0 A Output ripple voltage < 50 mV max Efficiency > 80% fSW = 200 kHz where: VSAT = RDS(ON) × IOUT max and RDS(ON) is the value at TJ 100°C. If VF = 0.60 V and VSAT = 0.60 V then the above equati becomes: 1) Duty Cycle Estimates Since the maximum duty cycle D, of the LM51031 is limited to 80% min, it is necessary to estimate the duty cycle for the various input condidtions over the complete operating range. The duty cycle for a buck regulator operating in a HTC −6− Fast PFET Buck Controller LM51031 2) Switching Frequency and On and Off Time Calculations Given that fSW = 200 kHz and DMAX = 0.80 impedance aluminum are less expensive. of suppliers and are the best choice for surface mount Solid tantalum chip capacitors are available from a numb of suppliers and are the best choice for surface mount applications. The output capacitor limits the output ripple voltage. The LM51031 needs a maximum of 20 mV of output ripple for the feedback comparator to change state. If we assume that all the inductor ripple current flows through the output capacitor and that it is an ideal capacitor (i.e. zero ESR), 3) Oscillator Capacitor Selection The switching frequency is set by COSC, whose the minimum capacitance needed to limit the output ripple to 50 mV peak−to−peak is given by: value is given by: The minimum ESR needed to limit the output voltage ripple to 50 mV peak−to−peak is: 4) Inductor Selection The inductor value is chosen for continuous mode operation down to 0.3 Amps. The ripple current ∆I = 2 × IOUTmin = 2 × 0.3 A The output capacitor should be chosen so that its ESR is less than 83 mΩ. During the minimum off time, the ripple current is 0.4 A and the output voltage ripple will be: = 0.6 A This is the minimum value of inductor to keep the 6) VFB Divider ripple current < 0.6 A during normal operation. A smaller inductor will result in larger ripple current. Ripple current at a minimum off time is: The input bias current to the comparator is 4.0 uA. The resistor divider current should be considerably higher than this to ensure that there is sufficient bias current. If we The core must not saturate with the maximum expected current, here given by: choose the divider current to be at least 250 times the bia current this permits a divider current of 1.0 mA and simplifies the calculations. 5) Output Capacitor Let R2 = 1.0 K The output capacitor and the inductor form a low Rearranging the divider equation gives: pass filter. The output capacitor should have a low ESL and ESR. Low impedance aluminum electrolytic, tantalum or organic semiconductor capacitors are a good choice for an output capacitor. Low HTC −7− Fast PFET Buck Controller LM51031 7) Divider Bypass Capacitor CRR Since the feedback resistors divide the output voltage by a factor of 4.0, i.e. 5.0 V/1.25 V = 4.0, it follows that the output ripple is also divided by The fast discharge time occurs when a fault is first detected. The CS capacitor is discharged from 2.5 V to 2 four. This would require that the output ripple be at comparator. We use a capacitor CRR to act as an least 60 mV (4.0 × 15 mV) to trip the feedback AC short. The ripple voltage frequency is equal to the where IFastDischarge is 66 uA typical. switching frequency so we choose CRR = 1.0 nF. 8) Soft−Start and Fault Timing Capacitor CS CS performs several important functions. First it The recharge time is the time for CS to charge from 1.5 to 2.5 V. provides a delay time for load transients so that the IC does not enter a fault mode every time the load changes abruptly. Secondly it disables the fault circuitry during startup, it also provides Soft−Start where ICharge is 264 uA typical. by clamping the reference voltage during startup, allowing it to rise slowly, and, finally it controls the hiccup short circuit protection circuitry. This reduces The fault time is given by: the duty cycle to approximately 0.035 during short circuit conditions. An important consideration in calculating CS is that it’s voltage does not reach 2.5 V (the voltage at which the fault detect circuitry For this circuit is enabled) before VFB reaches 1.15 V otherwise the power supply will never start. If the VFB pin reaches 1.15 V, the fault timing comparator will A larger value of CS will increase the fault time out time discharge CS and the supply will not start. For the but will also increase the Soft−Start time. VFB voltage to reach 1.15 V the output voltage must be at least 4 × 1.15 = 4.6 V. If we choose an arbitrary startup time of 900 s, the value of CS is: 9) Input Capacitor The input capacitor reduces the peak currents drawn from the input supply and reduces the noise and ripple voltage on the VCC and VC pins. This capacitor must also ensure that the VCC remains above the UVLO voltage in the event of an output short circuit. A low ESR capacitor The fault time is the sum of the slow discharge time output short circuit. A low ESR capacitor of at least 100 u the fast discharge time and the recharge time. It is is good. A ceramic surface mount capacitor should also dominated by the slow discharge time. be connected between VCC and ground to filter high The first parameter is the slow discharge time, it is frequency noise. the time for the CS capacitor to discharge from 2.4 V to 1.5 V and is given by: 10) MOSFET Selection The LM51031 drives a P−Channel MOSFET. The VGATE pin swings from GND to VC. The type of P−Ch FET used depends on the operating conditions but for input voltage where IDischarge is 6.0 uA typical. below 7.0 V a logic level FET should be used. HTC −8− Fast PFET Buck Controller LM51031 A P−Ch FET with a continuous drain current (ID) rating greater than the maximum output current is required. The Gate−to−Source voltage VGS and Source Breakdown Voltage should be chosen based on the input supply voltage. The power dissipation due to the conduction losses is given by: where The power dissipation of the P−Ch FET due to the switching losses is given by: where tr = Rise Time. 11) Diode Selection The flyback or catch diode should be a Schottky diode because of it’s fast switching ability and low forward voltage drop. The current rating must be at least equal to the maximum output current. The breakdown voltage should be at least 20 V for this 12 V application. The diode power dissipation is given by: HTC −9−