ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Description Features The ICS558-02 accepts a high-speed LVHSTL input and provides four CMOS low skew outputs from a selectable internal divider (divide by 3, divide by 4). The four outputs are split into two banks of two outputs. Each bank has a separate output enable to tri-state the output buffers. • • • • • • The ICS558-02 is a member of the ICS Clock BlocksTM family of clock generation, synchronization, and distribution devices. 16-pin TSSOP package LVHSTL inputs Accepts up to 250 MHz input frequency Four low skew (<250 ps) outputs Selectable internal divider of 3 or 4 Operating voltage of 3.3 V Block Diagram VDD OE0 4 CLK1 CLK2 HCLK Output Divide /3 or /4 HCLK CLK3 CLK4 SEL 3 OE1 GND 1 MDS 558-02 D I n t e gra te d C i r c u i t S y s t e m s ● 525 Race Stre et, San Jo se, CA 9 5126 Revision 020504 ● te l (40 8) 2 97-12 01 ● w w w. i c st . c o m ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Pin Assignment Tri-State Table OE1 OE0 SEL 1 16 VDD 0 0 Tri-state Tri-state VDD 2 15 VDD 0 1 Clock ON Tri-state 1 0 Tri-state Clock ON 1 1 Clock ON Clock ON VDD 3 14 CLK1 HCLK 4 13 CLK2 HCLK 5 12 CLK3 GND 6 11 CLK4 GND 7 10 GND OE0 8 9 OE1 CLK 1, CLK 2 CLK 3, CLK 4 Output Divide Selection 16 Pin 173 Mil (0.65mm) TSSOP SEL Output Divide 0 /3 1 /4 Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name SEL VDD VDD HCLK HCLK GND GND OE0 Pin Type Input Power Power Input Input Power Power Input 9 OE1 Input 10 11 12 13 14 15 16 GND CLK4 CLK3 CLK2 CLK1 VDD VDD Power Output Output Output Output Power Power Select pin for output divider. See table above. Internal pull-up to VDD. Connect to +3.3 V. Connect to +3.3 V. Differential LVHSTL input (true input). Differential LVHSTL input (complimentary input). Connect to ground. Connect to ground. Output enable for CLK1 and CLK2. See table above. Internal pull-up to VDD. Output enable for CLK3 and CLK4. See table above. Internal pull-up to VDD. Connect to ground. Low skew clock output. Low skew clock output. Low skew clock output. Low skew clock output. Connect to +3.3 V. Connect to +3.3 V. 2 MDS 558-02 D In te grated Circuit Systems Pin Description ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 020504 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS558-02. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage 4.6 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70 °C Storage Temperature -65 to +150 °C Junction Temperature 125 °C Soldering Temperature 260 °C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Typ. 0 Power Supply Voltage (measured in respect to GND) +3.15 +3.3 Max. Units +70 °C +3.5 V DC Electrical Characteristics VDD=3.3 V ±5%, Ambient temperature 0 to +70°C, unless stated otherwise stated. Parameter Symbol Conditions Operating Voltage VDD Operating Supply Current IDD No load, 100 MHz Input High Voltage VIH OE pins Input Low Voltage VIL OE pins Input High Voltage VIH HCLK Input Low Voltage VIL Peak to Peak Input Voltage Typ. Max. Units 3.135 3.3 3.465 V 60 mA VDD V 0.5 V Vx + 0.1 1.2 V HCLK -0.3 Vx - 0.1 V HCLK 0.3 1.0 V -20 20 µA Input Common Mode 0.68 0.90 V 2.4 HCLK Input Leakage Current IIL Input Common Mode Voltage Vx Output High Voltage VOH IOH = -14.5 mA Output Low Voltage VOL IOL = 9.4 mA VDD-0.5 V 0.4 3 MDS 558-02 D In te grated Circuit Systems Min. ● 525 Ra ce Street, San Jose, CA 9512 6 V Revision 020504 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Parameter Symbol Conditions Min. Typ. Max. Units Nominal Output Impedance ZO 20 Ω Internal Pull-up Resistor RPU 250 kΩ Input Capacitance CIN 7 pF AC Electrical Characteristics VDD = 3.3 V ±5%, Ambient Temperature 0 to +70°C, unless stated otherwise stated. Parameter Symbol Conditions Min. Input Frequency Typ. 0 Max. Units 250 MHz Output Rise Time tOR 0.4 to 2.4 V, CL=30 pF 0.5 1.1 2.0 ns Output Fall Time tOF 2.4 to 0.4 V, CL=30 pF 0.5 1.0 2.0 ns 0 250 ps 9 12 ns 45 50 55 % Min. Typ. Skew (between any two output clocks) 30 pF load Propagation Delay Output Clock Duty Cycle at VDD/2, CL=30 pF Thermal Characteristics (16-pin TSSOP) Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Conditions Max. Units θJA Still air 78 °C/W θJA 1 m/s air flow 70 °C/W θJA 3 m/s air flow 68 °C/W 37 °C/W θJC 4 MDS 558-02 D In te grated Circuit Systems Symbol ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 020504 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m ICS558-02 LVHSTL TO CMOS CLOCK DIVIDER Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch) Package dimensions are kept current with JEDEC Publication No. 95, MO-153 Millimeters 16 Symbol E1 Min A A1 A2 b C D E E1 e L α aaa E INDEX AREA 1 2 D Inches Max -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 4.90 5.1 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0° 8° -0.10 Min Max -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.193 0.201 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0° 8° -0.004 A A2 A1 c -Ce SEATING PLANE b L aaa C Ordering Information Part / Order Number Marking (both) Shipping packaging Package Temperature ICS558G-02 ICS558G-02T ICS558G-02 ICS558G-02 Tubes Tape and Reel 16-pin TSSOP 16-pin TSSOP 0 to 70°C 0 to 70°C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 5 MDS 558-02 D In te grated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 Revision 020504 ● tel (4 08) 297-1 201 ● w w w. i c s t . c o m