ICS651-03 VOIP Clock Source Description Features The ICS651-03 is a low cost frequency generator designed to support voice-over-internet protocol (VOIP) applications. Using analog/digital Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal input to produce four output clocks supporting DSP, video encoder, and memory functions. To form a complete VOIP clocking solution use the ICS651-02 companion device. • • • • • • • • • • The device also has a power down feature that tri-states the clock outputs and turns off the PLL when the PDTS pin is taken low. Packaged in 16-pin TSSOP Replaces multiple crystals and oscillators Input crystal or clock frequency of 27 MHz Fixed reference output frequency of 80 MHz Fixed output frequency of 48 MHz Fixed output frequency of 25 MHz Reference output frequency of 27 MHz Duty cycle of 40/60 Operating voltage of 3.3 V Advanced, low power CMOS process Block Diagram VDD 6 PLL1 80M PLL2 48M 25M 27 MHz crystal input X1 Crystal Oscillator/ Clock Buffer X2 REF 3 External capacitors may be required. PDTS 1 MDS 651-03 A Integrated Circuit Systems GND ● 525 Ra ce St reet, Sa n Jose, C A 9 5126 (all outputs and PLLs) Revision 112603 ● tel (40 8) 297-1 201 ● w w w. i c s t. c o m ICS651-03 VOIP Clock Source Pin Assignment X1 1 16 X2 GND 2 15 VDD 3 14 REF 25M 4 13 VDD GND VDD 5 12 VDD 6 11 VDD VDD 7 10 GND 48M 8 9 80M PDTS 16-pin (173 mil) TSSOP Pin Descriptions Pin Number Pin Name Pin Type 1 X1 Input Crystal connection. Connect to 27 MHz crystal input. 2 GND Power Connect to ground. PDTS Input Powers down entire chip and tri-states outputs when low. Internal pull-up resistor. 4 25M Output 25 MHz clock output. Weak internal pull-down when tri-state. 5 GND Power Connect to ground. 6 VDD Power Connect to +3.3 V. 7 VDD Power Connect to +3.3 V. 8 48M Output 48 MHz clock output. Weak internal pull down when tri-state. 9 80M Output 80 MHz clock output. Weak internal pull down when tri-state. 10 GND Power Connect to ground. 11 VDD Power Connect to +3.3 V. 12 VDD Power Connect to +3.3 V. 13 VDD Power Connect to +3.3 V. 14 REF Output Reference 27 MHz output. Weak internal pull-down when tri-state. 15 VDD Power Connect to +3.3 V. 16 X2 Output Crystal connection. Connect to 27 MHz crystal input. 3 2 MDS 651-03 A In te grated Circu it Syste m s Pin Description ● 52 5 Race Stre et, San Jose, CA 9512 6 Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m ICS651-03 VOIP Clock Source External Components Decoupling Capacitor PCB Layout Recommendations As with any high performance mixed-signal IC, the ICS651-03 must be isolated from system power supply noise to perform optimally. For optimum device performance and lowest output phase noise, the following guidelines should be observed. A decoupling capacitor of 0.01µF must be connected between each VDD and the PCB ground plane. 1) The 0.01µF decoupling capacitors should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitors and VDD pins. The PCB trace to VDD pins should be kept as short as possible, as should the PCB trace to the ground via. Series Termination Resistor Clock output traces over one inch should use series termination. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. Crystal Load Capacitors The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors must be connected from each of the pins X1 and X2 to ground. 2) The external crystal should be mounted just next to the device with short traces. The X1 and X2 traces should not be routed next to each other with minimum spaces, instead they should be separated and away from other traces. 3) Place the 33Ω series termination resistor (if needed) close to the clock output to minimize EMI. 4) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS651-03. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. The value (in pF) of these crystal caps should equal (CL -6 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 20 pF [(16-6) x 2] = 20. 3 MDS 651-03 A In te grated Circu it Syste m s ● 52 5 Race Stre et, San Jose, CA 9512 6 Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m ICS651-03 VOIP Clock Source Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS651-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD -0.5 V to 7 V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature 0 to +70°C Storage Temperature -65 to +150°C Junction Temperature 175°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature Typ. Max. Units +70 °C +3.465 V 0 Power Supply Voltage (measured in respect to GND) +3.135 +3.3 DC Electrical Characteristics Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70°C Parameter Symbol Conditions Min. Typ. Max. Units 3.135 3.3 3.465 V Operating Voltage VDD Supply Current IDD No load, PDTS=1 21 mA IDDPD No load, PDTS=0 90 µA Power Down Current Input High Voltage VIH PDTS Input Low Voltage VIL PDTS Output High Voltage VOH IOH = -4 mA VDD-0.4 V Output High Voltage VOH IOH = -12 mA 2.4 V Output Low Voltage VOL IOL = 12 mA Short Circuit Current IOS Clock outputs Input Capacitance, inputs CIN ● 52 5 Race Stre et, San Jose, CA 9512 6 V 0.8 0.4 4 MDS 651-03 A In te grated Circu it Syste m s 2 V V ±70 mA 5 pF Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m ICS651-03 VOIP Clock Source Parameter Symbol Nominal Output Impedance ZOUT Internal pull-up resistor RPU Internal pull-down resistor RPD Conditions Min. PDTS pins Typ. Max. Units 20 Ω 700 kΩ 200 kΩ AC Electrical Characteristics Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature 0 to +70°C Parameter Symbol Input Frequency fIN Output Rise Time tOR Output Fall Time tOF Conditions Min. Typ. Max. Units 27 MHz 20% to 80% (Note 1) 1.0 ns 80% to 20% (Note 1) 1.0 ns Output Clock Duty Cycle at VDD/2 (Note 1) Absolute Clock Period Jitter (Note 1) 40 Frequency synthesis error 60 % ± 100 ps 0 ppm Output Enable Time tOE PDTS high to output locked to ±1% 250 µs Output Disable Time tOD PDTS low to tri-state 20 ns Note 1: Measured with a 15 pF load. 5 MDS 651-03 A In te grated Circu it Syste m s ● 52 5 Race Stre et, San Jose, CA 9512 6 Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m ICS651-03 VOIP Clock Source Thermal Characteristics Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Conditions Min. Typ. Max. Units θJA Still air 78 °C/W θJA 1 m/s air flow 70 °C/W θJA 3 m/s air flow 68 °C/W 37 °C/W θJC Marking Diagram 16 9 651G-03 ###### YYWW$$ 1 8 Notes: 1. ###### is the lot code. 2. YYWW is the last two digits of the year, and the week number that the part was assembled. 6 MDS 651-03 A In te grated Circu it Syste m s ● 52 5 Race Stre et, San Jose, CA 9512 6 Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m ICS651-03 VOIP Clock Source Package Outline and Package Dimensions (16-pin TSSOP, 173 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 16 Symbol E1 E IN D EX AR EA 1 2 D A 2 Min A A1 A2 b C D E E1 e L α aaa Inches Max -1.20 0.05 0.15 0.80 1.05 0.19 0.30 0.09 0.20 4.90 5.1 6.40 BASIC 4.30 4.50 0.65 Basic 0.45 0.75 0° 8° -0.10 Min Max -0.047 0.002 0.006 0.032 0.041 0.007 0.012 0.0035 0.008 0.193 0.201 0.252 BASIC 0.169 0.177 0.0256 Basic 0.018 0.030 0° 8° -0.004 A A 1 c -C e S E A T IN G P LA N E b L aaa C Ordering Information Part / Order Number ICS651G-03 ICS651G-03T Marking (both) Shipping packaging Package Temperature (see gage 6) Tubes Tape and Reel 16-pin TSSOP 16-pin TSSOP 0 to +70 °C 0 to +70 °C While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 7 MDS 651-03 A In te grated Circu it Syste m s ● 52 5 Race Stre et, San Jose, CA 9512 6 Revision 112603 ● te l (4 08) 297 -1201 ● w w w. i c s t . c o m