PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD GENERAL DESCRIPTION FEATURES The ICS83032I is a SAS/SATA dual output LVCMOS/LVTTL oscillator and a member of the HiPerClockS™ HiperClocks™ family of high performance devices from ICS. The ICS83032I uses a 3rd overtone crystal to provide a reference frequency of 75MHz. The ICS83032I has excellent phase jitter performance, over the 900kHz - 7.5MHz integration range. The ICS83032I is packaged in a small 8-pin TSSOP, making it ideal for use in systems with limited board space. • One LVCMOS/LVTTL output, 15Ω output impedence ICS • Crystal oscillator interface designed for 3rd overtone 75MHz crystal • Output frequency range: 53MHz - 80MHz • RMS phase jitter @ 75MHz (900kHz - 7.5MHz): <125fs (typical) • 3.3V or 2.5V operating supply • -40°C to 85°C ambient operating temperature • Available in both standard and lead-free RoHS-compliant packages BLOCK DIAGRAM PIN ASSIGNMENT OE Pullup 75MHz XTAL_IN 3rd Overtone Crystal Oscillator 75MHz Q0 OE XTAL_IN XTAL_OUT GND 1 2 3 4 8 7 6 5 VDD nc Q0 Q1 ICS83032I XTAL_OUT Q1 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 83032AGI www.icst.com/products/hiperclocks.html REV. B FEBRUARY 13, 2006 1 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD TABLE 1. PIN DESCRIPTIONS Number Name 1 OE 4 XTAL_IN, XTAL_OUT GND Power Description Output enable pin. LVCMOS/LVTTL interface levels. See Table 3, Standby Function Table. Cr ystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Power supply ground. 5, 6 Q1, Q0 Output Single-ended clock outputs. LVCMOS/LVTTL interface levels. 7 nc Unused 8 VDD Power 2, 3 Type Input Input Pullup No connect. Power and output supply pin. NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance Test Conditions RPULLUP Input Pullup Resistor ROUT Output Impedance Minimum Typical Maximum Units 4 pF 100 kΩ VDD = 3.6V 15 Ω VDD = 2.625V TBD Ω TABLE 3. STANDBY FUNCTION TABLE Oscillator Control Input Outputs OE Q0, Q1 High (open) fo Output Frequency Nornal Operation Low High Impedance Stopped 83032AGI www.icst.com/products/hiperclocks.html 2 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDD + 0.5V Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±0.3V, TA = -40°C TO 85°C Symbol Parameter VDD Power Supply Voltage IDD Power Supply Current Test Conditions Minimum Typical Maximum Units 3.0 3.3 3.6 V OE = VDD (output enabled) TBD mA TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter VDD Power Supply Voltage IDD Power Supply Current Test Conditions Minimum 2.375 OE = VDD (output enabled) Typical Maximum 2.5 2.625 TBD Units V mA TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = 3.3V±0.3V OR 2.5V±5%, TA = -40°C TO 85°C Symbol VIH VIL Parameter Input High Voltage Input Low Voltage Test Conditions Minimum Maximum Units VDD = 3.3V 2 Typical VDD + 0.3 V VDD = 2.5V 1.7 VDD + 0.3 V VDD = 3.3V -0.3 0.8 V VDD = 2.5V -0.3 0.7 V IIH Input High Current VDD = VIN = 3.6V or 2.625V IIL Input Low Current VDD = 3.6V or 2.625V, VIN = 0V -150 5 µA VOH Output High Voltage; NOTE 1 VDD = 3.6V 2.6 V VDD = 2.625V 1. 8 Output Low Voltage; NOTE 1 VDD = 3.6V or 2.625V VOL NOTE 1: Outputs terminated with 50Ω to VDD/2. See Parameter Measurement Information Section, "Output Load Test Circuit" diagrams. 83032AGI www.icst.com/products/hiperclocks.html 3 µA V 0. 5 V REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD TABLE 5. CRYSTAL CHARACTERISTICS (NOTE 1) Parameter Test Conditions Minimum Typical Maximum Units 80 MHz 3rd Over tone Mode of Oscillation Frequency 53 75 Equivalent Series Resistance (ESR) 60 Ω Frequency Tolerance Frequency Stability Over Operating Temperature Range Load Capacitance (CL); NOTE 2 ±30 ppm ±30 ppm 18 pF Shunt Capacitance (CO) 7 Aging for 5 Years ±15 Drive Level NOTE 1: Using an HC49/US SMD package, the parameters shown above target ±100ppm accuracy. NOTE 2: See Cr ystal Input Interface in the Application Information Section. pF ppm 1 mW TABLE 6A. AC CHARACTERISTICS, VDD = 3.3V±0.3V, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency RMS Phase Jitter, Random; NOTE 1 Deterministic Jitter ; NOTE 2 t jit(Ø) tDJ tRJ tacc Random Jitter ; NOTE 2 RMS of Total Distribution (σ); NOTE 2 Peak-to-Peak Jitter ; NOTE 2 Accumulated Jitter (σ); NOTE 2 tsk(o) Output Skew; NOTE 3, 4 Δf/fO Frequency Stability; NOTE 5 tOSC Oscillation Star t Up Time t R / tF Output Rise/Fall Time tRMS tp-p Test Conditions Minimum Typical Maximum Units 53 75 80 MH z fOUT = 75MHz, (Integration Range: 900kHz-7.5MHz) n = 2 to 50000 cycles <125 fs 0.2 ps 3 ps 3 ps 25 ps 4 ps 5 ps ±10 ppm 10 20% to 80% 350 ms ps odc Output Duty Cycle 50 % NOTE 1: Measured using Aeroflex PN9500. NOTE 2: Measured using Wavecrest SIA-3000. NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDD/2. NOTE 4: These parameters are guaranteed by characterization. Not tested in production. NOTE 5: This is the frequency error contributed by the oscillator and must be added to the frequency timing error from the cr ystal to obtain the total frequency stability. See Frequency Stability in the Application Information Section. 83032AGI www.icst.com/products/hiperclocks.html 4 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD TABLE 6B. AC CHARACTERISTICS, VDD = 2.5V±5%, TA = -40°C TO 85°C Symbol Parameter fOUT Output Frequency RMS Phase Jitter, Random; NOTE 1 Deterministic Jitter ; NOTE 2 t jit(Ø) tDJ tRJ tRMS tp-p tacc Random Jitter ; NOTE 2 RMS of Total Distribution (σ); NOTE 2 Peak-to-Peak Jitter ; NOTE 2 Accumulated Jitter (σ); NOTE 2 Test Conditions Minimum Typical Maximum Units 53 75 80 MHz fOUT = 75MHz, (Integration Range: 900kHz-7.5MHz) n = 2 to 50000 cycles TBD fs 0.2 ps 3 ps 3 ps 25 ps 4 ps tsk(o) Output Skew; NOTE 3, 4 TBD ps Δf/fO Frequency Stability; NOTE 5 ±10 ppm tOSC Oscillation Star t Up Time t R / tF Output Rise/Fall Time TBD 20% to 80% 40 0 ms ps odc Output Duty Cycle 50 % NOTE 1: Measured using Aeroflex PN9500. NOTE 2: Measured using Wavecrest SIA-3000. NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDD/2. NOTE 4: These parameters are guaranteed by characterization. Not tested in production. NOTE 5: This is the frequency error contributed by the oscillator and must be added to the frequency timing error from the cr ystal to obtain the total frequency stability. See Frequency Stability in the Application Information Section. 83032AGI www.icst.com/products/hiperclocks.html 5 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD PARAMETER MEASUREMENT INFORMATION 1.65V ± 0.15V Phase Noise Plot Noise Power SCOPE V DD Qx LVCMOS Phase Noise Mask GND Offset Frequency f1 -1.65V ± 0.15V f2 RMS Jitter = Area Under the Masked Phase Noise Plot 3.3V OUTPUT LOAD AC TEST CIRCUIT RMS PHASE JITTER V DD 80% 2 Q0, Q1 80% t PW t odc = Clock Outputs PERIOD t PW 20% 20% tR tF x 100% t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 83032AGI OUTPUT RISE/FALL TIME www.icst.com/products/hiperclocks.html 6 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD APPLICATION INFORMATION FREQUENCY STABILITY The table shown below provides a basic guideline in selecting the proper quartz crystal that meets a timing budget of ±100ppm. For more information on selecting the proper Parameter Frequency Tolerance Typical Units ±30 ppm Frequency Stability ±30 ppm Aging for 5 Years ±15 ppm Accuracy of 3rd Over tone Oscillator ±1 0 ppm Load Capacitance Accuracy ±3 ppm Total Overall Timing Error ±88 ppm crystal, see the application note, Crystal Timing Budget and Accuracy for FemtoClock™ . RECOMMENDATIONS FOR UNUSED OUTPUT PINS OUTPUTS: LVCMOS OUTPUT: All unused LVCMOS output can be left floating. We recommend that there is no trace attached. 83032AGI www.icst.com/products/hiperclocks.html 7 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD RELIABILITY INFORMATION TABLE 7. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS83032I is: 83 83032AGI www.icst.com/products/hiperclocks.html 8 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX FOR ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD 8 LEAD TSSOP TABLE 8. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum N A Maximum 8 -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 3.10 E E1 6.40 BASIC 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 83032AGI www.icst.com/products/hiperclocks.html 9 REV. B FEBRUARY 13, 2006 PRELIMINARY Integrated Circuit Systems, Inc. ICS83032I 75MHZ, 3 OVERTONE OSCILLATOR W/DUAL LVCMOS/LVTTL OUTPUTS RD TABLE 9. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS83032AGI 303AI 8 lead TSSOP tube -40°C to 85°C ICS83032AGIT 303AI 8 lead TSSOP 2500 tape & reel -40°C to 85°C ICS83032AGILF 03AIL 8 lead "Lead-Free" TSSOP tube -40°C to 85°C ICS83032AGILFT 03AIL 8 lead "Lead-Free" TSSOP 2500 tape & reel -40°C to 85°C NOTE: Par ts that are ordered with an "LF" suffix to the par t number are the Pb-Free configuration and are RoHS compliant. The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 83032AGI www.icst.com/products/hiperclocks.html 10 REV. B FEBRUARY 13, 2006