MICROSS LSID100

LSID100
LOW LEAKAGE
PICO-AMP DUAL DIODE
Linear Systems replaces discontinued Intersil LSID100
The LSID100 is a low leakage Monolithic Dual Pico-Amp Diode
The LSID100 low-leakage monolithic dual diode
provides a superior alternative to conventional diode
technology when reverse current (leakage) must be
minimized. In addition the monolithic dual construction
allows excellent capacitance matching per diode. The
LSID100 features a leakage current of 0.1 pA and is
well suited for use in applications such as input
protection for operational amplifiers.
Maximum Temperatures Storage Temperature Operating Junction Temperature Maximum Power Dissipation Continuous Power Dissipation Maximum Currents
Forward Current Reverse Current Maximum Voltages Reverse Voltage Diode to Diode Voltage LSID100 Benefits:
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Negligible Circuit Leakage Contribution
Circuit “Transparent” Except to Shunt
High-Frequency Spikes
Simplicity of Operation
LSID100 Applications:
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FEATURES DIRECT REPLACEMENT FOR INTERSIL LSID100 REVERSE LEAKAGE CURRENT REVERSE BREAKDOWN VOLTAGE REVERSE CAPACITANCE ABSOLUTE MAXIMUM RATINGS (Note 1) @ 25°C (unless otherwise noted) Op Amp Input Protection
Multiplexer Overvoltage Protection
LSID100 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL CHARACTERISTICS MIN. TYP. BVR Reverse Breakdown Voltage 30 ‐‐ VF Forward Voltage 0.8 ‐‐ IR Reverse Leakage Current ‐‐ 0.1 ‐‐ 2.0 |IR1‐IR2| Differential Leakage Current ‐‐ ‐‐ CrSS Total Reverse Capacitance(Note 2) ‐‐ 0.75 MAX. ‐‐ 1.1 ‐‐ 10 3 1 IR = 0.1pA BVR ≥ 30V Crss = 0.75pF ‐65°C to +200°C ‐55°C to +150°C 300mW 20mA 100µA 30V ±50V UNITS V V pA CONDITIONS IR = 1µA IF = 10mA VR = 1V VR = 10V pF VR = 10V, f = 1MHz Click To Buy
Note 1 - Absolute maximum ratings are limiting values above which LSID100 serviceability may be impaired.
Note 2 - Design reference only, not 100% tested
FIGURE 1 – Operational Amplifier Protection Input Differential Voltage limited to 0.8V (typ) by Diodes LSID100 D1 and D2. Common Mode Input voltage limited by Diodes LSID100 D3 and D4 to ±15V. FIGURE 2 – Sample & Hold Circuit Typical Sample and Hold circuit with clipping. LSID100 diodes reduce offset voltages fed capacitively from the LSID100 switch gate.
TO-78 (Bottom View)
Available Packages:
Micross Components Europe
LSID100 in TO-78
LSID100 available as bare die
Tel: +44 1603 788967
Email: [email protected]
Web: http://www.micross.com/distribution
Please contact Micross for
full package and die dimensions
Note pins 3 & 5 must not be connected, in any fashion or manner, to any circuit or node Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
Micross Components Ltd, United Kingdom, Tel: +44 1603 788967, Fax: +44 1603788920, Email: [email protected] Web: www.micross.com/distribution.aspx