OPA 347 OPA OPA ® 347 OPA347 OPA2347 OPA4347 347 OPA 434 7 OPA 234 7 SBOS167D – NOVEMBER 2000– REVISED JULY 2007 microPower, Rail-to-Rail Operational Amplifiers FEATURES DESCRIPTION ● LOW IQ: 20µA ● microSIZE PACKAGES: WCSP-8, SC70-5 SOT23-5, SOT23-8, and TSSOP-14 ● HIGH SPEED/POWER RATIO WITH BANDWIDTH: 350kHz ● RAIL-TO-RAIL INPUT AND OUTPUT ● SINGLE SUPPLY: 2.3V to 5.5V The OPA347 is a microPower, low-cost operational amplifier available in micropackages. The OPA347 (single version) is available in the SC-70 and SOT23-5 packages. The OPA2347 (dual version) is available in the SOT23-8 and WCSP-8 packages. Both are also available in the SO-8. The OPA347 is also available in the DIP-8. The OPA4347 (quad) is available in the SO-14 and the TSSOP-14. The small size and low power consumption (34µA per channel maximum) of the OPA347 make it ideal for portable and battery-powered applications. The input range of the OPA347 extends 200mV beyond the rails, and the output range is within 5mV of the rails. The OPA347 also features an excellent speed/power ratio with a bandwidth of 350kHz. APPLICATIONS ● ● ● ● ● PORTABLE EQUIPMENT BATTERY-POWERED EQUIPMENT 2-WIRE TRANSMITTERS SMOKE DETECTORS CO DETECTORS The OPA347 can be operated with a single or dual power supply from 2.3V to 5.5V. All models are specified for operation from –55°C to +125°C. OPA347 OPA347 OPA2347 (bump side down) Not to Scale Out 1 V– 2 +In 3 5 V+ +In 1 4 –In 3 –In 1 Out A 1 8 V+ –In A 2 7 Out B +In A 3 6 –In B V– 4 5 +In B WCSP-8 (top view) OPA4347 5 V+ V– 2 4 Out SC70-5 OPA2347 NC 1 8 NC Out A 1 –In 2 7 V+ –In A 2 +In 3 6 Out +In A 3 V– 4 5 NC V– 4 SO-8, DIP-8 A B 1 8 V+ 7 Out B 6 –In B 5 +In B 14 Out D –In A 2 13 –In D +In A 3 12 +In D V+ 4 11 V– +In B 5 10 +In C A SOT23-5 OPA347 Out A B D C –In B 6 9 –In C Out B 7 8 Out C TSSOP-14, SO-14 SOT23-8, SO-8 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright © 2000-2007, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V– ................................................................... 7.5V Signal Input Terminals, Voltage(2) .................. (V–) – 0.5V to (V+) + 0.5V Current(2) .................................................... 10mA Output Short-Circuit(3) .............................................................. Continuous Operating Temperature .................................................. –65°C to +150°C Storage Temperature ..................................................... –65°C to +150°C Junction Temperature ...................................................................... 150°C NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only. Functional operation of the device at these conditions, or beyond the specified operating conditions, is not implied. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current-limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) PRODUCT PACKAGE/LEAD PACKAGE DESIGNATOR PACKAGE MARKING OPA347NA SOT23-5 DBV A47 " " " " OPA347PA OPA347UA DIP-8 SO-8 P D OPA347PA OPA347UA " " " " OPA347SA SC-70 DCK S47 " " " " OPA2347EA SOT23-8 DCN B47 " " " " OPA2347UA SO-8 D OPA2347UA " " " " OPA2347YED WCSP-8 YED YMD CCS " " " " OPA2347YZDR Lead-Free WCSP-8 YZD A9 OPA4347EA TSSOP-14 PW OPA4347EA " " " " OPA4347UA SO-14 D OPA4347UA " " " " NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see the TI web site at www.ti.com. 2 OPA347, 2347, 4347 www.ti.com SBOS167D ELECTRICAL CHARACTERISTICS: VS = 2.5V to 5.5V Boldface limits apply over the specified temperature range, TA = –55°C to +125°C. At TA = +25°C, RL = 100kΩ connected to VS/2 and VOUT = VS/2, unless otherwise noted. OPA347NA, UA, PA, SA OPA2347EA, UA, YED OPA4347EA, UA PARAMETER CONDITION OFFSET VOLTAGE Input Offset Voltage over Temperature Drift vs Power Supply over Temperature Channel Separation, DC VOS dVOS/dT PSRR MIN VS = 5.5V, VCM = (V–) + 0.8V VS = 2.5V to 5.5V, VCM < (V+) – 1.7V VS = 2.5V to 5.5V, VCM < (V+) – 1.7V VCM CMRR over Temperature INPUT BIAS CURRENT(1) Input Bias Current Input Offset Current VS = 5.5V, (V–) – 0.2V < VCM < (V+) – 1.7V VS = 5.5V, V– < VCM < (V+) – 1.7V Vs = 5.5V, (V–) – 0.2V < VCM < (V+) + 0.2V Vs = 5.5V, V– < VCM < V+ (V–) – 0.2 70 66 54 48 INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN Open-Loop Voltage Gain over Temperature en in over Temperature AOL (SC-70 only) OUTPUT Voltage Output Swing from Rail over Temperature FREQUENCY RESPONSE Gain-Bandwidth Product Slew Rate Settling Time, 0.1% 0.01% Overload Recovery Time POWER SUPPLY Specified Voltage Range Minimum Operating Voltage Minimum Operating Voltage (OPA347SA) Quiescent Current (per amplifier) over Temperature TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance SOT23-5 Surface-Mount SOT23-8 Surface-Mount SO-8 Surface-Mount SO-14 Surface-Mount TSSOP-14 Surface-Mount DIP-8 SC70-5 Surface-Mount WCSP 2 2 3 60 6 7 mV mV µV/°C µV/V µV/V µV/V dB 175 300 (V+) + 0.2 V dB dB dB dB ±10 ±10 pA pA 80 70 1013 || 3 1013 || 6 Ω || pF Ω || pF 12 60 0.7 µVPP nV/√Hz fA/√Hz 115 dB dB dB dB dB VCM < (V+) – 1.7V AOL over Temperature Short-Circuit Current Capacitive Load Drive UNITS ±0.5 ±0.5 Ib IOS NOISE Input Voltage Noise, f = 0.1Hz to 10Hz Input Voltage Noise Density, f = 1kHz Input Current Noise Density, f = 1kHz MAX 0.3 128 f = 1kHz INPUT VOLTAGE RANGE Common-Mode Voltage Range Common-Mode Rejection Ratio over Temperature TYP VS = 5.5V, RL = 100kΩ, 0.015V < VO < 5.485V VS = 5.5V, RL = 100kΩ, 0.015V < VO < 5.485V VS = 5.5V, RL = 5kΩ, 0.125V < VO < 5.375V VS = 5.5V, RL = 5kΩ, 0.125V < VO < 5.375V VS = 5.5V, RL = 5kΩ 0.125V < VO < 5.375V 100 88 100 88 96 RL = 100kΩ, AOL > 100dB RL = 100kΩ, AOL > 88dB RL = 5kΩ, AOL > 100dB RL = 5kΩ, AOL > 88dB 115 115 5 90 15 15 125 125 ±17 See Typical Characteristics ISC CLOAD mV mV mV mV mA CL = 100pF GBW SR tS VS IQ 350 0.17 21 27 23 G = +1 VS = 5V, 2V Step, G = +1 VS = 5V, 2V Step, G = +1 VIN × Gain = VS 2.5 5.5 2.3 2.4 20 IO = 0 kHz V/µs µs µs µs –55 –65 –65 34 38 V V V µA µA 125 150 150 °C °C °C θJA 200 150 150 100 100 100 250 250 °C/W °C/W °C/W °C/W °C/W °C/W °C/W °C/W NOTE: (1) Input bias current for the OPA2347YED package is specified in the absence of light. See the Photosensitivity section for further detail. OPA347, 2347, 4347 SBOS167D www.ti.com 3 TYPICAL CHARACTERISTICS At TA = +25°C, VS = +5V, and RL = 100kΩ connected to VS/2, unless otherwise noted. POWER-SUPPLY AND COMMON-MODE REJECTION vs FREQUENCY OPEN-LOOP GAIN/PHASE vs FREQUENCY 0 100 80 –30 60 –60 40 –90 20 –120 0 –150 20 –180 0 –20 100 10 1k 10k 100k PSRR, CMRR (dB) 80 Phase (°) Open-Loop Gain (dB) 100 60 PSRR 40 1M 10 100 1k Frequency (Hz) 10k 100k 1M Frequency (Hz) MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 6 CMRR CHANNEL SEPARATION vs FREQUENCY 140 VS = 5.5V Channel Separation (dB) Output Voltage (Vp-p) 5 VS = 5.0V 4 3 VS = 2.5V 2 1 120 100 80 60 0 1k 10k 100k 100 10 1M 1k QUIESCENT AND SHORT-CIRCUIT CURRENT vs SUPPLY VOLTAGE 20 15 IQ 15 10 Output Voltage (V) 20 Short-Circuit Current (mA) Quiescent Current (µA) (V+) – 1 25 ISC 10 3.5 4.0 4.5 5.0 (V+) – 2 –55°C 125°C 25°C –55°C 2 Sinking 1 0 5.5 5 10 15 20 25 Output Current (±mA) Supply Voltage (V) 4 Sourcing 0 5 3.0 1M V+ 25 2.5 100k OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 30 2.0 10k Frequency (Hz) Frequency (Hz) OPA347, 2347, 4347 www.ti.com SBOS167D TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +5V, and RL = 100kΩ connected to VS/2, unless otherwise noted. OPEN-LOOP GAIN AND POWER-SUPPLY REJECTION vs TEMPERATURE COMMON-MODE REJECTION vs TEMPERATURE 130 90 120 V– < VCM < (V+) – 1.7V AOL 80 AOL, PSRR (dB) Common-Mode Rejection (dB) 100 70 V– < VCM < V+ 60 50 110 100 90 PSRR 80 40 70 –50 –75 –25 0 25 50 75 100 125 150 –75 –50 –25 0 Temperature (°C) QUIESCENT AND SHORT-CIRCUIT CURRENT vs TEMPERATURE 20 15 IQ 10 10 –25 25 0 50 75 100 125 Input Bias Current (pA) 20 Short-Circuit Current (mA) Quiescent Current (µA) ISC 25 –50 100 125 150 1k 100 10 1 0.1 5 150 –50 –75 –25 25 0 50 100 75 Temperature (°C) Temperature (°C) OFFSET VOLTAGE PRODUCTION DISTRIBUTION OFFSET VOLTAGE DRIFT MAGNITUDE PRODUCTION DISTRIBUTION 125 150 11 12 25 18 14 Percentage of Amplifiers (%) Typical production distribution of packaged units. 16 Percent of Amplifiers (%) 75 10k 25 –75 50 INPUT BIAS CURRENT vs TEMPERATURE 30 15 25 Temperature (°C) 12 10 8 6 4 20 15 10 5 2 0 0 –6 –5 –4 –3 –2 –1 0 1 2 3 4 5 1 6 Offset Voltage (mV) 3 4 5 6 7 8 9 10 Offset Voltage Drift (µV/°C) OPA347, 2347, 4347 SBOS167D 2 www.ti.com 5 TYPICAL CHARACTERISTICS (Cont.) At TA = +25°C, VS = +5V, and RL = 100kΩ connected to VS/2, unless otherwise noted. SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE SMALL-SIGNAL OVERSHOOT vs LOAD CAPACITANCE 50 G = –1V/V RFB = 100kΩ 50 40 Small-Signal Overshoot (%) G = +1V/V RL = 100kΩ 30 20 G = –1V/V RFB = 5kΩ 10 0 G = ±5V/V RFB = 100kΩ 40 30 20 10 0 100 1k 10 10k 100 1k 10k Load Capacitance (pF) SMALL-SIGNAL STEP RESPONSE SMALL-SIGNAL STEP RESPONSE G = +1V/V, RL = 100kΩ, CL = 100pF G = +1V/V, RL = 5kΩ, CL = 100pF 20mV/div Load Capacitance (pF) 20mV/div 10 10µs/div 10µs/div LARGE-SIGNAL STEP RESPONSE INPUT VOLTAGE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY 500mV/div Voltage Noise (nV/√Hz) G = +1V/V, RL = 100kΩ, CL = 100pF 10k 100 1k 10 100 1.0 10 20µs/div 0.1 1 10 100 1k 10k 100k Frequency (Hz) 6 OPA347, 2347, 4347 www.ti.com SBOS167D Current Noise (fA√Hz) Small-Signal Overshoot (%) 60 APPLICATIONS INFORMATION The OPA347 series op amps are unity-gain stable and can operate on a single supply, making them highly versatile and easy to use. Rail-to-rail input and output swing significantly increases dynamic range, especially in low supply applications. Figure 1 shows the input and output waveforms for the OPA347 in unity-gain configuration. Operation is from VS = +5V with a 100kΩ load connected to VS/2. The input is a 5VPP sinusoid. Output voltage is approximately 4.995VPP. Power-supply pins should be bypassed with 0.01µF ceramic capacitors. G = +1, VS = +5V Input 5V 1V/div 0V Output (inverted on scope) 20µs/div OPERATING VOLTAGE The OPA347 series op amps are fully specified and ensured from 2.5V to 5.5V. In addition, many specifications apply from –55°C to +125°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics. RAIL-TO-RAIL INPUT The input common-mode voltage range of the OPA347 series extends 200mV beyond the supply rails. This is achieved with a complementary input stage—an N-channel input differential pair in parallel with a P-channel differential pair, as shown in Figure 2. The N-channel pair is active for input voltages close to the positive rail, typically (V+) – 1.3V to 200mV above the positive supply, while the P-channel pair is on for inputs from 200mV below the negative supply to approximately (V+) – 1.3V. There is a small transition region, typically (V+) – 1.5V to (V+) – 1.1V, in which both pairs are on. This 400mV transition region can vary 300mV with process variation. Thus, the transition region (both stages on) can range from (V+) – 1.65V to (V+) – 1.25V on the low end, up to (V+) – 1.35V to (V+) – 0.95V on the high end. Within the 400mV transition region PSRR, CMRR, offset voltage, and offset drift may be degraded compared to operation outside this region. For more information on designing with rail-to-rail input op amps, see Figure 3, Design Optimization with Rail-to-Rail Input Op Amps. FIGURE 1. Rail-to-Rail Input and Output. V+ Reference Current VIN+ VIN– VBIAS1 Class AB Control Circuitry VO VBIAS2 V– (Ground) FIGURE 2. Simplified Schematic. OPA347, 2347, 4347 SBOS167D www.ti.com 7 DESIGN OPTIMIZATION WITH RAIL-TO-RAIL INPUT OP AMPS With a unity-gain buffer, for example, signals will traverse this transition at approximately 1.3V below the V+ supply and may exhibit a small discontinuity at this point. Rail-to-rail op amps can be used in virtually any op amp configuration. To achieve optimum performance, however, applications using these special double-input-stage op amps may benefit from consideration of their special behavior. The common-mode voltage of the noninverting amplifier is equal to the input voltage. If the input signal always remains less than the transition voltage, no discontinuity will be created. The closed-loop gain of this configuration can still produce a rail-to-rail output. In many applications, operation remains within the common-mode range of only one differential input pair. However, some applications exercise the amplifier through the transition region of both differential input stages. A small discontinuity may occur in this transition. Careful selection of the circuit configuration, signal levels, and biasing can often avoid this transition region. Unity-Gain Buffer Inverting amplifiers have a constant common-mode voltage equal to VB. If this bias voltage is constant, no discontinuity will be created. The bias voltage can generally be chosen to avoid the transition region. Noninverting Amplifier V+ Inverting Amplifier V+ VB VO VIN V+ VIN VO VO VIN VB VCM = VIN = VO VCM = VIN VCM = VB FIGURE 3. Design Optimization with Rail-to-Rail Input Op Amps. COMMON-MODE REJECTION The CMRR for the OPA347 is specified in several ways so the best match for a given application may be used. First, the CMRR of the device in the common-mode range below the transition region (VCM < (V+) – 1.7V) is given. This specification is the best indicator of the capability of the device when the application requires use of one of the differential input pairs. Second, the CMRR at VS = 5.5V over the entire common-mode range is specified. 5.5V 0V –0.5V INPUT VOLTAGE The input common-mode range extends from (V–) – 0.2V to (V+) + 0.2V. For normal operation, inputs should be limited to this range. The absolute maximum input voltage is 500mV beyond the supplies. Inputs greater than the input common-mode range but less than the maximum input voltage, while not valid, will not cause any damage to the op amp. Furthermore, if input current is limited the inputs may go beyond the power supplies without phase inversion, as shown in Figure 4, unlike some other op amps. Normally, input currents are 0.4pA. However, large inputs (greater than 500mV beyond the supply rails) can cause excessive current to flow in or out of the input pins. Therefore, as well as keeping the input voltage below the maximum rating, it is also important to limit the input current to less than 10mA. This is easily accomplished with an input resistor, as shown in Figure 5. 8 200µs/div FIGURE 4. OPA347—No Phase Inversion with Inputs Greater than the Power-Supply Voltage. +5V IOVERLOAD 10mA max VOUT OPA347 VIN 5kΩ FIGURE 5. Input Current Protection for Voltages Exceeding the Supply Voltage. OPA347, 2347, 4347 www.ti.com SBOS167D RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. This output stage is capable of driving 5kΩ loads connected to any potential between V+ and ground. For light resistive loads (> 100kΩ), the output voltage can typically swing to within 5mV from supply rail. With moderate resistive loads (10kΩ to 50kΩ), the output can swing to within a few tens of millivolts from the supply rails while maintaining high open-loop gain (see the typical characteristic Output Voltage Swing vs Output Current). load, reducing the resistor values from 100kΩ to 5kΩ decreases overshoot from 40% to 8% (see the characteristic curve Small-Signal Overshoot vs Load Capacitance). However, when large-valued resistors can not be avoided, a small (4pF to 6pF) capacitor, CFB, can be inserted in the feedback, as shown in Figure 7. This significantly reduces overshoot by compensating the effect of capacitance, CIN, which includes the amplifier input capacitance and PC board parasitic capacitance. CFB CAPACITIVE LOAD AND STABILITY The OPA347 in a unity-gain configuration can directly drive up to 250pF pure capacitive load. Increasing the gain enhances the amplifier’s ability to drive greater capacitive loads (see the characteristic curve Small-Signal Overshoot vs Capacitive Load). In unity-gain configurations, capacitive load drive can be improved by inserting a small (10Ω to 20Ω) resistor, RS, in series with the output, as shown in Figure 6. This significantly reduces ringing while maintaining Direct Current (DC) performance for purely capacitive loads. However, if there is a resistive load in parallel with the capacitive load, a voltage divider is created, introducing a DC error at the output and slightly reducing the output swing. The error introduced is proportional to the ratio RS /RL, and is generally negligible. RF RI VIN VOUT OPA347 CIN CL FIGURE 7. Adding a Feedback Capacitor In the Unity-Gain Inverter Configuration Improves Capacitative Load. DRIVING ADCs The OPA347 series op amps are optimized for driving medium-speed sampling Analog-to-Digital Converters (ADCs). The OPA347 op amps buffer the ADC’s input capacitance and resulting charge injection while providing signal gain. V+ RS VOUT OPA347 FIGURE 6. Series Resistor in Unity-Gain Buffer Configuration Improves Capacitive Load Drive. See Figure 8 for the OPA347 in a basic noninverting configuration driving the ADS7822. The ADS7822 is a 12-bit, microPower sampling converter in the MSOP-8 package. When used with the low-power, miniature packages of the OPA347, the combination is ideal for space-limited, lowpower applications. In this configuration, an RC network at the ADC input can be used to provide for anti-aliasing filter and charge injection current. In unity-gain inverter configuration, phase margin can be reduced by the reaction between the capacitance at the op amp input, and the gain setting resistors, thus degrading capacitive load drive. Best performance is achieved by using small valued resistors. For example, when driving a 500pF See Figure 9 for the OPA2347 driving an ADS7822 in a speech bandpass filtered data acquisition system. This small, low-cost solution provides the necessary amplification and signal conditioning to interface directly with an electret microphone. This circuit will operate with VS = 2.7V to 5V with less than 250µA typical quiescent current. 10Ω to 20Ω VIN RL CL OPA347, 2347, 4347 SBOS167D www.ti.com 9 +5V 0.1µF 0.1µF 1 VREF 8 V+ DCLOCK 500Ω +In OPA347 ADS7822 12-Bit ADC 2 VIN –In CS/SHDN 3 3300pF DOUT 7 6 Serial Interface 5 GND 4 VIN = 0V to 5V for 0V to 5V output. NOTE: ADC Input = 0V to VREF RC network filters high-frequency noise. FIGURE 8. OPA347 in Noninverting Configuration Driving ADS7822. V+ = +2.7V to 5V Passband 300Hz to 3kHz R9 510kΩ R1 1.5kΩ R2 1MΩ R4 20kΩ C3 33pF C1 1000pF 1/2 OPA2347 Electret Microphone(1) R3 1MΩ R7 51kΩ R8 150kΩ VREF 1 8 V+ 7 C2 1000pF R6 100kΩ 1/2 OPA2347 +IN ADS7822 6 12-Bit A/D 5 2 –IN DCLOCK DOUT CS/SHDN Serial Interface 3 4 NOTE: (1) Electret microphone powered by R1. R5 20kΩ G = 100 GND FIGURE 9. Speech Bandpass Filtered Data Acquisition System. 10 OPA347, 2347, 4347 www.ti.com SBOS167D OPA2347 WCSP PACKAGE OPA2347YED Top View 1 YMDCCS The OPA2347YED and OPA2347YZDR are die-level packages using bump-on-pad technology. The OPA2347YED device has tin-lead balls; the OPA2347YZDR has lead-free balls. Unlike devices that are in plastic packages, these devices have no molding compound, lead frame, wire bonds, or leads. Using standard surface-mount assembly procedures, the WCSP can be mounted to a printed circuit board without additional under fill. Figures 10 and 11 detail pinout and package marking. Actual Size: Exact Size: 1.008mm x 2.100mm Package Marking Code: YMD = year/month/day CC = indicates OPA2347YED A9 = indicates OPA2347YZD S = for engineering purposes only (bump side down) FIGURE 11. Top View Package Marking. PHOTOSENSITIVITY OPA2347 (bump side down) Not to Scale 1 Although the OPA2347YED/YZD package has a protective backside coating that reduces the amount of light exposure on the die, unless fully shielded, ambient light will still reach the active region of the device. Input bias current for the OPA2347YED/YZD package is specified in the absence of light. Depending on the amount of light exposure in a given application, an increase in bias current, and possible increases in offset voltage should be expected. In circuit board tests under ambient light conditions, a typical increase in bias current reached 100pA. Flourescent lighting may introduce noise or hum due to their time varying light output. Best practice should include end-product packaging that provides shielding from possible light souces during operation. Out A 1 8 V+ –In A 2 7 Out B +In A 3 6 –In B V– 4 5 +In B WCSP-8 (top view) FIGURE 10. Pin Description. RELIABILITY TESTING To ensure reliability, the OPA2347YED and OPA2347YZDR devices have been verified to successfully pass a series of reliability stress tests. A summary of JEDEC standard reliability tests is shown in Table I. TEST CONDITION ACCEPT CRITERIA (ACTUAL) SAMPLE SIZE –40°C to 125°C, 1 Cycle/hr, 15 Minute Ramp(1) 10 Minute Dwell 500 (1600) Cycles, R < 1.2X from R0 36 50cm 10 (129) Drops, R < 1.2X from R0 8 Key Push 100 Cycles/min, 1300 µε, Displacement = 2.7mm Max 5K (6.23K) Cycles, R < 1.2X from R0 8 3 Point Bend Strain Rate 5 mm/min, 85 mm Span R < 1.2X from R0 8 Temperature Cycle Drop NOTE: (1) Per IPC9701. TABLE I. Reliability Test Results. OPA347, 2347, 4347 SBOS167D www.ti.com 11 LAND PATTERNS AND ASSEMBLY The recommended land pattern for the OPA2347YED package is detailed in Figure 12 with specifications listed in Table II. The maximum amount of force during assembly should be limited to 30 grams of force per bump. FIGURE 12. Recommended Land Area. SOLDER PAD DEFINITION COPPER PAD SOLDER MASK OPENING COPPER THICKNESS STENCIL OPENING STENCIL THICKNESS Non-Solder Mask Defined (NSMD) 275µm (+0.0, –25µm) 375µm (+0.0, –25µm) 1 oz max 275µm X 275µm, sq 125µm Thick NOTES: (1) Circuit traces from NSMD-defined PWB lands should be less tham 100µm (preferrably = 75µm) wide in the exposed area inside the solder mask opening. Wider trace widths will reduce device stand off and impact reliability. (2) Recommended solder paste is type 3 or type 4. (3) Best reliability results are achieved when the PWB laminate glass transistion temperature is above the operating range of the intended application. (4) For PWB using an Ni/Au surface finish, the gold thickness should be less than 0.5um to avoid solder embrittlement and a reduction in thermal fatigue performance. (5) Solder mask thickness should be less than 20um on top of the copper circuit pattern. (6) Best solder stencil performance will be achieved using laser-cut stencils with electro polishing. Use of chemically etched stencils results in inferior solder paste volume control. (7) Trace routing away from the WLCSP device should be balanced in X and Y directions to avoid unintentional component movement due to solder wetting forces. TABLE II. Recommended Land Pattern. 12 OPA347, 2347, 4347 www.ti.com SBOS167D PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) OPA2347EA/250 ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 B47 OPA2347EA/250G4 ACTIVE SOT-23 DCN 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 B47 OPA2347EA/3K ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 B47 OPA2347EA/3KG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 B47 OPA2347UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 2347UA OPA2347UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 2347UA OPA2347UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 2347UA OPA2347UA/2K5Q1 OBSOLETE SOIC D 8 TBD Call TI Call TI OPA2347UAG4 ACTIVE SOIC D 8 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 2347UA OPA2347YEDR OBSOLETE DSBGA YED 8 TBD Call TI Call TI -55 to 125 -55 to 125 75 OPA2347YEDT OBSOLETE DSBGA YED 8 TBD Call TI Call TI OPA2347YZDR ACTIVE DSBGA YZD 8 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM OPA2347YZDT ACTIVE DSBGA YZD 8 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -55 to 125 OPA2347 OPA347NA/250 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 A47 OPA347NA/250G4 ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 A47 OPA347NA/3K ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 A47 OPA347NA/3KG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 A47 OPA347PA ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -55 to 125 OPA347PA Addendum-Page 1 (A9 ~ OPA2347) Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device Status (1) (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) OPA347PAG4 ACTIVE PDIP P 8 50 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -55 to 125 OPA347PA OPA347SA/250 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 S47 OPA347SA/250G4 ACTIVE SC70 DCK 5 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 S47 OPA347SA/3K ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 S47 OPA347SA/3KG4 ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 S47 OPA347UA ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 347UA OPA347UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 347UA OPA347UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 347UA OPA347UAG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 347UA OPA4347EA/250 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 4347EA OPA4347EA/250G4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 4347EA OPA4347EA/2K5 ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 4347EA OPA4347EA/2K5G4 ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA 4347EA OPA4347UA ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA4347UA OPA4347UA/2K5 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA4347UA OPA4347UA/2K5G4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA4347UA OPA4347UAG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -55 to 125 OPA4347UA The marketing status values are defined as follows: Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) OPA2347EA/250 SOT-23 DCN 8 250 179.0 8.4 OPA2347EA/3K SOT-23 DCN 8 3000 179.0 OPA347SA/250 SC70 DCK 5 250 178.0 OPA347SA/250 SC70 DCK 5 250 OPA347SA/3K SC70 DCK 5 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 9.0 2.4 2.5 1.2 4.0 8.0 Q3 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3 OPA347SA/3K SC70 DCK 5 3000 179.0 8.4 2.2 2.5 1.2 4.0 8.0 Q3 OPA347UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA4347EA/250 TSSOP PW 14 250 180.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 OPA4347EA/2K5 TSSOP PW 14 2500 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 OPA4347UA/2K5 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA2347EA/250 SOT-23 DCN OPA2347EA/3K SOT-23 DCN 8 250 203.0 203.0 35.0 8 3000 203.0 203.0 35.0 OPA347SA/250 SC70 OPA347SA/250 SC70 DCK 5 250 180.0 180.0 18.0 DCK 5 250 203.0 203.0 OPA347SA/3K 35.0 SC70 DCK 5 3000 180.0 180.0 18.0 OPA347SA/3K SC70 DCK 5 3000 203.0 203.0 35.0 OPA347UA/2K5 SOIC D 8 2500 367.0 367.0 35.0 OPA4347EA/250 TSSOP PW 14 250 210.0 185.0 35.0 OPA4347EA/2K5 TSSOP PW 14 2500 367.0 367.0 35.0 OPA4347UA/2K5 SOIC D 14 2500 367.0 367.0 38.0 Pack Materials-Page 2 D: Max = 2.092 mm, Min =2.031 mm E: Max = 0.999 mm, Min =0.938 mm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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