NJU7026 Small Package, 13μA, Rail-to-Rail Output Single CMOS Operational Amplifier ■ PACKAGE OUTLINE ■ GENERAL DESCRIPTION The NJU7026 is a low power, single CMOS operational amplifier available in small packages, SC88A and MTP5. The NJU7026 can operate from a single-supply voltage of +1.8V to +5.5V. In addition, this amplifier features Rail-to-Rail output and low input bias current (1pA). Because of these features, the NJU7026 is ideal for low side current sense amplifier. The very low supply current of the NJU7026 (13μA) makes it suitable for battery-operated application. NJU7026F (SOT-23) NJU7026F3 (SC88A) ■ FEATURES •Low Supply Current 13μA typ. (at VDD= 5V), 12μA typ. (at VDD= 3V, 1.8V) •Low Operating Voltage Vopr= 1.8V to 5.5V •Rail-to-Rail Output VOH=4.9V min./ VOL=0.1V max. (at VDD= 5V, RL=100kΩ) VOH=4.8V min./ VOL=0.2V max. (at VDD= 5V, IO=1mA) •Small Package SC88A, MTP5 •Enhanced RF Noise Immunity •CMOS Process ■ APPLICATION •Battery-operated application •Battery monitor •Current sensor •Photodiode amplification ■ PIN CONFIGURATION (Top View) 1 2 3 E0 20100202 5 + 4 PIN FUNCTION 1: +INPUT 2: GND 3: -INPUT 4: OUTPUT 5: VDD -1- NJU7026 ■ ABSOLUTE MAXIMUM RATINGS (Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VDD +7 Input Common Mode Voltage VICM V SS -0.3 to V DD +0.3 Differential Input Voltage VID ±7 (Note1) Power Dissipation PD 390[MTP5] *2), 280[SC88A] *2) Operating Temperature Range T opr -40 to +85 Storage Temperature Range T st g -55 to +125 (Note1) For supply voltage less than +7V, the absolute maximum rating is equal to the supply voltage. V V V mW ˚C ˚C (Note2) EIA/JEDEC STANDARD Test board (76.2 x 114.3 x 1.6mm, 2layers, FR-4) mounting. (Note3) Do not exceed “Power dissipation: PD” in which power dissipation in IC is shown by the absolute maximum rating. See Figure “Power Dissipation Curve” when ambient temperature is over 25˚C. Power Dissipation Derating Curve 500 Power Dissipation Pd (mW) MTP5(Note2) 400 300 SC88A(Note2) 200 100 0 5 15 25 35 45 55 65 75 85 95 105 Ambient Temperature Ta(deg) ■ RECOMMENDED OPERATING CONDITION (Ta=25˚C) -2- PARAMETER SYMBOL RATING UNIT Supply Voltage V DD 1.8 to 5.5 V E0 20100202 NJU7026 ■ ELECTRICAL CHARACTERISTICS DC CHARACTER (VDD=5V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Supply Current IDD No Signal - 13 20 µA Input Offset Voltage Input Offset Voltage drift Input Bias Current VIO ΔVio/ΔT IB Vic=0V, RS=50Ω - 0.9 1.5 1 4 - mV µV/ºC pA - 1 - pA Vo=0.5V to 4.5V, RL=100kΩ to 2.5V 70 90 - dB Input Offset Current IIO Open loop gain AV Common Mode Rejection Ratio CMR VICM=0V to 4.1V 65 80 - dB Supply Voltage Rejection Ratio SVR VDD=1.8V to 5.5V 70 90 - dB VOH1 RL=100kΩ to 2.5V 4.9 4.95 - V VOL1 RL=100kΩ to 2.5V - 0.05 0.1 V VOH2 RL=100kΩ to 0V 4.9 4.95 - V VOL2 RL=100kΩ to 0V - 0.02 0.05 V VOH3 Isource=1mA 4.8 4.85 - V VOL3 Isink=1mA - 0.15 0.2 V VICM CMR≥65dB 0 - 4.1 V Maximum Output Voltage 1 Maximum Output Voltage 2 Maximum Output Voltage 3 Common Mode Input Voltage Range AC CHARACTER (VDD=5V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Gain Bandwidth Product GBW RL=100kΩ to 2.5V, CL=20pF, f=10kHz - 160 - kHz Phase Margin φM RL=100kΩ to 2.5V, CL=20pF - 80 - deg Gain Margin GM RL=100kΩ to 2.5V, CL=20pF - 15 - dB Equivalent Input Noise Voltage en f=1kHz - 50 - nV/√Hz Slew Rate SR GV=0dB, RL=100kΩ to 2.5V, CL=20pF, Vin=3Vpp (1V to 4V) (Note4) (Note5) - 0.05 - V/us Power Bandwidth PBW GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vin=2.5Vpp (1.25V to 3.75V), Vo≥4.8Vpp (Note6) - 5 - kHz Total Harmonic Distortion THD GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vo=4Vpp, f=100Hz (Note6) - 0.01 - % (Note4) Slew rate is defined by the lower value of the rise or fall. (Note5) See figure2-1 for test circuit. (Note6) See figure2-3 for test circuit. E0 20100202 -3- NJU7026 ■ ELECTRICAL CHARACTERISTICS DC CHARACTER (VDD=3V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Supply Current IDD No Signal - 12 19 µA Input Offset Voltage Input Offset Voltage drift Input Bias Current VIO ΔVio/ΔT IB Vic=0V, RS=50Ω - 0.9 1.5 1 4 - mV µV/ºC pA - 1 - pA Vo=0.5V to 2.5V, RL=100kΩ to 1.5V 70 90 - dB Input Offset Current IIO Open loop gain AV Common Mode Rejection Ratio CMR VICM=0V to 2.1V 65 80 - dB Supply Voltage Rejection Ratio SVR VDD=1.8V to 5.5V 70 90 - dB VOH1 RL=100kΩ to 1.5V 2.9 2.95 - V VOL1 RL=100kΩ to 1.5V - 0.05 0.1 V VOH2 RL=100kΩ to 0V 2.9 2.95 - V VOL2 RL=100kΩ to 0V - 0.02 0.05 V VOH3 Isource=1mA 2.8 2.85 - V VOL3 Isink=1mA - 0.15 0.2 V VICM CMR≥65dB 0 - 2.1 V Maximum Output Voltage 1 Maximum Output Voltage 2 Maximum Output Voltage 3 Common Mode Input Voltage Range AC CHARACTER (VDD=3V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Gain Bandwidth Product GBW RL=100kΩ to 1.5V, CL=20pF, f=10kHz - 150 - kHz Phase Margin φM RL=100kΩ to 1.5V, CL=20pF - 80 - deg Gain Margin GM RL=100kΩ to 1.5V, CL=20pF - 15 - dB Equivalent Input Noise Voltage en f=1kHz - 50 - nV/√Hz Slew Rate SR GV=0dB, RL=100kΩ to 1.5V, CL=20pF, Vin=1Vpp (1V to 2V) (Note4) (Note5) - 0.05 - V/us Power Bandwidth PBW GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vin=1.5Vpp (0.75V to 2.25V), Vo≥2.8Vpp (Note6) - 8 - kHz Total Harmonic Distortion THD GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vo=2Vpp, f=100Hz (Note6) - 0.01 - % (Note4) Slew rate is defined by the lower value of the rise or fall. (Note5) See figure2-1 for test circuit. (Note6) See figure2-3 for test circuit. -4- E0 20100202 NJU7026 ■ ELECTRICAL CHARACTERISTICS DC CHARACTER (VDD=1.8V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Supply Current IDD No Signal - 12 18 µA Input Offset Voltage Input Offset Voltage drift Input Bias Current VIO ΔVio/ΔT IB Vic=0V, RS=50Ω - 0.9 1.5 1 4 - mV µV/ºC pA Input Offset Current IIO - 1 - pA Open loop gain AV Vo=0.5V to 2.5V, RL=100kΩ to 0.9V 70 90 - dB Common Mode Rejection Ratio CMR VICM=0V to 0.9V 65 80 - dB Supply Voltage Rejection Ratio Maximum Output Voltage 1 Maximum Output Voltage 2 Maximum Output Voltage 3 Common Mode Input Voltage Range SVR VDD=1.8V to 5.5V 70 90 - dB VOH1 RL=100kΩ to 0.9V 1.7 1.75 - V VOL1 RL=100kΩ to 0.9V - 0.05 0.1 V VOH2 RL=100kΩ to 0V 1.7 1.75 - V VOL2 RL=100kΩ to 0V - 0.02 0.05 V VOH3 Isource=0.5mA 1.5 1.55 - V VOL3 Isink=0.5mA - 0.25 0.3 V VICM CMR≥65dB 0 - 0.9 V AC CHARACTER (VDD=1.8V, VSS=0V, Ta=25˚C, unless otherwise noted.) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Gain Bandwidth Product GBW Phase Margin φM RL=100kΩ to 0.9V, CL=20pF, f=10kHz - RL=100kΩ to 0.9V, CL=20pF - 140 - kHz 80 - deg Gain Margin GM RL=100kΩ to 0.9V, CL=20pF - Equivalent Input Noise Voltage en f=1kHz - 15 - dB 50 - Slew Rate SR GV=0dB, RL=100kΩ to 1.5V, CL=20pF, Vin=0.5Vpp (0.3V to 0.8V) (Note4) (Note7) nV/√Hz - 0.05 - V/us Power Bandwidth PBW GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vin=0.9Vpp (0V to 0.9V), Vo≥1.6Vpp (Note8) - 14 - kHz Total Harmonic Distortion THD GV=6dB, RF=50kΩ, RG=50kΩ, CL=20pF, Vo=1Vpp, f=100Hz (Note8) - 0.01 - % (Note4) Slew rate is defined by the lower value of the rise or fall. (Note7) See figure2-2 for test circuit. (Note8) See figure2-4 for test circuit.. E0 20100202 -5- NJU7026 ■ MEASUREMENT CIRCUITS VDD Vin VDD Vin Vout Vout RL RL CL CL VDD 2 Figure 2-1:Measurement circuit 1 Vin Figure 2-2:Measurement circuit 2 VDD Vin VDD Vout Vout CL CL RF RG RF RG VDD 2 Figure 2-3:Measurement circuit 3 -6- Figure 2-4:Measurement circuit 4 E0 20100202 NJU7026 ■ TYPICAL CHARACTERISTICS Supply Current vs. Supply Voltage Supply Current vs. Temperature GV=0dB, VICM=VDD/2 GV=0dB, VICM=VDD/2 16 16 14 14 Ta=85°C Ta=25°C 12 Supply Current [μA] Supply Voltage [μA] 12 VDD=5V 10 Ta=-40°C 8 6 10 VDD=1.8V 6 4 4 2 2 0 VDD=3V 8 0 0 1 2 3 4 5 6 7 -50 -25 0 Supply Voltage [V] 25 4.0 125 4.0 Input Offset Voltage(based on VDD/2)[mV] Input Offset Voltage(based on VDD/2)[mV] 100 VDD=3V VICM=VDD/2 3.0 2.0 1.0 VDD=5V 0.0 -1.0 VDD=3V VDD=1.8V -2.0 -3.0 -4.0 3.0 2.0 Ta=-40°C 1.0 0.0 Ta=25°C -1.0 Ta=85°C -2.0 -3.0 -4.0 -50 -25 0 25 50 75 100 125 -2.0 Ambient Temperature [°C] -1.0 0.0 1.0 2.0 3.0 4.0 Common-Mode Voltage [V] Input Offset Voltage Distribution Input Offset Voltage Drift Distribution VDD=3V, VICM=0V, Ta=25°C VDD=3V, VICM=0V, Ta=-40°C to 85°C 50 50 40 40 N=100pcs N=100pcs Number of Amplifier Number of Amplifier 75 Input Offset Voltage vs. Common-Mode Voltage Input Offset Voltage vs. Temperature 30 20 10 30 20 10 0 0 -4.5 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 Input Offset Voltage [mV] E0 20100202 50 Ambient Temperature [°C] 3.5 4.5 -5.5 -4.5 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 5.5 Input Offset Voltage Drift [μV/°C] -7- NJU7026 ■ TYPICAL CHARACTERISTICS Common-Mode Rejection Ratio vs. Temperature VICM=0V to VDD-0.9V Supply Voltage Rejection Ration vs. Temperature VDD=1.8V to 5.5V 120 VDD=5V 100 80 Supply Voltage Rejection Ratio [dB] Common-Mode Rejection Ratio [dB] 120 VDD=3V VDD=1.8V 60 40 20 0 100 80 60 40 20 0 -50 -25 0 25 50 75 100 125 -50 -25 Ambient Temperature [°C] Open-Loop Gain vs. Temperature 25 50 75 100 125 Maximum Output Voltage vs. Output Current VDD=5V, VCM=2.5V, VIN=±0.1V VOUT=0.5V to VDD-0.5V, RL=100kΩ 5.0 120 4.5 80 Maximum Output Voltage [V] VDD=5V 100 Open-Loop Gain [dB] 0 Ambient Temperature [°C] VDD=3V VDD=1.8V 60 40 20 4.0 Ta=85°C 3.5 Ta=25°C Ta=-40°C 3.0 2.5 2.0 Ta=85°C 1.5 Ta=25°C 1.0 Ta=-40°C 0.5 0.0 0.001 0 -50 -25 0 25 50 75 100 125 0.01 Maximum Output Voltage vs. Output Current VDD=3V, VCM=1.5V, VIN=±0.1V 1.5 Ta=85°C Maximum Output Voltage [V] Maximum Output Voltage [V] 10 100 1.8 2.5 Ta=25°C 2.0 Ta=-40°C 1.5 Ta=85°C 1.0 Ta=25°C Ta=-40°C 0.5 0.01 0.1 1 Output Current [mA] -8- 1 Maximum Output Voltage vs. Output Current VDD=1.8V, VCM=0.9V, VIN=±0.1V 3.0 0.0 0.001 0.1 Output Current [mA] Ambient Temperature [°C] 10 100 Ta=85°C Ta=25°C 1.2 Ta=-40°C 0.9 0.6 Ta=85°C Ta=25°C 0.3 0.0 0.001 Ta=-40°C 0.01 0.1 1 10 100 Output Current [mA] E0 20100202 NJU7026 ■ TYPICAL CHARACTERISTICS Pulse Response(Load Capacitance) Pulse Response(Load Capacitance) VDD=3V, GV=0dB, RL=100kΩ, Ta=25°C VDD=3V, GV=0dB, RL=100kΩ, Ta=25°C INPUT 0.5V/div. 0.5V/div. INPUT OUTPUT CL=200pF CL=20pF CL=20pF OUTPUT CL=200pF 10μs/div. 10μs/div. Closed-Loop Gain, Phase vs. Frequency Input Voltage Noise vs. Frequency VDD=3V, RF=100kΩ, RG=10kΩ, RS=100Ω, Ta=25°C RF=1MΩ, RG=10kΩ, RL=100kΩ, CL=20pF, Ta=25°C VDD=5V 60 0 0 Phase -20 -60 VDD=5V -40 VDD=3V -180 10k 100k 125 100 75 50 25 -60 1k 150 -120 VDD=1.8V 100 Voltage Noise [nV/√Hz] VDD=1.8V 20 175 120 VDD=3V Phase[deg] Gain 40 Closed-Loop Gain[dB] 200 180 60 1M Frequency[Hz] 0 1 10 100 1000 10000 Frequency [Hz] THD + Noise vs. Output Voltage VDD=3V, f=100Hz, GV=6dB, RF=50kΩ, Ta=25°C Total Harmonic Distortion + Noise [%] 10 1 0.1 0.01 0.001 0.001 0.01 0.1 1 10 100 Output Voltage [Vrms] E0 20100202 -9- NJU7026 ■ MEMO [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - 10 - E0 20100202