SDAS141A − DECEMBER 1983 − REVISED JANUARY 1995 • • • 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters by eliminating the need for 3-state overlap protection. With the ′AS756 and SN74AS757, these devices provide the choice of selected combinations of inverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 2Y4 1A1 1OE VCC SN54AS760 . . . FK PACKAGE (TOP VIEW) The SN54AS760 is characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74ALS760 and SN74AS760 are characterized for operation from 0°C to 70°C. 1A2 2Y3 1A3 2Y2 1A4 2OE • SN54AS760 . . . J PACKAGE SN74ALS760, SN74AS760 . . . DW OR N PACKAGE (TOP VIEW) Open-Collector Outputs Drive Bus Lines or Buffer Memory Address Registers Eliminates the Need for 3-State Overlap Protection pnp Inputs Reduce dc Loading Open-Collector Versions of ′ALS244 and ′AS244 Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mil DIPs 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 • Copyright 1995, Texas Instruments Incorporated !"# $ %&'# "$ (&)*%"# +"#', +&%#$ %! # $('%%"#$ (' #-' #'!$ '."$ $#&!'#$ $#"+"+ /""#0, +&%# (%'$$1 +'$ # '%'$$"*0 %*&+' #'$#1 "** (""!'#'$, • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 SDAS141A − DECEMBER 1983 − REVISED JANUARY 1995 logic symbol† 1OE 1A1 1A2 1A3 1A4 1 logic diagram (positive logic) 1OE EN 2 18 4 16 6 14 8 12 1A1 1Y1 2OE 1Y3 1A2 2A2 2A3 2A4 18 4 16 6 14 8 12 1Y1 1Y2 1Y4 1Y3 EN 1A4 2A1 2 1Y2 1A3 19 1 11 9 13 7 15 5 17 3 1Y4 2Y1 2Y2 2OE 2Y3 19 2Y4 2A1 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2A2 2A3 2A4 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN74ALS760 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. recommended operating conditions SN74ALS760 MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 High-level output voltage 5.5 V IOL TA Low-level output current 24 mA 70 °C 2 High-level input voltage 2 Operating free-air temperature 0 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • V V V SDAS141A − DECEMBER 1983 − REVISED JANUARY 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER SN74ALS760 TYP† MAX TEST CONDITIONS MIN VIK IOH VCC = 4.5 V, VCC = 4.5 V, II = − 18 mA VOH = 5.5 V IOL VCC = 4.5 V IOL = 12 mA IOL = 24 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V IIL VCC = 5.5 V, ICC VCC = 5.5 V VI = 0.4 V Outputs high 9 15 Outputs low 15 19 UNIT −1.5 V 0.1 mA 0.25 0.4 0.35 0.5 0.1 V mA 20 µA −0.1 mA mA † All typical values are at VCC = 5 V, TA = 25°C. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX‡ UNIT SN74ALS760 tPLH tPHL A Y tPLH tPHL OE Y MIN MAX 5 15 5 12 5 16 5 13 ns ns ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)§ Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Operating free-air temperature range, TA: SN54AS760 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C SN74AS760 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C § Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 SDAS141A − DECEMBER 1983 − REVISED JANUARY 1995 recommended operating conditions SN54AS760 SN74AS760 MIN NOM MAX MIN NOM MAX 4.5 5 5.5 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL VOH Low-level input voltage 0.8 0.8 High-level output voltage 5.5 5.5 V IOL TA Low-level output current 48 64 mA 70 °C High-level input voltage 2 Operating free-air temperature 2 −55 125 V V 0 V electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK IOH SN54AS760 TYP† MAX TEST CONDITIONS MIN SN74AS760 TYP† MAX MIN UNIT VCC = 4.5 V, VCC = 4.5 V, II = − 18 mA VOH = 5.5 V −1.2 −1.2 V 0.1 0.1 mA 0.55 VOL VCC = 4.5 V IOL = 48 mA IOL = 64 mA II IIH VCC = 5.5 V, VCC = 5.5 V, VI = 7 V VI = 2.7 V VCC = 5.5 V, VI = 0.4 V 0.55 OE IIL A ICC VCC = 5.5 V V 0.1 0.1 mA 20 20 µA −0.5 −0.5 −1 −1 Outputs high 20 32 20 32 Outputs low 60 94 60 94 mA mA † All typical values are at VCC = 5 V, TA = 25°C. switching characteristics (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) VCC = 4.5 V to 5.5 V, CL = 50 pF, RL = 500 Ω, TA = MIN to MAX‡ SN54AS760 tPLH tPHL A Y tPLH tPHL OE Y MIN MAX MIN MAX 3 19.5 3 18.5 1 7 1 6 3 19.5 3 18.5 1 8 1 7 ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. 4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • UNIT SN74AS760 ns ns SDAS141A − DECEMBER 1983 − REVISED JANUARY 1995 PARAMETER MEASUREMENT INFORMATION SERIES 54ALS/74ALS AND 54AS/74AS DEVICES 7V RL = R1 = R2 VCC S1 RL R1 Test Point From Output Under Test CL (see Note A) From Output Under Test RL Test Point CL (see Note A) CL (see Note A) LOAD CIRCUIT FOR BI-STATE TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR OPEN-COLLECTOR OUTPUTS 3.5 V Timing Input Test Point From Output Under Test LOAD CIRCUIT FOR 3-STATE OUTPUTS 3.5 V High-Level Pulse 1.3 V R2 1.3 V 1.3 V 0.3 V 0.3 V tsu Data Input tw th 3.5 V 1.3 V 3.5 V Low-Level Pulse 1.3 V 0.3 V 1.3 V 0.3 V VOLTAGE WAVEFORMS PULSE DURATIONS VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3.5 V Output Control (low-level enabling) 1.3 V 1.3 V 0.3 V tPZL Waveform 1 S1 Closed (see Note B) tPLZ 3.5 V Input tPZH 1.3 V 0.3 V tPHL tPLH VOH In-Phase Output VOL 0.3 V 1.3 V 1.3 V VOL tPLH tPHL VOH 1.3 V 1.3 V [3.5 V 1.3 V tPHZ Waveform 2 S1 Open (see Note B) 1.3 V VOH Out-of-Phase Output (see Note C) 0.3 V [0 V 1.3 V 1.3 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuits and Voltage Waveforms • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 5 PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) 5962-87767012A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596287767012A SNJ54AS 760FK 5962-8776701RA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8776701RA SNJ54AS760J SN74ALS760DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS760 SN74ALS760DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS760 SN74ALS760DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 ALS760 SN74ALS760DWR OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70 ALS760 SN74ALS760DWRE4 OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70 SN74ALS760DWRG4 OBSOLETE SOIC DW 20 TBD Call TI Call TI 0 to 70 SN74ALS760N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74ALS760N SN74ALS760NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74ALS760N SN74AS760DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 AS760 SN74AS760N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74AS760N SN74AS760N3 OBSOLETE PDIP N 20 TBD Call TI Call TI 0 to 70 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 25-Sep-2013 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) SN74AS760NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74AS760N SN74AS760NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74AS760 SN74AS760NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74AS760 SN74AS760NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74AS760 SNJ54AS760FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 596287767012A SNJ54AS 760FK SNJ54AS760J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8776701RA SNJ54AS760J SNJ54AS760W OBSOLETE CFP W 20 TBD Call TI N / A for Pkg Type -55 to 125 5962-8776701SA SNJ54AS760W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 25-Sep-2013 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF SN54AS760, SN74AS760 : • Catalog: SN74AS760 • Military: SN54AS760 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AS760DWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74AS760NSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74AS760DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74AS760NSR SO NS 20 2000 367.0 367.0 45.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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