PI29FCT520T/2520T PI29FCT521T 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 Fast CMOS Multilevel Pipeline Registers Product Features: Product Description: • PI29FCT520T and PI29FCT521T are pinout and function compatible with IDT29FCT520/521, QS29FCT520/521 and AMD's Am29520/521 • Four 8-bit high-speed registers Pericom Semiconductor’s PI29FCT series of logic circuits are pro-duced in the Company’s advanced 0.8 micron CMOS technology, achieving industry leading speed grades. The PI29FCT520T/2520T and PI29FCT521T are multilevel pipeline registers containing four 8-bit positive triggered registers which can be configured as a dual 2-level or a single 4-level pipeline. These products are designed for use as temporary storage or for storage delays in pipelined systems. The PI29FCT521T differs from the PI29FCT520T/2520T only in the way data is loaded into and between registers in the dual 2-level operation. When data is entered into the first level (I = 2 or I = 1) of the PI29FCT520T/2520T, the existing data in the first level is moved to the second level. In the PI29FCT521T, these instructions simply overwrite the data in the first level. Transfer of data to the second level is achieved using the 4-level shift instruction (I = 0) causing the first level to change. In either part, I = 3 shift instruction puts the registers on hold. • Hold, Transfer, and load instructions • Dual two-level or single four-level pipeline operation • TTL input and output levels, reducing problematic "ground bounce" • High output drive IOL = 48 mA • Extremely low static power (1 mW, typ.) • Industrial operating temperature range: –40°C to +85°C • FCT (2xxxT) has a 25Ω series resistor. • Packages available: – 24-pin 300 mil wide plastic DIP (P24) – 24-pin 150 mil wide plastic QSOP (Q24) – 24-pin 150 mil wide plastic TQSOP (R24) – 24-pin 300 mil wide plastic SOIC (S24) Device models available upon request. Logic Block Diagram D0–D7 8 MUX 2 I0,I1 REGISTER CONTROL OCTAL REGISTER A1 OCTAL REGISTER B1 OCTAL REGISTER A2 OCTAL REGISTER B2 1 CLK S0,S1 2 MUX OE 8 Y0–Y7 PS2002B 12/10/96 1 FCT520.pm6 1 12/18/96, 4:44 PM PI29FCT520/521T/2520T MULTILEVEL PIPELINE REGISTERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 Product Pin Description Product Pin Configuration 1 24 2 23 3 22 4 21 5 24-PIN 20 P24 6 19 Q24 18 7 R24 8 17 S24 9 16 10 15 11 14 12 13 I0 I1 D0 D1 D2 D3 D4 D5 D6 D7 CLK GND V CC Pin Name Description OE Output Enable Input (Active LOW) for 3-State Output Port Clock Input. Enter data into registers on LOW-to-HIGH transistions S0 S1 CLK Y0 Y1 I0,I1 S0,S1 Y2 Y3 Dx Instruction Inputs Multiplexer Select. Inputs either register A1, A2, B1, or B2 data to be avaialbe at the output ports Register Inputs Yx GND Register Outputs Ground VCC Power Y4 Y5 Y6 Y7 OE Register Selection S1 0 0 S0 0 1 Register B2 B1 1 1 0 1 A2 A1 PI29FCT520/T2520T Data Loading DUAL 2-LEVEL SINGLE 4-LEVEL A1 B1 A1 B1 A1 B1 A2 B2 A2 B2 A2 B2 I=2 I=1 I=0 NOTE: I = 3 FOR HOLD PI29FCT521T Data Loading DUAL 2-LEVEL SINGLE 4-LEVEL A1 B1 A1 B1 A1 B1 A2 B2 A2 B2 A2 B2 I=2 I=1 I=0 NOTE: I = 3 FOR HOLD PS2002B 12/10/96 2 FCT520.pm6 2 12/18/96, 4:44 PM PI29FCT520/521T/2520T MULTILEVEL PIPELINE REGISTERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ................................................................. –55°C to +125°C Ambient Temperature with Power Applied ................................. -40°C to +85°C Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V DC Input Voltage ......................................................................... –0.5V to +7.0V DC Output Current ................................................................................... 120 mA Power Dissipation ......................................................................................... 0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5V ± 5%) Parameters Test Conditions(1) Description VOH Output HIGH Voltage VCC = MIN., V IN = VIH OR VIL VOL Output LOW Voltage VCC = MIN., V IN = VIH OR VIL VIH Input HIGH Voltage Guaranteed Logic HIGH Level VIL IOH = –15.0 mA Min. Typ(2) 2.4 3.0 Max. Units V IOL = 48 mA 0.3 0.50 V IOL = 12 mA (25Ω series) 0.3 0.50 V 2.0 V Input LOW Voltage Guaranteed Logic LOW Level IIH Input HIGH Current VCC IIL Input LOW Current VCC = MAX. VIN = GND IOZH High Impedance VCC = MAX. VOUT = 2.7V 1 µA IOZL Output Current VOUT = 0.5V –1 µA VIK Clamp Diode Voltage VCC = MIN., I IN = –18 mA –1.2 V IOS Short Circuit Current (3) VCC = MAX. , VOUT = GND –60 IOFF Power Down Disable VCC = GND, VOUT = 4.5V — VH Input Hysteresis = MAX. VIN = VCC –0.7 0.8 V 1 µA –1 µA –120 — mA 100 µA 200 mV Capacitance (TA = 25°C, f = 1 MHz) Parameters(4) Description Test Conditions Typ Max. Units CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF Notes: 1. For conditions show as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is determined by device characterization but is not production tested. PS2002B 12/10/96 3 FCT520.pm6 3 12/18/96, 4:44 PM PI29FCT520/521T/2520T MULTILEVEL PIPELINE REGISTERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 Power Supply Characteristics Test Conditions(1) Parameters Description Min. Typ(2) Max. Units ICC Quiescent Power Supply Current VCC = Max. VIN = GND or VCC 0.1 10 µA ∆ICC Supply Current per Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 2.0 mA ICCD Supply Current per Input per MHz(4) VCC = Max., Outputs Open OE = GND One Input Toggling 50% Duty Cycle VIN = GND VIN = VCC 0.15 0.25 mA/ MHz IC Total Power Supply Current(5) VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle OE = GND One Bit Toggling fI = 5 MH 50% Duty Cycle VIN = GND VIN = VCC 1.5 3.5(5) mA VIN = 3.4V VIN = GND 2.0 5.5(5) VCC = Max., Outputs Open fCP = 10 MHZ 50% Duty Cycle VIN = GND VIN = VCC 3.8 7.3(5) OE = GND Eight Bits Toggling fI = 5 MHz 50% Duty Cycle VIN = 3.4V VIN = GND 6.0 16.3(5) Notes: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at Vcc = 5.0V, +25°C ambient. 3. Per TTL driven input (VIN = 3.4V, control inputs only); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply characteristics. 5. Values for these conditions are examples of the ICC formula. These limits are guAranteed but not tested. 6. IC =IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC D HNT + ICCD (fCP/2 + fINI) ICC = Quiescent Current ∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fI = Input Frequency NI = Number of Inputs at fI All currents are in milliamps and all frequencies are in megahertz. PS2002B 12/10/96 4 FCT520.pm6 4 12/18/96, 4:44 PM PI29FCT520/521T/2520T MULTILEVEL PIPELINE REGISTERS 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123 PI29FCT520T/2520T Switching Characteristics over Operating Range FCT520AT/2520AT FCT520BT/2520BT Com. Parameters tPLH tPHL tPLH tPHL tSU tH tSU tH tPZH tPZL tPHZ tPLZ tW Com. Description Conditions(1) Min Max Min Max Unit Propagation Delay CLK to YX Propagation Delay S0 or S1 to Y X Setup Time HIGH or LOW DX to CLK Hold Time HIGH or LOW DX to CLK Setup Time HIGH or LOW I0 or I1 to CLK Hold Time HIGH or LOW I0 or I1 to CLK Output Enable Time OE to Y X Output Disable Time(3) OE to Yx Clock Pulse Width(3) HIGH or LOW CL = 50 pF RL = 500Ω 2.0 14.0 2.0 7.5 ns 2.0 13.0 2.0 7.5 ns 5.0 — 2.5 — ns 2.0 — 2.0 — ns 5.0 — 4.0 — ns 2.0 — 2.0 — ns 1.5 12.0 1.5 7.0 ns 1.5 15.0 1.5 7.5 ns 7.0 — 5.5 — ns PI29FCT521T Switching Characteristics over Operating Range FCT521AT FCT521BT Com. Parameters tPLH tPHL tPLH tPHL tSU tH tSU tH tPZH tPZL tPHZ tPLZ tW Com. Description Conditions (1) Min Max Min Max Unit Propagation Delay CLK to Y X Propagation Delay S0 or S1 to YX Setup Time HIGH or LOW DX to CLK Hold Time HIGH or LOW DX to CLK Setup Time HIGH or LOW I0 or I1 to CLK Hold Time HIGH or LOW I0 or I1 to CLK Output Enable Time OE to Yx Output Disable Time(3) OE to Yx Clock Pulse Width(3) HIGH or LOW CL = 50 pF RL = 500Ω 2.0 14.0 2.0 7.5 ns 2.0 13.0 2.0 7.5 ns 5.0 — 2.5 — ns 2.0 — 2.0 — ns 5.0 — 4.0 — ns 2.0 — 2.0 — ns 1.5 12.0 1.5 7.0 ns 1.5 15.0 1.5 7.5 ns 7.0 — 5.5 — ns Notes: 1. See test circuit and wave forms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not production tested. Pericom Semiconductor Corporation 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com PS2002B 12/10/96 5 FCT520.pm6 5 12/18/96, 4:44 PM