PT5400 Series
6-A 5-V/3.3-V Input Adjustable
SWIFT™ Power Module
SLTS169C - MAY 2002 - REVISED OCTOBER 2003
Features
•
•
•
•
•
•
Fully Functional SWIFT Module
Single-Device: 5 V/3.3 V Input
DSP Compatible
No Output Capacitors Required
High Efficiency (93 % at 4 A)
Small Footprint
(0.355 in², Suffix ‘N’)
• Adjustable Output Voltage
Description
•
•
•
•
•
On/Off Inhibit Function
Short Circuit Protection
Thermal Shutdown
Space-Saving package
Solderable Copper Case
Ordering Information
The PT5400 Excalibur™ power modules are a
series of high-performance integrated switching
regulators (ISRs) based on TI’s SWIFT (Switcher
With Integrated FET Technology) regulator ICs.
These ready-to-use modules are rated for up to
6 A of output current from input voltages as low
as 3.1 V, providing a convenient step-down power
source for the industry’s latest high-performance
DSPs and microprocessors. The series includes
output voltage options as low as 1.0 VDC.
The PT5400 modules are packaged in a 5-pin
thermally efficient copper case, which offers the
advantage of solderability along with a small footprint (0.355 in², suffix ‘N’). Both through-hole and
surface mount pin configurations are available.
The product features external output voltage
adjustment, an on/off inhibit function, short circuit protection, and thermal shutdown. A 100-µF
input capacitor is required for proper operation.
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Pin-Out Information
Pin Function
Input Bus
5 V 3.3 V Pt No.
PT5401H
PT5402H
PT5408H
PT5403H
PT5404H
PT5405H
PT5406H
PT5407H
Vout
1
Inhibit *
3.3 Volts
2.5 Volts
2.5 Volts
2.0 Volts
1.8 Volts
1.5 Volts
1.2 Volts
1.0 Volts
2
Vin
3
4
GND
Vo
5
Vo Adjust
* For Inhibit pin:
Open = output enabled
Ground = output disabled
PT Series Suffix (PT1234x )
Case/Pin
Configuration
Order
Suffix
N
A
C
Vertical
Horizontal
SMD
Package
Code
(EFK)
(EFL)
(EFM)
(Reference the applicable package code drawing for the dimensions and PC board layout)
Standard Application
VOADJ
INH
1
+ V IN
2
C1
(Required)
GND
+
5
PT5400
3
+VO
4
C2
+
(Optional)
GND
C1 = Required 100 µF
C2 = Optional 100 µF
For technical support and further information, visit http://power.ti.com
PT5400 Series
6-A 5-V/3.3-V Input Adjustable
SWIFT™ Power Module
SLTS169C - MAY 2002 - REVISED OCTOBER 2003
Environmental Specifications
Characteristics
Symbols
Conditions
Min
Operating Temperature Range
Over-Temperature Shutdown
Storage Temperature
Solder Reflow Temperature
Mechanical Shock
Ta
OTP
Ts
Treflow
Over Vin range
internal junction temp, auto-reset
—
Measured on any part of module
Mil-STD-883D, Method 2002.3
Half Sine, mounted to a fixture
Mil-STD-883D, Method 2007.2,
20-2000 Hz, PCB mounted
—
Materials meet UL 94V-0
–40
—
–40
—
—
Mechanical Vibration
Weight
Flammability
Notes: (i)
(ii)
(iii)
—
—
Vertical
Horizontal
PT5400 Series
Typ
(i)
—
—
Max
Units
—
150
—
—
500
85
—
125
215 (ii)
—
°C
°C
°C
°C
G’s
20 (iii)
6.5
—
—
G’s
grams
For operation below 0 °C the external capacitors must have stable characteristics. Use either a low ESR tantalum or Oscon® capacitor.
During solder reflow of SMD package version, do not elevate the case, pin, or internal component temperatures above the stated maximum. For further
guidance refer to the application note, “Reflow Soldering Requirements for Plug-in Power Surface Mount Products,” (SLTA051).
The case pins on the through-hole package types (suffixes N & A) must be soldered. For more information see the applicable package outline drawing.
Electrical Specifications (Except PT5408)
Unless otherwise stated, T a =25 °C, V in =5 V, C1 =100 µF, C2 =0 µF, and I o =I omax
Characteristics
Symbols
Conditions
Output Current
Io
Input Voltage Range
Vin
Vin =5 V
Vin =3.3 V
Over Io range
Set-Point Voltage Tolerance
Temperature Variation
Line Regulation
Load Regulation
Total Output Variation
Vo tol
∆Regtemp
∆Regline
∆Regload
∆Regtot
Efficiency
η
Vo Ripple (pk-pk)
Transient Response
Vr
Current Limit Threshold
Output Voltage Adjust
Switching Frequency
Under-Voltage Lockout
ttr
∆Vtr
Ilim
Vo adj
ƒs
UVLO
Inhibit Control (pin1)
Input High Voltage
Input Low Voltage
Input Low Current
VIH
VIL
IIL
Standby Input Current
External Input Capacitance
External Output Capacitance
Reliability
Iin standby
C1
C2
MTBF
PT5400 Series (Except PT5408)
Min
Typ
Max
Vo ≥ 2.5 V
Vo ≤ 2.0 V
–40 °C <Ta < +85 °C
Over Vin range
Over Io range
Includes set-point, line, load,
–40 °C ≤ T a ≤ +85 °C
PT5401 (3.3 V)
Vin =5 V, Io =4 A
PT5402 (2.5 V)
PT5403 (2.0 V)
PT5404 (1.8 V)
PT5405 (1.5 V)
PT5406 (1.2 V)
PT5407 (1.0 V)
Vin =3.3 V, Io =4 A
PT5403 (2.0 V)
PT5404 (1.8 V)
PT5405 (1.5 V)
PT5406 (1.2 V)
PT5407 (1.0 V)
20 MHz bandwidth
1 A/µs load step, 50 to 100 % I omax,
C2 =100 µF
Recovery time
V o over/undershoot
∆Vo = –50 mV
Over Vin and Io ranges
Vin increasing
Vin decreasing
Referenced to GND (pin3)
Pin 1 to GND
pins 1 & 3 connected
Per Bellcore TR-332
50 % stress, Ta =40 °C, ground benign
—
—
—
Units
0
0
4.5
3.1
—
—
—
—
—
±0.5
±5
±10
6
5.5
5.5
5.5
±2
—
—
—
—
—
±3
—
—
—
—
—
—
—
—
—
—
—
—
—
93
91
88
87
85
82
80
88
86
84
81
78
15
—
—
—
—
—
—
—
—
—
—
—
—
mVpp
—
—
—
—
—
—
—
50
50
12
±10
700
2.95
2.8
—
—
—
—
—
—
—
µSec
mV
A
%
kHz
Vin –0.5
–0.2
—
—
100 (3)
0
—
—
–10
1
—
100
Open (2)
0.8
—
—
—
1,000
V
48
—
—
106 Hrs
(4)
(1)
(1)
A
V
%Vo
%Vo
mV
mV
%Vo
%
%
V
µA
mA
µF
µF
Notes: (1) See SOA curves or consult factory for the appropriate derating.
(2) The Inhibit control (pin 1) has an internal pull-up, and if left open-circuit the module will operate when input power is applied. A small low-leakage
(<100 nA) MOSFET is recommended to control this input. See application notes for more information.
(3) The regulator requires a minimum of 100 µF input capacitor with a minimum 300 mArms ripple current rating. For further information, consult the
related application note on Capacitor Recommendations.
(4) An external output capacitor is not required for basic operation. Adding 100 µF of distributed capacitance at the load will improve the transient response.
For technical support and further information, visit http://power.ti.com
Typical Characteristics
PT5400 Series
6-A 5-V/3.3-V Input Adjustable
SWIFT™ Power Module
SLTS169C - MAY 2002 - REVISED OCTOBER 2003
Typical Characteristics (Except PT5408)
Performance Data; Vin =5 V (See Note A)
Performance Data; Vin =3.3 V (See Note A)
Efficiency vs Output Current
Efficiency vs Output Current
100
100
90
PT5401
PT5402
PT5403
PT5404
PT5405
PT5406
PT5407
80
70
60
Efficiency - %
Efficiency - %
90
50
80
PT5403
PT5404
PT5405
PT5406
PT5407
70
60
50
40
40
0
1
2
3
4
5
6
0
1
2
Iout (A)
Output Ripple vs Output Current
40
PT5403
PT5404
PT5405
PT5401
PT5406
PT5407
PT5402
30
20
Ripple - mV
Ripple - mV
5
50
40
10
PT5405
PT5403
PT5404
PT5406
PT5407
30
20
10
0
0
0
1
2
3
4
5
6
0
1
2
Iout (A)
3
4
5
Iout (A)
Power Dissipation vs Output Current
Power Dissipation vs Output Current
2.5
2.5
2.0
2.0
Pd - Watts
Pd - Watts
4
Output Ripple vs Output Current
50
1.5
1.0
1.5
1.0
0.5
0.5
0.0
0.0
0
1
2
3
4
5
0
6
1
2
3
4
5
Iout (A)
Iout (A)
Safe Operating Curve, Vin =5 V (See Note B)
Safe Operating Curve, Vin =3.3 V (See Note B)
90
90
80
80
Airflow
70
200LFM
120LFM
60LFM
Nat conv
60
50
40
30
Ambient Temperature (°C)
Ambient Temperature (°C)
3
Iout (A)
Airflow
70
200LFM
120LFM
60LFM
Nat conv
60
50
40
30
20
20
0
1
2
3
4
5
6
Iout (A)
0
1
2
3
4
5
Iout (A)
Note A: Characteristic data has been developed from actual products tested at 25 °C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.
For technical support and further information, visit http://power.ti.com
PT5408
6-A 5-V/3.3-V Input Adjustable
SWIFT™ Power Module
SLTS169C - MAY 2002 - REVISED OCTOBER 2003
Electrical Specifications (PT5408 only)
Unless otherwise stated, T a =25 °C, V in =3.3 V, C1 =100 µF, C2 =0 µF, and Io =I omax
Characteristics
Symbols
Conditions
Min
Output Current
Input Voltage Range
Set-Point Voltage Tolerance
Temperature Variation
Line Regulation
Load Regulation
Total Output Variation
Io
Vin
Vo tol
∆Regtemp
∆Regline
∆Regload
∆Regtot
Vin =3.3 V
Over Io range
0
3.1
—
—
—
—
Efficiency
Vo Ripple (pk-pk)
Transient Response
η
Vr
Current Limit Threshold
Output Voltage Adjust
Switching Frequency
Under-Voltage Lockout
ttr
∆Vtr
Ilim
Vo adj
ƒs
UVLO
Inhibit Control (pin1)
Input High Voltage
Input Low Voltage
Input Low Current
VIH
VIL
IIL
Standby Input Current
External Input Capacitance
External Output Capacitance
Reliability
Iin standby
C1
C2
MTBF
–40 °C <Ta < +85 °C
Over Vin range
Over Io range
Includes set-point, line, load,
–40 °C ≤ T a ≤ +85 °C
Io =4 A
20 MHz bandwidth
1 A/µs load step, 50 to 100 % I omax,
C2 =100 µF
Recovery time
V o over/undershoot
∆Vo = –50 mV
PT5408
Typ
Max
Units
—
±0.5
±5
±10
6 (1)
3.6
±2
—
—
—
%Vo
%Vo
mV
mV
—
—
—
±3
%Vo
—
—
92
15
—
mVpp
—
—
—
—
—
—
—
50
50
13
±10
700
2.95
2.8
—
—
—
—
—
—
—
µSec
mV
A
%
kHz
—
—
–10
1
—
100
Open (2)
0.8
—
—
—
1,000
V
Pin 1 to GND
pins 1 & 3 connected
Vin –0.5
–0.2
—
—
100 (3)
0
Per Bellcore TR-332
50 % stress, Ta =40 °C, ground benign
48
—
—
106 Hrs
Over Vin and Io ranges
Vin increasing
Vin decreasing
Referenced to GND (pin3)
(4)
V
µA
mA
µF
µF
Notes: (1) See SOA curves or consult factory for the appropriate derating.
(2) The Inhibit control (pin 1) has an internal pull-up, and if left open-circuit the module will operate when input power is applied. A small low-leakage
(<100 nA) MOSFET is recommended to control this input. See application notes for more information.
(3) The regulator requires a minimum of 100 µF input capacitor with a minimum 300 mArms ripple current rating. For further information, consult the
related application note on Capacitor Recommendations.
(4) An external output capacitor is not required for basic operation. Adding 100 µF of distributed capacitance at the load will improve the transient response.
For technical support and further information, visit http://power.ti.com
Typical Characteristics
PT5408
6-A 5-V/3.3-V Input Adjustable
SWIFT™ Power Module
SLTS169C - MAY 2002 - REVISED OCTOBER 2003
Typical Characteristics (PT5408 only)
100
Power Dissipation vs Output Current (See Note A)
Efficiency vs Output Current, Vin =3.3 V (See Note A)
2
1.6
Pd - Watts
Efficiency - %
90
80
70
60
1.2
0.8
0.4
50
0
0
1
2
3
4
5
6
0
1
2
3
Iout (A)
40
4
5
6
Iout (A)
Safe Operating Curve, V in =3.3 V (See Note B)
Output Ripple vs Output Current (See Note A)
90
Ambient Temperature (°C)
80
Ripple - mV
30
20
10
Airflow
70
200LFM
120LFM
60LFM
Nat conv
60
50
40
30
0
20
0
1
2
3
4
5
Iout (A)
6
0
1
2
3
4
5
6
Iout (A)
Note A: Characteristic data has been developed from actual products tested at 25 °C. This data is considered typical data for the ISR.
Note B: SOA curves represent operating conditions at which internal components are at or below manufacturer’s maximum rated operating temperatures.
For technical support and further information, visit http://power.ti.com
Application Notes
PT5400 Series
Operating Features of the PT5400 SWIFT™
Series of Power Modules
Under-Voltage Lockout (UVLO)
The PT5400 SWIFT series of power modules incorporate an under-voltage lockout (UVLO) function. The
UVLO function provides a clean transition during powerup and power-down, allowing the regulator to tolerate a
slowly rising input voltage. The UVLO prevents operation of the module until the input voltage has risen above
2.95 V. Below this threshold the status of the inhibit
control pin is overriden, and the module will not produce
an output. When the input voltage rises above this threshold, the output status of the module is determined by the
inhibit control pin. If the inhibit control is open-circuit
(not grounded), the module will automatically power up.
The UVLO circuit has approximately 0.16 V of hysteresis,
and will completely turn off the module when a falling
input voltage drops below about 2.8 V. (Note: Even though
the applied input voltage may be above the UVLO threshold,
operation to the published specifications requires that the input
voltage be at or above the minimum specified for each model in
the series. This ensures that the output voltage of the module is in
regulation.)
Soft-Start Power Up
Following either the application of a valid input source
voltage, or the removal of a ground signal to the inhibit
control pin (with input power applied), the module will
initiate a soft-start power up. The soft start has two
effects on the start-up characteristic. It introduces a short
time delay prior to the start-up of the output voltage,
and also slows the rate at which the output voltage rises.
Figure 1-1 shows the power-up characteristic of a PT5404
(1.8 V). In this example the delay time, td, is measured
from the point at which the input voltage rises above
2.95 V (the UVLO threshold), to the point that the output
voltage starts to rise. The time period t(SS) is the rise time
of the output voltage ramp. The value of td and t(SS)
are are approximately 10 ms and 7.5 ms respectively.
Figure 1-1; Soft-Start Characteristic and Timing
HORIZ SCALE: 5ms/Div
Vin (1V/Div)
Vin =2.95V
Vout (1V/Div)
td
If desired, both time periods can be lengthened with the
addition of a low value capacitor between the Inhibit
control (pin 1) and the COM (pin 3). For a given value
of external capacitance, Cinh, the formulas for calculating
the approximate effect on td and t(SS) are given below.
td
≈ (Cinh + 0.047 µF) × 1.2 V
5 µA
t(SS)
≈ (Cinh + 0.047 µF) × 0.7 V
5 µA
Note: The capacitor should be placed as close to the regulator as
possible. Adding 0.047 µF of external capacitance to the Inhibit
pin approximately doubles the value of td and t(SS).
Current Limit Protection
The output current limit feature is one of two fault
protection mechanisms built into the PT5400 modules.
Its purpose is to protect both the module and input source
against the occurance of a load fault, thereby isolating the
fault and preventing it from propagating to other parts
of the power system. The PT5400 regulators sense the
current switched by the series (high-side) power MOSFET.
The circuit implements a continuous current limit characteristic. Upon the removal of the fault the output voltage
will promptly recover, and the module will return to normal operation.
A current limit condition will also increase the module’s
power dissipation, which may cause the temperature of
the internal components to significantly rise. If the condition persists, the module may begin to cycle in and out
of thermal shutdown.
Thermal Shutdown
Thermal shutdown is the second fault protection mechanism and protects the module’s internal circuitry against
excessively high temperatures. A rise in the temperature
of the internal circuitry may be the result of a drop in
airflow, a high ambient temperature, or a sustained overcurrent load fault. If the junction temperature of the
internal components exceed 150 °C, the module will
shutdown. Once in thermal shutdown, the regulator is
disabled and the output voltage is reduced to zero. The
recovery is automatic and begins with a soft-start power
up. Recovery occurs when the the sensed temperature
decreases 10 °C below the trip point.
t (SS)
For technical support and further information, visit http://power.ti.com
Application Notes
PT5400 Series
Capacitor Recommendations for the PT5400
SWIFT™ Series of Power Modules
Input Capacitors
The recommended input capacitance is determined by
100 µF minimum capacitance, 300 mA (rms) minimum
ripple current rating, and less than 300 mΩ equivalent
series resistance (ESR). The ripple current rating, ESR,
and operating temperature are the major considerations
when selecting the input capacitor.
It is recommended that tantalum capacitors have a minimum voltage rating of at least twice the working voltage,
including the ac ripple. This is necessary to insure reliability with 3.3-V input voltage bus applications.
Output Capacitors (optional)
The ESR of the output bulk (non-ceramic) capacitance
must be between 10 mΩ ≤ESR ≤200 mΩ. Electrolytic
capacitors have poor ripple performance at frequencies greater than 400 kHz but excellent low frequency
transient response. Above the ripple frequency, ceramic
decoupling capacitors are recommended to improve the
transient response and reduce any high frequency noise
components apparent during higher current excursions. A
maximum of 100 µF ceramic capacitance may be added to
the output bus.
Tantalum/ Ceramic Capacitors
Tantalum capacitors are acceptable on the output bus.
Tantalum, Os-con®, or ceramic capacitor types are recommended for applications where ambient temperatures
fall below 0 °C. Ceramic capacitors may be used instead
of electrolytic types on both the input and output bus.
The input bus must have at least the minimum amount of
capacitance. For the output bus the total amount of
ceramic capacitance should be limited to 100 µF.
Capacitor Tables
Table 2-1 identifies vendors with acceptable ESR and
maximum allowable ripple current (rms) ratings. Capacitors recommended for the output are identified under
the Output Bus column with the required quantity.
This is not an extensive capacitor list. Capacitors from other
vendors are available with comparable specifications. Those
listed are for guidance. The RMS ripple current rating and
ESR (at 100 kHz) are critical parameters necessary to insure
both optimum regulator performance and long capacitor life.
Table 2-1; Recommended Input/Output Capacitors
Capacitor Vendor/
Component
Series
Capacitor Characteristics
Working
Voltage
Value (µF)
(ESR) Equivalent
Series Resistance
Max Ripple
at 85 °C
Current (Irms)
Quantity
Physical Size
(mm)
Input
Bus
Output
Bus
Vendor Number
Panasonic WA (SMT)
10V
120 µF
0.035 Ω
2800 mA
8.3×6.9
1
1
EEFWA1A121P
Panasonic FC
FK (SMT)
16 V
16 V
220 µF
330 µF
0.150 Ω
0.160 Ω
555 mA
600 mA
10×10.2
8×10.2
1
1
1
1
EEUFC1C221
EEVFK1C331P
United Chemi–Con
FS
PXA (SMT)
MVZ (SMT)
PS
10 V
10 V
16 V
10 V
100 µF
120 µF
220 µF
270 µF
0.040 Ω
0.027 Ω
0.170 Ω
0.014 Ω
2100 mA
2430 mA
450 mA
4420 mA
6.3×9.8
8×6.7
8×10
8×11.5
1
1
1
1
1
1
1
1
10FS100M
PXA10VC121MH80TP
MVZ25VC221MH10TP
10PS270MH11
Nichicon(F55)SMTWG (SMT)
PM
10V
35 V
25 V
100 µF
100µF
150 µF
0.055 Ω
0.150 Ω
0.160 Ω
2000 mA
670 mA
460 mA
7,3x4,3
10×10
10×11.5
1
1
1
1
1
1
F551A101MN
UWG1V101MNR1GS
UPM1E151MPH
Sanyo Os-con®
SVP (SMT)
SP
TPA
10 V
16 V
10 V
120 µF
100 µF
100 µF
0.040 Ω
0.025 Ω
0.080 Ω
>2500 mA
>2800 mA
>1200 mA
7×8
6.3×9.8
7.3×4.8
1
1
1
1
1
1
10SVP120M
16SPS100M
10TPA100M
AVX Tantalum TPS
10 V
10 V
100 µF
220 µF
0.100 Ω
0.100 Ω
>1090 mA
>1414 mA
7.3L
×4.3W ×4.1H
1
1
1
1
TPSD107M010R0100
TPSV227M010R0100
Kemet T520
T495
10 V
10 V
100 µF
100 µF
0.080 Ω
0.100 Ω
1200 mA
>1100 mA
7.3L ×5.7W
×4.0H
1
1
1
1
T520D107M010AS
T495X107M010AS
Sprague 594D/595D
10 V
10 V
150 µF
120 µF
0.090 Ω
0.140 Ω
1100 mA
>1000 mA
7.3L
×6.0W ×4.1H
1
1
1
1
594D157X0010C2T
595D127X0010D2T
TDK- Ceramic X5R
Murata Ceramic X5R
1210 Case
6.3 V
6.3 V
47 µF
47 µF
0.002 Ω
0.002 Ω
>1400 mA
>1000 mA
3.6L
×2.8W ×2.8H
2
2
2 (max)
2 (max)
For technical support and further information, visit http://power.ti.com
C3225X5R0J476KT/MT
GRM32ER60J476M/6.3
Application Notes
PT5400 Series
Using the Inhibit Control of the PT5400 SWIFT™
Series of Power Modules
For applications requiring output voltage On/Off control,
the PT5400 series of SWIFT power modules incorporate
an inhibit function. This function can be used wherever
there is a requirement for the module to be switched
off. The On/Off function is provided by the Inhibit
(pin 1) control.
The ISR functions normally with Pin 1 open-circuit,
providing a regulated output whenever a valid source
voltage is applied to Vin, (pin 2). When a low-level2
ground signal is applied to pin 1, the regulator output
will be disabled.
Figure 3-1 shows an application schematic, which details
the typical use of the Inhibit function. Note the discrete
transistor (Q1). The Inhibit control has its own internal
pull-up to +Vin potential. An open-collector or open-drain
device is required to control this input 1. The Inhibit pin
control thresholds are given in Table 3-1.
Figure 3-2
Table 3-1; Inhibit Control Requirements
Parameter
Min
Max
Vin – 0.5
–0.2V
Open
Turn-On Time: In the circuit of Figure 3-1, turning Q1
on applies a low-voltage to the Inhibit control (pin 1)
and disables the regulator output. Correspondingly,
turning Q 1 off allows the ISR to execute a soft-start
power up. The soft-start power up consists of a short
delay, t d, followed by a period, t(SS), in which the output
voltage rises from zero to its full regulation voltage.
(See the section on Soft-Start Power Up). The module
produces a fully regulated output voltage within 25msec.
Figure 3-2 shows the typical rise in both output voltage
and input current for a PT5404 (1.8V), following the
turn-off of Q1. The turn off of Q1 corresponds to the
drop in the Q1 Vgs waveform. The time periods, td and
t(SS), are indicated. The waveforms were measured with
a 5Vdc input voltage, and 0.7-Ω resistive load.
HORIZ SCALE: 5ms/Div
Enable (VIH)
Disable (VIL)
+0.5V
Vout (1V/Div)
Iin (0.5A/Div)
Figure 3-1
+V IN
2
C1
1 0 0µF
Inhibit
COM
Vin
PT5401
INH
1
Vo
4
+V O
GND
3
Q1 Vgs (10V/Div)
td
t (SS)
Q1
BSS138
COM
Notes:
1. Use an open-collector device (preferably a discrete
transistor) for the Inhibit input. A pull-up resistor is not
necessary. To disable the output voltage, the control pin
should be pulled low to less than +0.5VDC.
For technical support and further information, visit http://power.ti.com
Application Notes
PT5400 Series
Adjusting the Output Voltage of the PT5400
Series of 6-A SWIFT Power Modules
The output voltage of the PT5400 series of SWIFT power
modules may be adjusted higher or lower than the factory
trimmed pre-set voltage with the addition of a single
external resistor. Table 4-1 gives the allowable adjustment
range for each model of the series as Va (min) and Va (max).
Adjust Up: An increase in the output voltage is obtained by
adding a resistor R2, between pin 5 (Vo adj) and pin 3 (GND).
Add a resistor (R1), between pin 5 (Vo adj) and
Adjust Down:
pin 4 (Vout).
The values of (R1) [adjust down], and R2 [adjust up],
can either be calculated using the following formulas, or
may be looked up from the range of values in Table 4-2.
Refer to Figure 4-1 for the placement of the required
resistor; either (R1) or R2 as appropriate.
=
R2
=
Where:
Vo = Original output voltage
Va = Adjusted output voltage
Ro = The resistance value from Table 4-1
Figure 4-1
+ V IN
2
V in
PT5400
GND
Vo
V o(adj)
3
C2
100µF
(Req'd)
+ VO
4
(R1)
Adj Down
R2
Adjust Up
COM
0.891 Ro
Va – Vo
– 18.2
kΩ
– 18.2
kΩ
Notes:
1. Use a 1% (or better) tolerance resistor in either the (R1)
or R2 location. Place the resistor as close to the ISR as
possible.
2. Never connect capacitors from Vo adj to either GND or
Vout. Any capacitance added to the Vo adjust pin will affect
the stability of the ISR.
5
+
Ro (Va – 0.891)
Vo – Va
(R1)
COM
3. For each model, adjustments to the output voltage may
place additional limits on the minimum input voltage. The
revised minimum input voltage must comply with the
following requirement.
Vin(min) = (Va + 1.1) V or as specified in the data sheet,
whichever is greater.
4. The PT5408 operates only from a 3.3-V input bus.
The limited input to output voltage differential of this
model does not allow it to be adjusted higher than its
trimmed output voltage.
Table 4-1
ISR OUTPUT VOLTAGE ADJUSTMENT RANGE AND FORMULA PARAMETERS
Series Pt. No.
PT5401
PT5402
PT5408
PT5403
5V
3.3 V 4
PT5404
PT5405
PT5406
PT5407
3.3/5 V
3.3/5 V
3.3/5 V
5V
Vo (nom)
3.3 V
2.5 V
2.5 V
2V
1.8 V
1.5 V
1.2 V
1V
Va (min)
2.9 V
2.0 V
2.0 V
1.65 V
1.5 V
1.3 V
1.1 V
0.97 V
Va (max)
3.5 V
2.95 V
2.5 V 4
2.45 V
2.25 V
1.95 V
1.65 V
1.45 V
Ω)
Ro (kΩ
10.2
10.2
10.2
10.0
10.0
10.2
9.76
10.2
For technical support and further information, visit http://power.ti.com
3.3/5 V
3.3/5 V
Input Bus
Application Notes continued
PT5400 Series
Table 4-2
ISR ADJUSTMENT RESISTOR VALUES
Series Pt. No.
PT5401
PT5402/8
Vo (nom)
3.3 V
2.5 V
Va (req.d)
PT5403
2V
PT5404
1.8 V
PT5405
1.5 V
PT5406
1.2 V
0.97
PT5407
1V
(8.7) kΩ
1.0
1.05
164.0 kΩ
1.1
(2.2) kΩ
1.15
(32.4) kΩ
1.2
72.7 kΩ
42.4 kΩ
27.2 kΩ
1.25
156.0 kΩ
18.2 kΩ
1.3
(2.7) kΩ
68.8 kΩ
12.1 kΩ
1.35
(13.0) kΩ
39.8 kΩ
7.8 kΩ
1.4
(33.7) kΩ
25.3 kΩ
4.5 kΩ
1.45
(95.8) kΩ
16.6 kΩ
2.0 kΩ
1.5
(2.1) kΩ
10.8 kΩ
1.55
(8.2) kΩ
164.0 kΩ
6.7 kΩ
1.6
(17.3) kΩ
72.7 kΩ
3.5 kΩ
1.1 kΩ
1.65
(3.5) kΩ
(32.4) kΩ
42.4 kΩ
1.7
(8.8) kΩ
(62.7) kΩ
27.2 kΩ
1.75
(16.2) kΩ
(154.0) kΩ
1.8
(27.3) kΩ
1.85
(45.7) kΩ
160.0 kΩ
7.8 kΩ
1.9
(82.7) kΩ
70.9 kΩ
4.5 kΩ
1.95
(194.0) kΩ
41.2 kΩ
2.0 kΩ
2.0
(4.4) kΩ
18.2 kΩ
12.1 kΩ
26.4 kΩ
160.0 kΩ (3)
17.4 kΩ (3)
2.05
(8.1) kΩ
2.1
(12.6) kΩ
70.9 kΩ
11.5 kΩ
2.15
(18.5) kΩ
41.2 kΩ
7.3 kΩ
2.2
(26.3) kΩ
26.4 kΩ
4.1 kΩ
2.25
(37.2) kΩ
17.4 kΩ
1.6 kΩ
2.3
(53.7) kΩ
11.5 kΩ
2.35
(81.0) kΩ
7.3 kΩ
2.4
(136.0) kΩ
4.1 kΩ
2.45
(300.0) kΩ
1.6 kΩ
2.5
2.55
( Note 4) 164.0 kΩ
2.6
72.7 kΩ
2.65
42.4 kΩ
2.7
27.2 kΩ
2.75
18.2 kΩ
2.8
12.1 kΩ
2.85
7.8 kΩ
2.9
(33.0) kΩ
4.5 kΩ
2.95
(41.8) kΩ
2.0 kΩ
3.0
(53.5) kΩ
3.05
(69.9) kΩ
3.1
(94.5) kΩ
3.15
(135.0) kΩ
3.2
(217.0) kΩ
3.25
(463.0) kΩ
3.3
3.35
164.0 kΩ
3.4
72.7 kΩ
3.45
42.4 kΩ
3.48
32.3 kΩ
3.50
R1 = (Blue)
27.2 kΩ
R2 = Black
For technical support and further information, visit http://power.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
2-Feb-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
PT5403A
OBSOLETE SIP MODULE
EFL
5
TBD
Call TI
Call TI
-40 to 85
PT5403C
OBSOLETE SIP MODULE
EFM
5
TBD
Call TI
Call TI
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
2-Feb-2014
Addendum-Page 2
MECHANICAL DATA
MMSI001 – SEPTEMBER 2001
EFL (R–MSIP–T5)
METAL SINGLE-IN-LINE MODULE
Suffix A
1.11 (28,19)
MAX.
0.90 (22,86)
MAX.
0.95 (24,13)
MAX.
0.310 (7,87)
1
0.032 (0,81) TYP.
Note G
0.160 (4,06) TYP.
0.025 (0,63) TYP.
0.017 (0,43) TYP.
0.140 (3,55) MIN.
See Note F
0.100 (2,54) TYP.
0.040 (1,01) TYP.
ø0.065 (1,65) MIN. 4 Places
Plated through connected
to ground plane
0.960 (24,38)
0.860 (21,84)
0.050 (1,27)
0.140 (3,55)
0.090 (2,28)
0.780
(19,81) 0.860
(21,84)
0.100 (2,54)
ø0.045 (1,14) MIN.
Plated through
5 Places
Note H
1
0.040 (1,01)
Note E
4 Places
0.280 (7,11)
0.100 (2,54)
4 Places
0.080 (2,03)
0.230 (5,84)
PC LAYOUT
4203195/A 08/01
NOTES: A.
B.
C.
D.
E.
F.
All linear dimensions are in inches (mm).
This drawing is subject to change without notice.
2 place decimals are " 0.030 (" 0, 76 mm).
3 place decimals are " 0.010 (" 0, 25 mm).
Recommended mechanical keep-out area.
Electrical pin length mounted on circuit board
seating plane to pin end.
G. Electrically connect case to ground plane.
H. Case outline reference
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
MECHANICAL DATA
MMSI002 – SEPTEMBER 2001
EFM (R–MSIP–G5)
METAL SINGLE-IN-LINE MODULE
Suffix C
0.017 (0,43) TYP.
1.11 (28,19)
MAX.
Gage Plane
0.90 (22,86)
MAX.
0.95 (24,13)
MAX.
Seating Plane
0.006 (0,15)
0°–7°
0.080 (2,03)
0.310 (7,87)
1
0.032 (0,81)
TYP.
0.025 (0,63) TYP.
0.160 (4,06) TYP.
0.017 (0,43) TYP.
0.100 (2,54) TYP.
0.040 (1,01) TYP.
ø0.065 (1,65) MIN. 4 Places
Plated through connected
to ground plane
0.960 (24,38)
0.050 (1,27)
0.860 (21,84)
0.040 (1,01)
0.100 (2,54)
0.210
(5,33)
0.050 (1,27)
Note I
0.780
(19,81)
0.200 (5,08)
0.950
(24,13)
Note F
1
0.140
(3,55)
0.090
(2,28)
0.070
(1,77)
0.050 (1,27)
0.040 (1,01)
0.165 (4,19)
0.280 (7,11)
Note E
Note G
Note H
0.100
(2,54)
0.080 (2,03)
0.230 (5,84)
0.100 (2,54)
4 Places
0.050 (1,27)
5 Places
PC LAYOUT
NOTES: A.
B.
C.
D.
E.
F.
All linear dimensions are in inches (mm).
This drawing is subject to change without notice.
2 place decimals are " 0.030 (" 0, 76 mm).
3 place decimals are " 0.010 (" 0, 25 mm).
Recommended mechanical keep-out area.
Power pin connections should utilize two or more
vias per input, ground and output pin.
POST OFFICE BOX 655303
4203196/A 08/01
G. Vias are recommended to improve copper adhesion.
H. Solder mask openings to copper island for solder
joints to mechanical pins. Electrically connect
case to ground plane.
I. Case outline reference.
• DALLAS, TEXAS 75265
1
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