11.5-12.5Gb/s 1:16 Demultiplexer with Clock Recovery Physical Layer Products VSC8184 Product Brief Features: • Continuous 11.5 to 12.5Gb/s Lock-Range • Low Power 1.6W (Typ) • +3.3V Single Supply • Single-End and Differential Data Input • 50 mV Input Sensitivity (Min) • Slicing Threshold Voltage Offset Control • LVDS Outputs • 180-195 or 719-781 MHz Reference Clock • Reliable 90-Ball BGA Package General Description • Up to 90°C Case Temperature The VCS8184 combines a clock recovery unit and data retiming with a 1:16 Demultiplexer on a single chip to directly generate 16-bit wide data from an incoming 11.5Gb/s to 12.5Gb/s data stream, for use in SONET STS-192/ SDH STM-64 systems. An on-chip Phase Locked Loop (PLL) with Voltage Controlled Oscillator (VCO) generates a 11.5GHz to 12.5GHz clock, which remains phase locked to the incoming data. The incoming data is retimed and Demultiplexer into 16 parallel outputs. It features a highly flexible reference clock input scheme. The • On Chip Termination for all LVDS Inputs Specifications: • 11.5 to 12.5 Gb/s Continuous Lock-Range Operation • 50 mV Input Sensitivity • Supply Voltage: 3.3V (Typ) • Total Power Dissipation: 1.6W (Typ) • 15x15mm Low Profile 90 Ball TBGA (Taped BGA) Package • Operating Temperature Range: 0°C to +90°C (case) www.vitesse.com Physical Layer Products user can select between 180-195MHz or 719-781MHz PECL reference clock inputs. The input serial data sampling point voltage threshold can be adjusted. Additional features include a parity bit (PARITY±) that is clocked out with the 16 parallel data, Bit Order Swap (BITORDER) and Data Polarity Invert (DINVERT). To assist in monitoring device operation a Loss-of-Lock (LOLN) alarm and no reference clock (NOREFN) alarm are provided. The device is packaged in a modified 90ball, Ball Grid Array (BGA). 11.5-12.5Gb/s 1:16 Demultiplexer with Clock Recovery VSC8184 Product Brief Benefits: Physical Layer Products VSC8184 Block Diagram • Provides High-speed Integrated Clock and Data Recovery from 11.5 to 12.5Gb/s PARITY+ PARITY- • Provides Lowest Power Solution in its Performance Class • Pin-compatible Path to 9.910.7Gb/s Product (VSC8174) • Thermal Expansion of TBGA Package is Matched to the PC Board for High Reliability • Data Polarity Invert and Bit Order Swap for Ease of Layout D0+ DINVERT D0- OFF+ D1+ D1- VTERM 1:16 DATA+ DATA- D14+ OFF- D14- D15+ • Loss-of-Lock and No Reference Clock to Assist in Monitoring Device Operation D15- CK16A+ CLOCK TIMING RECOVERY GENERATOR CK16A- • Parity Bit Calculation • Integrated Clock and Data Recovery CK16B+ CK16BREFTERM REFCK+ PLL LOSS OF LOCK DETECT BITORDER REFCK- Applications: • Advanced Forward Error Correction (FEC) • Return-to-Zero Transmission Applications LOLN REFSEL[0:1] NOREFN LCKREFN INHIBITN RESETN • Re-Timing Laser Drivers • Ultra-Long Haul Systems • SONET/SDH Networking • DWDM Systems • Telecommunications Transmission Systems • Test Equipment For more information on Vitesse Products visit the Vitesse web site at www.vitesse.com or contact Vitesse Sales at (800) VITESSE or [email protected] www.vitesse.com © Copyright 2000 Vitesse Semiconductor Corporation and the Vitesse logo are all registered trademarks of Vitesse Semiconductor Corp;oration