AMI PI6050D

REVISION NUMBER : REV A
PAGES :Page 1 of 15
DATE : 1-31-05
PI6050D Contact Image Sensor
Data Sheet
PI6050D Data Sheet
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Key Features
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600 or 1200 dots per inch (dpi) selectable resolutions
344 or 688 image sensor elements (pixels)
21.15µm (1200dpi) pixel center-to-center spacing (47.24 dots/mm)
On-chip amplifier
Single 5.0V power supply
3.3V input clocks
3.0 MHz maximum pixel rate
Parallel / integrate and transfer
Power down circuit
High sensitivity
Low power
Low noise
General Description
Peripheral Imaging Corporation’s PI6050D Contact Image sensor is a selectable 600 or 1200 dot per inch (dpi)
resolution linear image sensor, which employs PIC’s proprietary CMOS Image Sensing Technology. The sensor
contains an on-chip output amplifier, power down circuitry and parallel transfer features that are uniquely
combined with the present-day active-pixel-sensor technology. The image sensors are designed to be cascaded
end-to-end on a printed circuit board (PCB) and packaged in an image sensing module. Applications for the
sensor array includes facsimiles, PC scanners, check readers, and office automation equipment.
Figure 1 is a block diagram of the sensor. Each sensor consists of 688 active pixels, their associated
multiplexing switches, buffers, and an output amplifier circuit with a power down feature. The sensors pixel-pixel
spacing is approximately 21.15 µm. The size of each sensor without the scribe lines is 14560 µm by 425 µm.
14560µm
21.15µm
1
2
1
2
3
3
4
4
Row of 688 Pixels (1200dpi)
or Selectable
Row of 344 Pixels (600dpi)
and Video Line Multiplexer
342
343
344
686
687
688
425µm
Parallel Transfer, Storage Cells and Readout Registers
Amplifier, PowerDown and Offset
Control
SI
GBST
CLK
SIC
SC
VDD
VOUT
VSS
Figure 1. Sensor Block Diagram
Page 2 of 15, PI6050D_rev A, Revised 1-31-05
VREF
SO
PI6050D Data Sheet
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PI6050D Unique Features
There are six unique features incorporated into the PI6050D which improve the sensor’s performance.
1. Pixel-to-Pixel Offset Cancellation Circuit
The sensor employs a pixel-to-pixel offset cancellation circuit, which reduces the Fix Pattern Noise (FPN), and
amplifier offsets. In addition, this innovative circuit design greatly improves the optical linearity and low noise
sensitivity.
2. Parallel Integrate, Transfer and Hold
The sensor has a parallel integrate, transfer and hold feature, which allows the sensor to be read out while
photon integration is taking place. These features are approached through the use of an integrate-and-hold cell,
located at each pixel site. Each pixel’s charge is read from its storage site as the sensor’s shift register
sequentially transfers each pixel’s charge onto a common video line.
3. Dual Scan Initiation Inputs, GBST and SI
Each sensor has two scan initiation inputs, the Global Start Pulse (GBST) and the Start Pulse (SI), which are
compatible with standard 3.3V CMOS clocks. These clocks help to reduce the sensor-to-sensor transition Fix
Pattern Noise by initializing and preprocessing all sensors simultaneously before they start their readout scan.
The internal shift register starts the scan after GBST is clocked in on the falling edge of the Clock input (CLK).
The Start Input Control (SIC) selects the first sensor in a sequence of cascaded sensors to operate with 55 clock
cycles of delay by connecting it to Vdd and to Ground for all subsequent sensors. Then, only the first sensor
clocks out 110 inactive pixels (55 clocks cycles) before accessing its first active pixel. During these 55 clock
cycles, the first sensor and all of the subsequent cascaded sensors cycle through their pre-scan initialization
process. After initialization, only the first sensor starts its read cycle with its first-active pixel appearing on the 56th
clock cycle. The second and subsequent sensors await the entry of their Start Pulse (SI). Furthermore, the first
sensor’s Start Pulse (SI) is left unconnected, while the subsequent sensors all have their Start Pulse’s (SI)
connected to the SO of their respective preceding sensor. The external scan Start Pulse (SI) is connected to all
of the sensors' Global Start Pulse (GBST) inputs.
For example in the 1200 dpi mode, when the first sensor completes its scan, its End-Of-Scan (SO) appears on
the falling edge of 389th clock cycle after the entry of GBST and 20 pixels before its last pixel, in order to have a
continuous pixel readout between sensors in a module. This SO enters as the SI clock of the second and
subsequent sensors; hence all subsequent sensors will start their register scan after each of the preceding
sensors completes its scan.
4. Power Saving
Each sensor incorporates a power-saving feature such that each chips amplifier is only turned on when its pixels
are ready to be read out.
5. Common Reference Voltage between Cascaded Sensors
Each sensor has an input/output bias control (VREF), which serves as an offset voltage reference. Each bias
control pad is connected to an internal bias source and tied to its own amplifier’s reference bias input. In
operation, these pads on every sensor are connected together. Each sensor then “shares” the same bias level to
maintain a constant bias among all of the sensors.
6. Selectable Resolutions of 600 dpi or 1200 dpi
The Switch Control input (SC) is connected to Ground or to Vdd to set the sensor to operate in the 600 dpi or
1200 dpi mode, respectively. In the 1200 dpi mode, all 688 pixels are clocked out, whereas in the 600 dpi mode,
pixels 1 and 2 are combined, 3 and 4 are combined and so on up to pixels 687 and 688 being combined. One
half of the pixel amplifiers and one half of the scanning register are then disabled. As a result, sensitivity in the
600 dpi mode will be twice that of the 1200 dpi mode. The 600 dpi readout time will be approximately half of the
1200 dpi readout time. Unlike a CCD array, both the 600 dpi and 1200 dpi arrays can operate with the same
clock frequency.
Page 3 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Functional Description
¾ Input / Output Terminals
The PI6050D image sensor has 10 input and output (I/O) pads. Their symbols and function descriptions are
listed in Table 1.
Signal
I/O
SI
I
GBST
I
CLK
I
SIC
I
SC
I
VDD
I
VOUT
O
VSS
I
VREF
I/O
SO
O
Description
Start Pulse:
Input to start a line scan. (See discussion of the sensors unique features for further
details).
Global Start Pulse:
Globally initializes the start inputs of all sensors and starts the scanning process of the
first sensor. (See discussion of the sensors unique features for further details).
Clock:
Clock input for the shift register.
Start Input Control:
Input to control the Start Pulse to the first sensor. (See discussion of the sensors
unique features for further details).
Switch Control:
Selects the 600 or 1200 dpi mode. (See discussion of the sensors unique features for
further details).
Power Supply
Video Output Voltage:
Output video signal from the amplifier.
Ground
Reference Voltage:
Reference input voltage for the amplifier output. Sets the output’s reset (dark) level.
End of Scan Pulse:
Output from the shift register at the end of a scan.
Table 1. Input and Output Terminals
Page 4 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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¾ Bonding Pad Layout Diagram
Figure 2 shows the bonding pad locations for the PI6050D sensor.
14560µm
425µm
SI
Y
GBST
CLK
SIC
SC
VDD
X
Pad Location Table
Location
SI
Start Pulse
GBST
CLK
SIC
SC
Global Start Pulse
Clock
VDD
VOUT
VSS
VREF
SO
Start Input Control
Switch Control
Power Supply
Video Output Voltage
Ground
Reference Voltage
End of Scan Pulse
VSS
Y
X
30
30
30
30
30
1000
3442
4199
4590
4945
34
30
34
30
30
5414
5820
10549
10909
13259
eg.
SI
Y
X
4. Each pad is 120 x 80um
5. All dimensions are in um
6. Die size does not include the scribe line
¾ Wafer Scribe Line
Figure 3 outlines the scribe line dimensions surrounding the sensor die on a wafer.
15µm
425µm
55µm
GBST
X
Figure 2. PI6050D Bonding Pad Layout
60µm
VR
SO
Notes:
1. The drawing is not to scale.
2. The die length and width are given
in the above sensor die figure
3. Pad locations are listed in the Pad Location Table
X
Pad
VOUT
14560µm
60µm
Figure 3. Wafer Scribe Line
Page 5 of 15, PI6050D_rev A, Revised 1-31-05
55µm
PI6050D Data Sheet
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Electro-Optical Specifications
Table 2 lists the electro-optical specifications of the PI6050D sensor at 25oC and Vdd = 5.0 volts.
Parameter
Symbol
Number of Pixels (1)
Pixel-to-Pixel Spacing (1)
Sensitivity @ 600 dpi (2)
Sensitivity @ 1200 dpi
Saturation Voltage (3)
Photo-Response Non-Uniformity (4)
Adjacent Photo-Response Non-Uniformity (5)
Dark Output Voltage Level (6)
Dark Output Non-Uniformity (7)
Random Thermal Noise (rms) (8)
Sensor-to-Sensor Photo-Response NonUniformity (9)
Photo Response Linearity (10)
Analog Output Drive Current
Min
Typ
344 or 688
42.3 / 21.15
Sv
VSat
Up
Upn
Vd
Ud
Vno
Max
Units
344 or 688
42.3 / 21.15
µm
1220
610
1.65
15
15
1.7
100
3.0
Usensor
PRL
Iout
V / uJ / cm2
>1.0
Volts
%
%
V
mV
mV
10
%
2
%
mA
Table 2. Electro-Optical Specifications
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Notes for the above Table 2 are listed on the next page under “Definitions of Electro-Optical Specifications”.
Page 6 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Definitions of Electro-Optical Specifications
All electrical specifications are measured at a pixel rate of 2.5 MHz, a temperature of 25oC, Vdd=5.0 volts,
Vref=1.7V and at an integration time of 2.2ms for 600 dpi and 4.4ms for 1200 dpi. The average output voltage
(Vpavg) is adjusted to approximately 1.0V, unless stated otherwise. The modules’ internal Green LED (525 ± 20
nm) was used as the light source for measurements requiring illumination. As a guideline, the recommended
load on the output should be 1KΩ<RL<10kΩ. All measurements were taken with a 2k ohm load on the output.
1. The Switch Control input (SC) is connected to Ground or to Vdd to set the sensor to operate in the 600 dpi or
1200 dpi mode, respectively. In the 1200 dpi mode, all 688 pixels are clocked out, whereas in the 600 dpi
mode, pixels 1 and 2 are combined, 3 and 4 are combined and so on up to pixels 687 and 688 being
combined. One half of the pixel amplifiers and one half of the scanning register are then disabled. As a result,
sensitivity in the 600 dpi mode will be twice that of the 1200 dpi mode. The 600 dpi readout time will be
approximately half of the 1200 dpi readout time.
2. Sensitivity (Sv) is defined as the slope of the Vpavg vs Exposure curve.
3. Saturation Voltage (VSat) is defined as the maximum video output voltage swing measured from the dark
level to the saturation level. It is measured by using the module LED light source with the module imaging a
uniform white target. The LED light level is increased until the output voltage no longer increases with an
increase in the LED brightness. The dark level is set by the voltage on VREF and is recommended to be set
externally to a voltage of 1.7V for optimal module operation.
4. Photo-Response Non-Uniformity (Up+, Up-, Up_total).
Up+ = ((Vpmax-Vpavg)/Vpavg) x 100%, Up- = ((Vpavg-Vpmin)/Vpavg) x 100%, and Up_total is the absolute
value of (Up+) + (Up-), where Vpmax is the maximum pixel output voltage in the light, Vpmin is the minimum
pixel output voltage in the light and Vpavg is average output voltage of all pixels in the light.
5. Total Photo-Response Non-Uniformity (Up_total)
6. Adjacent Photo-Response Non-Uniformity (Upn).
Upn = ABS( Max ((Vpn – Vpn+1) / Min (Vpn, Vpn+1))) x 100%, where Vpn is the pixel output voltage of pixel
n in the light.
7. Dark Output Voltage (Vd).
Vd is the average dark output level and is essentially the offset level of the video output in the dark. The dark
level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V for optimal
module operation.
8. Dark Output Non-Uniformity (Ud).
Ud = Vdmax-Vdmin, where Vdmax is the maximum pixel output voltage in the dark and Vdmin is the
minimum pixel output voltage in the dark.
9. Random Thermal Noise (rms), (Vno) is the standard deviation of n pixels in the dark. A sample size n = 64
was used. A 3 mV rms value has a peak-peak equivalent of 18 mV.
10. Sensor-to-Sensor Photo-Response Non-Uniformity (Usensor).
Usensor = (Vpavg – Wavg) / Wavg), where Wavg is the average output of all sensors on the same wafer
that pass all other specifications.
11. Photo-Response Linearity (PRL).
Photo-Response Linearity is defined as the max deviation of response compared to a best fit line. The data
points plotted are those that lie within 10% of the saturation level and 90% of the saturation level. Outside
these ranges the module is approaching non-linearity.
Page 7 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Recommended Operating Conditions
Table 3 lists the recommended operating conditions @ 25oC.
Parameter
Power Supply
Clock Input Voltage high level (1)
Clock Input Voltage low level (1)
Power Supply Current
Reference Voltage (2)
Clock Frequency (3)
Pixel Rate (4)
Integration Time (Line Scan Rate) (5)
First Die
Subsequent Die
Clock Pulse Duty Cycle (6)
Symbol
Vdd
IDD (sensor selected)
IDD (sensor not selected)
VREF
Tint
Min
4.5
3.1
0
1.3
0.25
0.5
Typ
5.0
3.3
0
8
4
1.7
1.25
2.5
Max
5.5
3.5
0.8
10
5
1.7
1.5
3.0
Units
V
V
V
mA
mA
V
MHz
MHz
µs
µs / die
248
230
50
%
Table 3. Recommended Operating Conditions @ 25oC
Notes:
1. Applies to all clocks; GBST, SI and CLK. The CLK line having a capacitance of approximately 20 pF.
2. The dark level is set by the voltage on VREF and is recommended to be set externally to a voltage of 1.7V
for optimal module operation.
3. Although the device will operate with a pixel rate of less than 500 KHz, it is recommended that the device be
operated above 500 KHz to maintain performance characteristics. Operating below 500 KHz may result in
leakage current degradation.
4. 2 pixels are clocked out for every clock cycle.
5. Tint is the integration time of a single sensor and is the time between two Start Pulses. The minimum
integration time is the time it takes to clock out 55 inactive pixels and 688 active pixels for the 1200 dpi mode,
or 55 inactive pixels and 344 active pixels for the 600 dpi mode, at a given frequency.
However, if several sensors are cascaded together in a module then the minimum integration time for the
1200 dpi mode is the time it takes to clock out 55 inactive pixels and 688 active pixels from the first sensor
and 688 pixels from each of all subsequent sensors, at a given frequency.
Similarly, for cascaded sensors in the 600 dpi mode, the minimum integration time is the time it takes to
clock out 55 inactive pixels and 344 active pixels from the first sensor and 344 pixels from each of all
subsequent sensors, at a given frequency.
6. The clock duty cycle is defined as the ratio of the positive duration of the clock to its period.
Page 8 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Absolute Maximum Ratings
Table 4 lists the absolute maximum ratings.
Parameter
Power Supply Voltage (Vdd)
Clock Input Voltage high level (1)
Clock Input Voltage low level (1)
Operating Temperature
Operating Humidity
Storage Temperature
Storage Humidity
Max
8
Vdd + 0.5
-0.5
-10 to +50
+10 to +85
-25 to +75
+10 to +90
Table 4. Absolute Maximum Ratings
Note
1. Applies to all clocks; GBST, SI and CLK.
Page 9 of 15, PI6050D_rev A, Revised 1-31-05
Units
V
V
V
°C
RH%
°C
RH%
PI6050D Data Sheet
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2. Timing Requirements
Table 5 lists the timing requirements for the 600 and 1200 dpi modes, and their associated timing diagrams are
shown in figures 4-9.
Parameter
Clock (CLK) Period
Clock (CLK) Pulse Width
Clock (CLK) Duty Cycle
Data Setup Time (1)
Data Hold Time (1)
Clock (CLK) Rise Time (2)
Clock (CLK) Fall Time (2)
End of Scan (SO) Rise Time (2)
End of Scan (SO) Fall Time
(2)
Global Start (GBST) Rise Time
(3)
Global Start (GBST) Fall Time (3)
Pixel Rise Time
Pixel Fall Time
(4,5)
(4,5)
Symbol
CLKp
CLKpw
Min
666
Tset
Thold
CLKrt
CLKft
20
25
70
70
Typ
800
400
50
Max
4000
Units
ns
ns
%
ns
ns
ns
ns
SOrt
50
ns
SOft
50
ns
GBSTrt
70
ns
GBSTft
70
ns
Prt
100
ns
Pft
30
ns
Table 5. Timing Requirements
Notes:
1. The shift register will load on all falling CLK edges, so setup and hold times (Tset, Thold) are needed to
prevent the loading of multiple start pulses. This would occur if the GBST remains high during two fallings
edges of the CLK signal. See Figure 7 Timing Diagram.
2. SI starts the register scanning and the first active pixel is read out on the 56th clock of the CLK signal.
However, when multiple sensors are sequentially scanned, as in CIS modules, the SO from the predecessor
sensor becomes the SI to the subsequent sensor, hence the SI clock = the SO clock.
3. As discussed under the third unique feature, the GBST starts the initialization process and preprocesses all
sensors simultaneously in the first 55 clock cycles (110 pixels) before the first pixel is scanned onto the video
line from the first sensor.
4. The transition between pixels does not always reach the dark offset level as shown in the timing diagrams,
see Vout. The timing diagrams show the transition doing so for illustration purposes; however a stable pixel
sampling point does exist for every pixel.
5. The pixel rise time is defined as the time from when the CLK’s rising edge has reached 50% of its maximum
amplitude to the point when a pixel has reached 90% of its maximum amplitude. The pixel fall time is defined
as the time from when a pixel’s charge begins to decrease from its maximum amplitude to within 10% of the
lowest point before the next pixel begins to rise.
Page 10 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Figures 4 and 5 show the initialization of the first sensor in relation to its subsequent cascaded sensors. The
Start Input Control (SIC) selects the first sensor to operate with 55 clock cycles of delay by connecting it to Vdd
on the first sensor and to Ground for all of the subsequent sensors. Hence the first sensor will operate with 110
inactive pixels being clocked out before its first active pixel is clocked out.
GBST
CLK
1
2
3
52
53
54
55
56
57
58
59
217
218
219
224
223
225
226
227
326
325
324
344
343
342
341
6
339
5
340
4
337
3
338
2
335
1
336
VOUT
323
SO
344 Active Pixels (172 Clocks)
110 Inactive Pixels (55 Clocks)
Figure 4. Overall Timing Diagram for the 600 dpi mode
GBST
CLK
1
2
3
52
53
54
55
56
57
58
59
389
390
391
395
396
397
398
399
670
669
668
688
Page 11 of 15, PI6050D_rev A, Revised 1-31-05
687
Figure 5. Overall Timing Diagram for the 1200 dpi mode
686
688 Active Pixels (344 Clocks)
685
6
683
5
684
4
681
3
682
110 Inactive Pixels (55 Clocks)
2
679
1
680
VOUT
667
SO
PI6050D Data Sheet
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Figures 6 and 7 detail the timing of the CLK, GBST, Vout and SI/SO signals in further detail, which have the
same timing requirements for both the 600 and 1200 dpi modes. The rise and fall times are listed in table 5
above. In Figure 7, note that pixel 111 is the first active pixel.
CLKpw
CLKpw
CLKp
50%
CLK
Thold
CLKrt
CLKft
Tset
GBST
GBSTft
GBSTrt
Prt
90%
VOUT
Pft
10%
SI/SO
SI/SOrt
SI/SOft
Figure 6. Rise and Fall Times for both the 600/1200 dpi modes
1
CLK
2
Thold
Tset
55
56
57
58
Thold
GBST
Tset
Video Signal (Vout)
1
2
3
108 109 110 111 112 113 114 115
Figure 7. Timing of GBST-to-First Pixel of the First Sensor for both the 600/1200 dpi Modes.
Page 12 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Data Sheet
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Figures 8 and 9 show the timing of the End of Scan Pulse (SI/SO), which comes out in line with the 324th pixel
for the 600 dpi mode and with the 668th pixel for the 1200 dpi mode. The SO from the first sensor enters as the
SI clock of the second and subsequent sensors; hence all subsequent sensors will start their register scan after
each of the preceding sensors completes its scan.
The last active pixel of each sensor is the 344th pixel for the 600 dpi mode and 688th pixel for the 1200 dpi mode.
1st CLK of second sensor
CLK
216
217
218
219
220
226
227
2
1
CLK numbers include timing for 55 inactive pixels and 344 active pixels
SI / SO
Vout
323 324 325 326 327 328 329 330
341 342 343 344 1
Last active pixel = pixel 344
2
3
Pixel 1 of second sensor
SI/SO Timing for 600 dpi of first/second sensors
Figure 8. Timing of SI/SO Clock for the 600 dpi Mode.
1st CLK of second sensor
CLK
388
389
390
391
392
398
399
2
1
CLK numbers include timing for 55 inactive pixels and 688 active pixels
SI / SO
Vout
667 668 669 670 671 672 673 674
685 686 687 688 1
Last active pixel = pixel 688
SI/SO Timing for 1200 dpi of first/second sensors
Figure 9. Timing of SI/SO Clock for the 1200 dpi Mode.
Page 13 of 15, PI6050D_rev A, Revised 1-31-05
2
3
Pixel 1 of second sensor
PI6050D Preliminary Data Sheet
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Example of a CIS Module using cascaded PI6050D Image Sensors
Figure 10 shows a typical schematic of a CIS module with 15 PI6050D image sensors serially cascaded together.
Figure 10. CIS Module with PI6050D Image Sensors
Page 14 of 15, PI6050D_rev A, Revised 1-31-05
PI6050D Preliminary Data Sheet
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©2004 Peripheral Imaging Corporation. Printed in USA. All rights reserved. Specifications are subject to change without
notice. Contents may not be reproduced in whole or in part without the express prior written permission of Peripheral
Imaging Corporation. Information furnished herein is believed to be accurate and reliable. However, no responsibility is
assumed by Peripheral Imaging Corporation for its use nor for any infringement of patents or other rights granted by
implication or otherwise under any patent or patent rights of Peripheral Imaging Corporation
Page 15 of 15, PI6050D_rev A, Revised 1-31-05