TI INA106U

INA106
INA
INA
10 6
106
SBOS152A – AUGUST 1987 – REVISED OCTOBER 2003
Precision Gain = 10
DIFFERENTIAL AMPLIFIER
FEATURES
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APPLICATIONS
ACCURATE GAIN: ±0.025% max
HIGH COMMON-MODE REJECTION: 86dB min
NONLINEARITY: 0.001% max
EASY TO USE
PLASTIC 8-PIN DIP, SO-8 SOIC
PACKAGES
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G = 10 DIFFERENTIAL AMPLIFIER
G = +10 AMPLIFIER
G = –10 AMPLIFIER
G = +11 AMPLIFIER
INSTRUMENTATION AMPLIFIER
DESCRIPTION
The INA106 is a monolithic Gain = 10 differential amplifier
consisting of a precision op amp and on-chip metal film
resistors. The resistors are laser trimmed for accurate gain
and high common-mode rejection. Excellent TCR tracking
of the resistors maintains gain accuracy and common-mode
rejection over temperature.
The differential amplifier is the foundation of many commonly used circuits. The INA106 provides this precision
circuit function without using an expensive resistor network.
The INA106 is available in 8-pin plastic DIP and SO-8
surface-mount packages.
–In
2
R1
10kΩ
R2
100kΩ
5
7
6
4
+In
3
R3
10kΩ
R4
100kΩ
1
Sense
V+
Output
V–
Reference
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 1987-2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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SPECIFICATIONS
ELECTRICAL
At +25°C, VS = ±15V, unless otherwise specified.
INA106KP, U
PARAMETER
CONDITIONS
MIN
GAIN
Initial(1)
Error
vs Temperature
Nonlinearity(2)
OUTPUT
Related Voltage
Rated Current
Impedance
Current Limit
Capacitive Load
INPUT
Impedance
Voltage Range
Common-Mode Rejection(3)
OFFSET VOLTAGE
Initial
vs Temperature
vs Supply
vs Time
NOISE VOLTAGE
fB = 0.01Hz to 10Hz
fO = 10kHz
DYNAMIC RESPONSE
Small Signal
Full Power BW
Slew Rate
Settling Time: 0.1%
0.01%
0.01%
POWER SUPPLY
Rated
Voltage Range
Quiescent Current
TYP
10
0.01
–4
0.0002
IO = +20mA, –5mA
VO = 10V
10
+20, –5
MAX
0.025
0.001
12
Differential
Common-Mode
Differential
Common-Mode
TA = TMIN to TMAX
10
110
±1
±11
86
V/V
%
ppm/°C
%
V
mA
Ω
mA
pF
0.01
+40/–10
1000
To Common
Stable Operation
UNITS
kΩ
kΩ
V
V
dB
100
RTI(4)
50
0.2
1
10
±VS = 6V to 18V
200
10
µV
µV/°C
µV/V
µV/mo
RTI(5)
–3dB
VO = 20Vp-p
30
2
VO = 10V Step
VO = 10V Step
VCM = 10V Step, VDIFF = 0V
Derated Performance
VO = 0V
TEMPERATURE RANGE
Specification
Operation
Storage
±5
0
–40
–65
1
30
µVp-p
nV/√Hz
5
50
3
5
10
5
MHz
kHz
V/µs
µs
µs
µs
±15
±1.5
±18
±2
V
V
mA
+70
+85
+150
°C
°C
°C
NOTES: (1) Connected as difference amplifier (see Figure 1). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peakto-peak output. (3) With zero source impedance (see “Maintaining CMR” section). (4) Includes effects of amplifiers’s input bias and offset currents. (5) Includes effect
of amplifier’s input current noise and thermal noise contribution of resistor network.
2
INA106
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SBOS152A
PIN CONFIGURATION
Top View
ELECTROSTATIC
DISCHARGE SENSITIVITY
DIP/SOIC
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
• (1)
Ref
1
–In
2
+In
3
V–
4
10kΩ
8
NC
7
V+
6
Output
5
Sense
100kΩ
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
10kΩ
100kΩ
INA106
NOTE: (1) Pin 1 indentifier for SO-8 package.
Model number identification may be abbreviated
on SO-8 package due to limited available space.
PACKAGE/ORDERING INFORMATION
For the most current package and ordering information, see
the Package Option Addendum located at the end of this
data sheet.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage ...................................................................... ±18V
Input Voltage Range ............................................................................ ±VS
Operating Temperature Range: P, U ................................ –40°C to +85°C
Storage Temperature Range ............................................ –40°C to +85°C
Lead Temperature (soldering, 10s): P .......................................... +300°C
Wave Soldering (3s, max) U .......................................................... +260°C
Output Short Circuit to Common .............................................. Continuous
NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
INA106
SBOS152A
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3
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
SMALL SIGNAL RESPONSE
(No Load)
STEP RESPONSE
Output Voltage (mV)
50
0
–50
2µs/div
2µs/div
TOTAL HARMONIC DISTORTION AND NOISE
vs FREQUENCY
SMALL SIGNAL RESPONSE
(RLOAD = ∞, CLOAD = 100pF)
1
A = 20dB, 3Vrms, 10kΩ load
THD + N (%)
Output Voltage (mV)
50
0
0.1
Inverting
Noninverting
0.01
–50
30kHz low-pass filtered
0.001
1k
2µs/div
10k
100k
Frequency (Hz)
MAXIMUM VOUT vs IOUT
(Negative Swing)
MAXIMUM VOUT vs IOUT
(Positive Swing)
–17.5
17.5
VS = ±18V
–15
15
VS = ±15V
–10
VS = ±12V
12.5
VOUT (V)
VOUT (V)
VS = ±18V
–12.5
–7.5
–5
VS = ±12V
7.5
5
VS = ±5V
–2.5
2.5
0
VS = ±5V
0
0
–2
–4
–6
–8
–10
–12
0
–IOUT (mA)
4
VS = ±15V
10
6
12
18
24
30
36
IOUT (mA)
INA106
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SBOS152A
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
POWER SUPPLY REJECTION
vs FREQUENCY
110
140
100
120
PSRR (dB)
CMR (dB)
CMR vs FREQUENCY
90
80
70
100
V–
80
60
V+
60
40
10
100
1k
10k
100k
1
10
Frequency (Hz)
100
1k
10k
100k
Frequency (Hz)
APPLICATIONS INFORMATION
Figure 1 shows the basic connections required for operation
of the INA106. Power supply bypass capacitors should be
connected close to the device pins as shown.
V–
V+
1µF
Figure 2 shows a voltage applied to pin 1 to trim the offset
voltage of the INA106. The known 100Ω source impedance
of the trim circuit is compensated by the 10Ω resistor in
series with pin 3 to maintain good CMR.
1µF
4
7
INA106
V2
2
R2
100kΩ
R1
10kΩ
Ref terminal will be summed with the output signal. The
source impedance of a signal applied to the Ref terminal
should be less than 10Ω to maintain good common-mode
rejection.
5
INA106
R1
V3
3
R3
10kΩ
6
+
–
R2
2
V2
5
VOUT = 10(V3 –V2)
10Ω
R4
100kΩ
V3
1
3
6
R3
Compensates for
some impedance
at pin 1. See text.
R4
+15V
1
The differential input signal is connected to pins 2 and 3 as
shown. The source impedance connected to the inputs must
be equal to assure good common-mode rejection. A 5Ω
mismatch in source impedance will degrade the commonmode rejection of a typical device to approximately 86dB. If
the source has a known source impedance mismatch, an
additional resistor in series with one input can be used to
preserve good common-mode rejection.
The output is referred to the output reference terminal
(pin 1) which is normally grounded. A voltage applied to the
100kΩ
100Ω
–15V
FIGURE 2. Offset Adjustment.
Referring to Figure 1, the CMR depends upon the match of
the internal R4/R3 ratio to the R1/R2 ratio. A CMR of 106dB
requires resistor matching of 0.005%. To maintain high
CMR over temperature, the resistor TCR tracking must be
better than 2ppm/°C. These accuracies are difficult and
expensive to reliably achieve with discrete components.
INA106
SBOS152A
499kΩ
VO = V2 – V3
Offset Adjustment Range = ±3mV
FIGURE 1. Basic Power Supply and Signal Connections.
VO
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5
INA106
V1
10Ω
10kΩ
2
E1
–In
100kΩ
5
A1
E0
6
2
R2
Gain
Adjust
200Ω
INA106
5
6
R1
E0
Output
R2
V2
10Ω
10kΩ
3
100kΩ
1
200Ω
INA106
10kΩ
E0 = 10(1 + 2R2 /R1) (E2 – E1)
E2
+In
FIGURE 3. Difference Amplifier with Gain and CMR Adjust.
100kΩ
2
5
6
To make a high performance high gain instrumentation amplifier, the INA106
can be combined with state-of-the-art op amps. For low source impedance
applications, OPA37s will give the best noise, offset, and temperature drift. At
source impedances above about 10kΩ, the bias current noise of the OPA37
reacting with input impedance degrades noise. For these applications, use an
OPA111 or a dual OPA2111 FET input op amp for lower noise. For an
electrometer grade IA, use the OPA128—see table below.
Using the INA106 for the difference amplifier also extends the input commonmode range of the instrumentation amplifier to ±10V. A conventional IA with
a unity-gain difference amplifier has an input common-mode range limited to
±5V for an output swing of ±10V. This is because a unity-gain difference amp
needs ±5V at the input for 10V at the output, allowing only 5V additional for
common-mode.
VO
VO = –10V2
10kΩ
100kΩ
3
1
A2
To eliminate adjustment interactions,
first adjust gain with V2 grounded.
V2
3
CMR
Adjust
1
A1, A2
R1
(Ω)
R2
(kΩ)
GAIN
(V/V)
CMRR
(dB)
Ib (pA)
NOISE AT 1kHz
(nV/ √Hz)
OPA37A
OPA111B
OPA128LM
50.5
202
202
2.5
10
10
1000
1000
1000
128
110
118
40000
1
0.075
4
10
38
FIGURE 6. Precision Instrumentation Amplifier.
Gain Error = 0.01% maximum
Nonlinearity = 0.001% maximum
Gain Drift = 2.ppm/°C
INA106
FIGURE 4. Precision G = –10 Inverting Amplifier.
2
INA106
2
R2
100kΩ
R1
10kΩ
V1
1
R4
100kΩ
1
5
V0
6
V0 = V1 + 10 V3
6
R3
10kΩ
3
VO
FIGURE 7. Precision Summing Amplifier.
VO = VIN
±100V
Safe Input
R2
100kΩ
R4
100kΩ
5
V3
VIN
R1
10kΩ
R3
10kΩ
INA106
3
2
10kΩ
100kΩ
5
This circuit follows an 11/1 divider with a gain of 11 for an overall gain of unity.
With an 11/1 divider, the input signal can exceed 100V without damage.
FIGURE 5. Voltage Follower with Input Protection.
1
VIN
3
100kΩ
10kΩ
6
VO
VO = 11VIN
Gain Error =
0.01% maximum
FIGURE 8. Precision G = 11 Buffer.
6
INA106
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SBOS152A
PACKAGE OPTION ADDENDUM
www.ti.com
16-Feb-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
INA106KP
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA106KPG4
ACTIVE
PDIP
P
8
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA106U
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA106U/2K5
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA106U/2K5G4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
INA106UE4
ACTIVE
SOIC
D
8
CU NIPDAU
Level-3-260C-168 HR
75
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
INA106U/2K5
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
INA106U/2K5
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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