TI LOG101AIDE4

LOG101
LOG
101
SBOS242B – MAY 2002 – REVISED JUNE 2004
Precision
LOGARITHMIC AND LOG RATIO AMPLIFIER
FEATURES
DESCRIPTION
● EASY-TO-USE COMPLETE CORE FUNCTION
The LOG101 is a versatile integrated circuit that computes
the logarithm or log ratio of an input current relative to a
reference current.
● HIGH ACCURACY: 0.01% FSO Over 5 Decades
● WIDE INPUT DYNAMIC RANGE:
7.5 Decades, 100pA to 3.5mA
● LOW QUIESCENT CURRENT: 1mA
The LOG101 is tested over a wide dynamic range of input
signals. In log ratio applications, a signal current can come
from a photodiode, and a reference current from a resistor in
series with a precision external reference.
● WIDE SUPPLY RANGE: ±4.5V to ±18V
The output signal at VOUT is trimmed to 1V per decade of input
current allowing seven decades of input current dynamic
range.
APPLICATIONS
● LOG, LOG RATIO COMPUTATION:
Communication, Analytical, Medical, Industrial,
Test, and General Instrumentation
● PHOTODIODE SIGNAL COMPRESSION AMPS
● ANALOG SIGNAL COMPRESSION IN FRONT
OF ANALOG-TO-DIGITAL (A/D) CONVERTERS
I2
Low DC offset voltage and temperature drift allow accurate
measurement of low-level signals over a wide environmental
temperature range. The LOG101 is specified over the temperature range –5°C to +75°C, with operation over
–40°C to +85°C.
Note: Protected under US Patent #6,667,650; other patents pending.
CC
VOUT = (1V) • LOG (I1/I2)
V+
4
8
I1
LOG101
1
Q1
Q2
3
A2
A1
VOUT
R2
R1
5
6
GND
V–
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
Copyright © 2002-2004, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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ELECTROSTATIC
DISCHARGE SENSITIVITY
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V– .................................................................... 36V
Input Voltage .................................................... (V–) – 0.5 to (V+) + 0.5V
Input Current ................................................................................... ±10mA
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature .................................................... –40°C to +85°C
Storage Temperature ..................................................... –55°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground.
PIN DESCRIPTION
Top View
SO
I1
1
8
I2
NC
2
7
NC
VOUT
3
6
GND
V+
4
5
V–
LOG101
NC = No Internal Connection
PACKAGE/ORDERING INFORMATION(1)
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
LOG101AID
LOG101AIDR
Rails, 100
Tape and Reel, 2500
PRODUCT
PACKAGE-LEAD
PACKAGE
DESIGNATOR
LOG101AID
SO -8
D
–5°C to +75°C
LOG101
"
"
"
"
"
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet.
ELECTRICAL CHARACTERISTICS
Boldface limits apply over the specified temperature range, TA = –5°C to +75°C.
At TA = +25°C, VS = ±5V, and ROUT = 10kΩ, unless otherwise noted.
LOG101AID
PARAMETER
CONDITION
CORE LOG FUNCTION
IIN / VOUT Equation
LOG CONFORMITY ERROR(1)
Initial
over Temperature
GAIN(3)
Initial Value
Gain Error
vs Temperature
INPUT, A1 and A2
Offset Voltage
vs Temperature
vs Power Supply (PSRR)
Input Bias Current
vs Temperature
Voltage Noise
Current Noise
Common-Mode Voltage Range (Positive)
(Negative)
Common-Mode Rejection Ratio (CMRR)
OUTPUT, A2 (VOUT)
Output Offset, VOSO, Initial
vs Temperature
Full-Scale Output (FSO)
Short-Circuit Current
2
MIN
TYP
MAX
VO = (1V) • log (I1/I2)
1nA to 100µA (5 decades)
100pA to 3.5mA (7.5 decades)
1nA to 100µA (5 decades)
100pA to 3.5mA (7.5 decades)(2)
0.01
0.06
0.0001
0.0005
1nA to 100µA
1nA to 100µA
TMIN to TMAX
1
0.15
0.003
TMIN to TMAX
VS = ±4.5V to ±18V
TMIN to TMAX
f = 10Hz to 10kHz
f = 1kHz
f = 1kHz
TMIN to TMAX
VS = ±5V
±3
±2
(V–) + 1.2
V
0.2
±1
0.01
±0.3
±2
5
±5
Doubles Every 10°C
3
30
4
(V+) – 2
(V+) – 1.5
(V–) + 2
(V–) + 1.2
105
±1.5
50
%
%
%/ °C
%/ °C
V/decade
%
%/ °C
mV
µV/°C
µV/V
pA
µVrms
nV/√Hz
fA/√Hz
V
V
dB
±15
(V+) – 1.5
±18
UNITS
mV
µV/°C
V
mA
LOG101
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SBOS242B
ELECTRICAL CHARACTERISTICS (Cont.)
Boldface limits apply over the specified temperature range, TA = –5°C to +75°C.
At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted.
LOG101AID
PARAMETER
TOTAL
Initial
ERROR(4)(5)
vs Temperature
vs Supply
CONDITION
MIN
MAX
UNITS
±75
±20
±20
±20
±20
±20
±20
±20
±20
±20
±3.0
±0.1
±0.1
±0.1
±0.1
±0.1
±0.1
±0.25
±0.1
±0.1
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ °C
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
mV/ V
mV/V
mV/ V
mV/ V
CC = 4500pF
CC = 150pF
CC = 150pF
CC = 50pF
0.1
38
40
45
kHz
kHz
kHz
kHz
CC = 150pF
CC = 150pF
CC = 150pF
11
7
110
µs
µs
µs
CC = 150pF
CC = 150pF
CC = 150pF
45
20
550
µs
µs
µs
I1 or I2 remains fixed while other varies.
Min to Max
I1 or I2 = 3.5mA
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
I1 or I2 = 350pA
I1 or I2 = 100pA
I1 or I2 = 3.5mA
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
I1 or I2 = 350pA
I1 or I2 = 100pA
I1 or I2 = 3.5mA
I1 or I2 = 1mA
I1 or I2 = 100µA
I1 or I2 = 10µA
I1 or I2 = 1µA
I1 or I2 = 100nA
I1 or I2 = 10nA
I1 or I2 = 1nA
I1 or I2 = 350pA
I1 or I2 = 100pA
FREQUENCY RESPONSE, CORE LOG(6)
BW, 3dB
I2 = 10nA
I2 = 1µA
I2 = 10µA
I2 = 1mA
Step Response
Increasing
I2 = 1µA to 1mA
I2 = 100nA to 1µA
I2 = 10nA to 100nA
Decreasing
I2 = 1mA to 1µA
I2 = 1µA to 100nA
I2 = 100nA to 10nA
POWER SUPPLY
Operating Range
Quiescent Current
VS
IO = 0
TEMPERATURE RANGE
Specified Range, TMIN to TMAX
Operating Range
Storage Range
Thermal Resistance, θJA SO-8
TYP
±1.2
±0.4
±0.1
±0.05
±0.05
±0.09
±0.2
±0.3
±0.1
±0.3
±4.5
±1
–5
–40
–55
±18
±1.5
V
mA
75
85
125
°C
°C
°C
°C/W
150
NOTES: (1) Log Conformity Error is peak deviation from the best-fit straight line of VOUT versus log (I1 / I2) curve expressed as a percent of peak-to-peak full-scale.
(2) May require higher supply for full dynamic range.
(3) Output core log function is trimmed to 1V output per decade change of input current.
(4) Worst-case Total Error for any ratio of I1 /I2 is the largest of the two errors, when I1 and I2 are considered separately.
(5) Total I1 + I2 should be kept below 4.5mA on ±5V supply.
(6) Bandwidth (3dB) and transient response are a function of both the compensation capacitor and the level of input current.
LOG101
SBOS242B
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3
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted.
ONE CYCLE OF NORMALIZED TRANSFER FUNCTION
NORMALIZED TRANSFER FUNCTION
4.0
VOUT = 1V LOG (I1/I2)
Normalized Output Voltage (V)
Normalized Output Voltage (V)
3.0
1
2.0
1.0
0.0
–1.0
–2.0
–3.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–4.0
0.0001 0.001 0.01
0.1
1
10
100
1k
1
10k
2
Current Ratio, I1/I2
6
4
10
8
Current Ratio, I1/I2
TOTAL ERROR vs INPUT CURRENT
120
3
GAIN ERROR (I2 = 1µA)
5.8
+85°C
100
4.8
+75°C
Gain Error (%)
Total Error (mV)
+75°C
80
60
40
+25°C
3.8
+25°C
2.8
–5°C to –40°C
1.8
–5°C
20
0.8
0
100pA 1nA 10nA 100nA
1µA
–0.2
100pA 1nA
10µA 100µA 1mA 10mA
10nA 100nA 1µA
Input Current (I1 or I2)
1M
Select CC for I1 min.
and I2 max. Values
below 2pF may be ignored.
10µA
I1 = 100pA
I1 = 1nA
100k
CC (pF)
1M
3dB Frequency Response (Hz)
10M
I1 = 10nA
10k
I1 = 100nA
1µA
1k
100
I1 = 10µA
100µA
1mA
10
1
100pA
1nA
10nA 100nA 1µA
100k
10k
1k
100µA
100µA
1mA
I1 = 1mA
1µA
100µA
CC
=1
F
0p 100µA
1nA
A
1µA
1mA
to 10µA
10nA
100
I1 = 1nA
10
1
1µ
to
µA
0
1
10nA
0
00
CC
=1
100nA
10nA
pF
CC
I1 = 1nA
µF
=1
0.1
10µA 100µA 1mA 10mA
100pA
1nA
10nA
100nA
1µA
10µA
100µA
1mA
I2
I2
4
10mA
3dB FREQUENCY RESPONSE
MINIMUM VALUE OF COMPENSATION CAPACITOR
100M
10µA 100µA 1mA
Input Current (I1 or I2)
LOG101
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SBOS242B
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, VS = ±5V, and RL = 10kΩ, unless otherwise noted.
LOG CONFORMITY vs INPUT CURRENT
17
15
7 Decades
(100pA to 1mA)
300
13
Log Conformity (m%)
Log Conformity (mV)
LOG CONFORMITY vs TEMPERATURE
350
+85°C
11
9
7
+75°C
5
–40°C to +25°C
250
6 Decades
(1nA to 1mA)
200
150
5 Decades
(1nA to 100µA)
100
3
50
1
–1
100pA
1nA
10nA
100nA
1µA
10µA
100µA
0
–40 –30 –20 –10 0
1mA
Input Current (I1 or I2)
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the LOG101. In order to reduce the influence of lead
inductance of power-supply lines, it is recommended that
each supply be bypassed with a 10µF tantalum capacitor in
parallel with a 1000pF ceramic capacitor, as shown in
Figure 1. Connecting the capacitors as close to the LOG101
as possible will contribute to noise reduction as well.
10µF
To maintain specified accuracy, the input current range of the
LOG101 should be limited from 100pA to 3.5mA. Input currents
outside of this range may compromise LOG101 performance.
Input currents larger than 3.5mA result in increased
nonlinearity. An absolute maximum input current rating of
10mA is included to prevent excessive power dissipation that
may damage the logging transistor.
On ±5V supplies, the total input current (I1 + I2) is limited to
4.5mA. Due to compliance issues internal to the LOG101, to
accommodate larger total input currents, supplies should be
increased.
Currents smaller than 100pA will result in increased errors due
to the input bias currents of op amps A1 and A2 (typically 5pA).
The input bias currents may be compensated for, as shown in
Figure 2. The input stages of the amplifiers have FET inputs,
with input bias current doubling every 10°C, which makes the
nulling technique shown practical only where the temperature
is fairly stable.
V+
1000pF
4
R2
10kΩ
1
V–
V+
6
3
LOG101
VOUT
R1
1MΩ
5
1
8
I2
3
VOUT
I1
5
LOG101
CC
6 GND
8
10µF
I2
1000pF
R1'
> 1MΩ
4
V–
CC
V–
FIGURE 1. Basic Connections of the LOG101.
R2'
10kΩ
V+
FIGURE 2. Bias Current Nulling.
LOG101
SBOS242B
30 40 50 60 70 80 90
INPUT CURRENT RANGE
The LOG101 is a true logarithmic amplifier that uses the
base-emitter voltage relationship of bipolar transistors to
compute the logarithm, or logarithmic ratio of a current ratio.
I1
10 20
Temperature (°C)
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5
SETTING THE REFERENCE CURRENT
V+
V+
When the LOG101 is used to compute logarithms, either I1 or
I2 can be held constant and becomes the reference current to
which the other is compared.
I1 = 2.5nA to 1mA
REF3025
4
2.5V
3
1
VOUT
1GΩ to 2.5kΩ
VOUT is expressed as:
LOG101
100kΩ I2 = 2.5nA
VOUT = (1V) • log (I1/I2)
10MΩ
(1)
8
+25mV
IREF can be derived from an external current source (such as
shown in Figure 3), or it may be derived from a voltage
source with one or more resistors. When a single resistor is
used, the value may be large depending on IREF. If IREF is
10nA and +2.5V is used:
5
3
+2.5V
CC
100Ω
6 GND
V–
OPA335 Chopper Op Amp
–2.5V
(2)
RREF = 2.5V/10nA = 250MΩ
FIGURE 5. Current Source with Offset Compensation.
IREF
2N2905
at different levels of input signals. Smaller input currents
require greater gains to maintain full dynamic range, and will
slow the frequency response of the LOG101.
RREF
3.6kΩ
2N2905
+15V
–15V
6V
IN834
IREF =
FREQUENCY COMPENSATION
6V
RREF
FIGURE 3. Temperature Compensated Current Source.
A voltage divider may be used to reduce the value of the
resistor, as shown in Figure 4. When using this method, one
must consider the possible errors caused by the amplifier’s
input offset voltage. The input offset voltage of amplifier A1
has a maximum value of 1.5mV, making VREF a suggested
value of 100mV.
In an application, highest overall bandwidth can be achieved
by detecting the signal level at VOUT, then switching in
appropriate values of compensation capacitors.
VREF = 100mV
R1
R3
1
+5V
R2
Frequency compensation for the LOG101 is obtained by
connecting a capacitor between pins 3 and 8. The size of the
capacitor is a function of the input currents, as shown in the
Typical Characteristic Curves (Minimum Value of Compensation Capacitor). For any given application, the smallest
value of the capacitor which may be used is determined by
the maximum value of I2 and the minimum value of I1. Larger
values of CC will make the LOG101 more stable, but will
reduce the frequency response.
VOS
+
–
IREF
NEGATIVE INPUT CURRENTS
A1
The LOG101 will function only with positive input currents
(conventional current flows into pins 1 and 8). In situations
where negative input currents are needed, the circuits in
Figures 6, 7, and 8 may be used.
R3 >> R2
FIGURE 4. T Network for Reference Current.
Figure 5 shows a low-level current source using a series
resistor. The low offset op-amp reduces the effect of the
LOG101’s input offset voltage.
QA
IIN
National
LM394
FREQUENCY RESPONSE
The frequency response curve seen in the Typical Characteristic Curves is shown for constant DC I1 and I2 with a small
signal AC current on one input.
D1
The 3dB frequency response of the LOG101 is a function of
the magnitude of the input current levels and of the value of the
frequency compensation capacitor. See Typical Characteristic
Curve “3dB Frequency Response” for details.
The transient response of the LOG101 is different for increasing and decreasing signals. This is due to the fact that
a log amp is a nonlinear gain element and has different gains
6
QB
D2
OPA703
IOUT
FIGURE 6. Current Inverter/Current Source.
LOG101
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SBOS242B
V+
+5V
TLV271 or 1 OPA2335
2
+3.3V
4
I1
1
1/2 OPA2335
VOUT
10nA to 1mA
LOG101
λ 1´
λ1
+5V
1/2 OPA2335
Back Bias
D1
Sample
1.5kΩ
1.5kΩ
3
I2
Light λ 1
Source
BSH203
+3.3V
10nA to 1mA
Pin 1 or Pin 8
8
6
5
D2
CC
LOG101
Photodiode
V–
FIGURE 9. Absorbance Measurement.
FIGURE 7. Precision Current Inverter/Current Source.
OPERATION ON SINGLE SUPPLY
VOLTAGE INPUTS
The LOG101 gives the best performance with current inputs.
Voltage inputs may be handled directly with series resistors,
but the dynamic input range is limited to approximately three
decades of input voltage by voltage noise and offsets. The
transfer function of Equation (13) applies to this configuration.
Many applications do not have the dual supplies required to
operate the LOG101. Figure 10 shows the LOG101 configured for operation with a single +5V supply.
Single Supply +5V
4
3
1
APPLICATION CIRCUITS
I1
LOG RATIO
VOUT
LOG101
6
One of the more common uses of log ratio amplifiers is
to measure absorbance. A typical application is shown in
Figure 9.
8
5
I2
CC
Absorbance of the sample is A = logλ1´/ λ1
(3)
If D1 and D2 are matched A ∝ (1V) logI1 / I2
(4)
1µF
3
2
5
TPS(1)
1µF
DATA COMPRESSION
4
1
–5V
1µF
NOTE: (1) TPS60402DBV negative charge pump.
In many applications the compressive effects of the logarithmic transfer function are useful. For example, a LOG101
preceding a 12-bit Analog-to-Digital (A/D) converter can
produce the dynamic range equivalent to a 20-bit converter.
FIGURE 10. Single +5V Power-Supply Operation.
1.5kΩ
100kΩ
100kΩ
+5V
10nA to 1mA
+3.3V
Back Bias
+3.3V
1/2
OPA2335
+5V
1.5kΩ
1/2
OPA2335
Photodiode
1.5kΩ
100kΩ
100kΩ
LOG101
10nA to 1mA
Pin 1 or Pin 8
FIGURE 8. Precision Current Inverter/Current Source.
LOG101
SBOS242B
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7
INSIDE THE LOG101
also
Using the base-emitter voltage relationship of matched
bipolar transistors, the LOG101 establishes a logarithmic function of input current ratios. Beginning with the
base-emitter voltage defined as:
VBE
I
= VT ln C
IS
kT
where : VT =
q
VOUT = VL
VOUT =
(1)
k = Boltzman’s constant = 1.381 • 10–23
(9)
R1 + R 2
I
n VT log 1
R1
I2
VOUT = (1V) • log
or
T = Absolute temperature in degrees Kelvin
R1 + R 2
R1
(10)
I1
I2
(11)
q = Electron charge = 1.602 • 10–19 Coulombs
IC = Collector current
IS = Reverse saturation current
I1
From the circuit in Figure 11, we see that:
VL = VBE1 – VBE 2
Q1
I1
IS1
– VT2 ln
1
2
A1
IS 2
 I
I 
VL = VT1 ln 1 – ln 2 
I
I
S
 S
I1
VL = VT ln and sin ce
I2
R2
VL
R1
FIGURE 11. Simplified Model of a Log Amplifier.
(4)
It should be noted that the temperature dependance
associated with VT = kT/q is internally compensated on
the LOG101 by making R1 a temperature sensitive resistor with the required positive temperature coefficient.
(5)
ln x = 2.3 log10 x
(6)
I
VL = n VT log 1
I2
(7)
where n = 2.3
(8)
DEFINITION OF TERMS
3.5
TRANSFER FUNCTION
3.0
The ideal transfer function is:
2.5
VOUT = 1V • log (I1/I2)
I1
I2
I2
(3)
If the transistors are matched and isothermal and
VTI = VT2, then (3) becomes:
A
0p
10
I 2 = nA
1
I 2 = 0n A
1
I =
2.0
1.5
(5)
2
1.0
VOUT (V)
Figure 12 shows the graphical representation of the transfer
over valid operating range for the LOG101.
0.5
ACCURACY
–0.5
–1.5
Accuracy considerations for a log ratio amplifier are somewhat more complicated than for other amplifiers. This is
because the transfer function is nonlinear and has two
inputs, each of which can vary over a wide dynamic range.
The accuracy for any combination of inputs is determined
from the total error specification.
pA
100
1nA
0.0
–1.0
8
A2
VBE
VOUT = (1V) • LOG
I2
VOUT
+
VBE
I1
(2)
I2
Q2
–
+
Substituting (1) into (2) yields:
VL = VT1 ln
–
–2.0
–2.5
–3.0
A
10n
A
0n
10
I 2 = µA
1
I 2 = 0µA
1
I 2 = 00µA
1
I 2 = mA
1
I =
nA µA
1
100
10µ
A
100
µA
A
1m
A
10m
I1
VOUT = (1V) • LOG (I1/I2)
2
–3.5
FIGURE 12. Transfer Function with Varying I 2 and I1.
LOG101
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SBOS242B
to I2 is shown in Figure 13. The OPA703 is configured as a
level shifter with inverting gain and is used to scale the
photodiode current directly into the A/D converter input
voltage range.
TOTAL ERROR
The total error is the deviation (expressed in mV) of the
actual output from the ideal output of VOUT = 1V • log (I1/I2).
Thus,
VOUT(ACTUAL) = VOUT(IDEAL) ± Total Error.
The wide dynamic range of the LOG101 is also useful for
measuring avalanche photodiode current (APD) (see Figure 14).
(6)
It represents the sum of all the individual components of error
normally associated with the log amp when operated in the
current input mode. The worst-case error for any given ratio
of I1/I2 is the largest of the two errors when I1 and I2 are
considered separately. Temperature can affect total error.
LOG CONFORMITY
For the LOG101, log conformity is calculated the same as
linearity and is plotted I1 /I2 on a semi-log scale. In many
applications, log conformity is the most important specification. This is because bias current errors are negligible
(5pA compared to input currents of 100pA and above) and
the scale factor and offset errors may be trimmed to zero or
removed by system calibration. This leaves log conformity as
the major source of error.
ERRORS RTO AND RTI
As with any transfer function, errors generated by the function itself may be Referred-to-Output (RTO) or Referred-toInput (RTI). In this respect, log amps have a unique property:
Given some error voltage at the log amp’s output, that error
corresponds to a constant percent of the input regardless of
the actual input level.
Log conformity is defined as the peak deviation from the best
fit straight line of the VOUT versus log (I1/I2) curve. This is
expressed as a percent of ideal full-scale output. Thus, the
nonlinearity error expressed in volts over m decades is: (7)
USING A LARGER REFERENCE VOLTAGE
REDUCES OFFSET ERRORS
VOUT(NONLIN) = 1V/dec • 2NmV
where N is the log conformity error, in percent.
Using a larger reference voltage to create the reference
current minimizes errors due to the LOG101’s input offset
voltage. Maintaining an increasing output voltage as a function of increasing photodiode current is also important in
many optical sensing applications. All zeros from the
A/D converter output represent zero or low-scale photodiode
current. Inputting the reference current into I1, and designing
IREF such that it is as large or larger than the expected
maximum photodiode current is accomplished using this
requirement. The LOG101 configured with the reference
current connecting I1 and the photodiode current connecting
IREF =
VREF
VOUT = VREF –
R1
R2
R3
• (1V)LOG
(
INDIVIDUAL ERROR COMPONENTS
The ideal transfer function with current input is:
VOUT = (1V) • log
The actual transfer function with the major components of
error is:
(9)
I –I
VOUT = (1V) (1 ± ∆K ) log 1 B1 ± 2Nm ± VOS O
I2 – IB 2
IREF
IPHOTO
)
R2
CC
R3
VOUT
VMIN to VMAX
3
IREF
R1
(8)
I1
I2
I1
Q1
1
Q2
A/D
Converter
OPA703
A2
VREF
A1
IPHOTO
R2
I2
R3
8
IMIN to IMAX
LOG101
6
FIGURE 13. Technique for Using Full-Scale Reference Current Such that V OUT Increases with Increasing Photodiode Current.
LOG101
SBOS242B
www.ti.com
9
ISHUNT
+15V to +60V
500Ω
Irx = 1µA to 1mA
Receiver
5kΩ
5kΩ
10Gbits/sec
+5V
APD
INA168
SOT23-5
I to V
Converter
IOUT = 0.1 • ISHUNT
1
2
IOUT
CC
1.2kΩ
1kΩ
+5V
4
1
3
Q1
Q2
OPA703
VOUT = 2.5V to 0V
A2
A1
100µA
25kΩ
8
LOG101
REF3025
2.5V
SO-8
6
5
–5V
FIGURE 14. High Side Shunt for Avalanche Photodiode (APD) Measures 3-Decades of APD Current.
The individual component of error is:
Since the ideal output is 1.000V, the error as a percent of
reading is
∆K = gain accuracy (0.15%, typ), as specified in the
specification table.
% error =
IB1 = bias current of A1 (5pA, typ)
IB2 = bias current of A2 (5pA, typ)
0.005055
• 100% = 0.5%
1
(12)
For the case of voltage inputs, the actual transfer function is
N = log conformity error (0.01%, 0.06%, typ)
0.01% for n = 5, 0.06% for n = 7
VOUT
VOSO = output offset voltage (3mV, typ)
n = number of decades over which N is specified:
EOS1
V1
– IB1 ±
R1
R1
= (1V) (1 ± ∆K ) log
± 2Nn ± VOSO
EOS2
V2
– IB2 ±
R2
R2
Example: what is the error when
I1 = 1µA and I2 = 100nA
VOUT = (1 ± 0.0015) log
10 −6 − 5 • 10 −12
± (2)(0.0001)5 ± 3.0mV
10 −7 − 5 • 10 −12
= 1.005055V
10
(10)
Where
(13)
EOS1
E
and OS2 are considered to be zero for large
R1
R2
values of resistance from external input current sources.
(11)
LOG101
www.ti.com
SBOS242B
PACKAGE OPTION ADDENDUM
www.ti.com
16-Feb-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
LOG101AID
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
LOG101AIDE4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
LOG101AIDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
LOG101AIDRE4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
LOG101AIDR
Package Package Pins
Type Drawing
SOIC
D
8
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
2500
330.0
12.4
Pack Materials-Page 1
6.4
B0
(mm)
K0
(mm)
P1
(mm)
5.2
2.1
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LOG101AIDR
SOIC
D
8
2500
367.0
367.0
35.0
Pack Materials-Page 2
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