TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 HIGH INPUT VOLTAGE, MICROPOWER SON PACKAGED 80-mA LDO LINEAR REGULATORS FEATURES DESCRIPTION • • • • • • • • The TPS715Axx low-dropout (LDO) voltage regulators offer the benefits of high input voltage, low-dropout voltage, low-power operation, and miniaturized packaging. The devices, which operate over an input range of 2.5 V to 24 V, are stable with any capacitor (≥ 0.47 µF). The high maximum input voltage combined with excellent power dissipation capability makes this part particularly well-suited to industrial and automotive applications. 80-mA Low-Dropout Regulator Available in 3.3 V and Adjustable 24-V Maximum Input Voltage Low 3.2-µA Quiescent Current at 80 mA Stable With Any Capacitor (> 0.47 µF) Specified Current Limit 3mm x 3mm SON Package -40°C to +125°C Specified Junction Temperature Range APPLICATIONS • • • • Ultralow Power Microcontrollers Industrial/Automotive Applications PDAs Portable, Battery-Powered Equipment A PMOS pass element behaves as a low-value resistor. The low dropout voltage, typically 670 mV at 80 mA of load current, is directly proportional to the load current. The low quiescent current (3.2 µA typically) is nearly constant over the entire range of output load current (0 mA to 80 mA). DRB PACKAGE 3mm x 3mm SON (TOP VIEW) IN NC NC GND OUT NC IN TPS715A33 OUT MSP430 GND Li+ NC FB/NC Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004, Texas Instruments Incorporated TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. AVAILABLE OPTIONS (1) (1) (2) PACKAGE-LEAD (DESIGNATOR) SPECIFIED TEMPERATURE RANGE PACKAGE MARKING PRODUCT VOUT (2) TPS715A01 (Adjustable) 1.2 V-15 V 3 x 3 SON (DRB) -40°C to 125°C ANO TPS715A33 3.3 V 3 x 3 SON (DRB) -40°C to 125°C ANN ORDERING NUMBER TRANSPORT MEDIA, QUANTITY TPS715A01DRBT Tape and Reel, 250 TPS715A01DRBR Tape and Reel, 3000 TPS715A33DRBT Tape and Reel, 250 TPS715A33DRBR Tape and Reel, 3000 For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. Custom output voltages from 1.3 V to 4 V in 100 mV increments are available on a quick-turn basis for prototyping. Production quantities are available; minimum order quantities apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS over operating temperature range (unless otherwise noted) (1) UNIT VIN range -0.3 V to 24 V Peak output current Internally limited ESD rating, HBM 2 kV ESD rating, CDM 500 V Continuous total power dissipation See Dissipation Rating Table Junction temperature range, TJ -40°C to 150°C Storage temperature range -65°C to 150°C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. POWER DISSIPATION RATING TABLE BOARD PACKAGE RθJA°C/W DERATING FACTOR ABOVE TA = 25°C TA ≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING High-K (1) DRB 65 15.4 mW/°C 1.54 W 0.85 W 0.62 W (1) 2 The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board. TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 ELECTRICAL CHARACTERISTICS Over operating junction temperature range (TJ = -40°C to +125°C), VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, COUT = 1 µF, unless otherwise noted. The TPS715A01 is tested with VOUT = 2.8 V. Typical values are at TJ = 25°C. PARAMETER TEST CONDITIONS Input voltage (1) VIN Voltage range (TPS715A01) VOUT Output voltage accuracy (1) MIN TYP 24 IOUT = 80 mA 3 24 1.2 15 V V TPS715A01 VOUT + 1.0 V ≤ VIN ≤ 24 V, 1.2 V ≤ VOUT ≤ 15 V, 0 ≤ IOUT ≤ 80 mA TPS715A33 4.3 V < VIN < 24 V, 0 ≤ IOUT ≤ 80 mA 0.96 × VOUT(nom) VOUT(nom) 1.04 × VOUT(nom) 3.135 3.3 3.465 60 ∆VOUT/∆VIN VOUT + 1 V < VIN ≤ 24 V 20 Load regulation ∆VOUT/∆IOUT IOUT = 100 µA to 80 mA 35 Dropout voltage VIN = VOUT(NOM) - 0.1 V VDO IOUT = 80 mA Output current limit ICL VOUT = 0 V IGND 670 160 mV 1100 mA 4.2 0 mA ≤ IOUT ≤ 80 mA 3.2 4.8 PSRR f = 100 kHz, COUT = 10 µF Output noise voltage VIN BW = 200 Hz to 100 kHz, COUT = 10 µF, IOUT = 50 mA mV 1120 3.2 Power-supply ripple rejection V mV TJ = -40°C to 85°C, 0 mA ≤ IOUT ≤ 80 mA VIN = 24 V, 0 mA ≤ IOUT ≤ 80 mA (1) UNIT 2.5 Output voltage line regulation (1) Ground pin current MAX IOUT = 10 mA µA 5.8 60 dB 575 µVrms Minimum VIN = VOUT + VDO, or the value shown for Input voltage, whichever is greater. 3 TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 FUNCTIONAL BLOCK DIAGRAM—ADJUSTABLE VERSION V(OUT) V(IN) Current Sense ILIM _ R1 + GND FB R2 Vref = 1.205 V Bandgap Reference FUNCTIONAL BLOCK DIAGRAM—FIXED VERSION V(OUT) V(IN) Current Sense ILIM _ R1 + GND Vref = 1.205 V Bandgap Reference R2 R2 = 840 kΩ Table 1. Terminal Functions TERMINAL NAME NO. FIXED FB 4 DESCRIPTION ADJ. 5 Adjustable version. This terminal is used to set the output voltage. GND 4 4 Ground NC 2, 3, 5-7 2, 3, 6, 7 IN 1 1 Unregulated input voltage. OUT 8 8 Regulated output voltage, any output capacitor ≥ 0.47 µF can be used for stability. No connection TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS TPS715A33 OUTPUT VOLTAGE vs OUTPUT CURRENT 3.399 3.366 3.333 3.300 3.267 3.234 3.201 3.399 3.333 3.267 3.234 3.135 20 30 40 50 60 70 IOUT = 80 mA 3.201 3.168 10 IOUT = 10 mA 3.300 3.135 2.5 −40 −25 −10 5 Figure 2. Figure 3. OUTPUT SPECTRAL NOISE DENSITY vs FREQUENCY OUTPUT IMPEDANCE vs FREQUENCY TPS715A33 DROPOUT VOLTAGE vs OUTPUT CURRENT 1000 18 IOUT = 1 mA 6 IOUT = 50 mA 4 3 2 1 14 12 10 8 6 IOUT = 1 mA 4 2 0 1k 10 k f − Frequency − Hz TJ = +25C 500 400 300 200 TJ = −40C 100 1k 10k 100k 1M 0 10 M 10 20 30 40 50 60 Figure 5. Figure 6. TPS71501 DROPOUT VOLTAGE vs INPUT VOLTAGE TPS715A33 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE CURRENT LIMIT vs VOUT 1200 1000 TJ = +125C 800 600 TJ = +25C 400 TJ = −40C 200 VDO Dropout Voltage mV 900 700 IOUT = 80 mA 600 500 400 300 200 IOUT = 10 mA 100 0 0 5 6 7 8 9 10 11 12 13 14 15 80 3.5 VIN = 4.3 V VIN = 4.3 V VOUT = 3.3 V 3.0 800 70 I OUT − Output Current − mA Figure 4. 1000 4 600 f − Frequency − Hz 1400 3 700 0 IOUT = 50 mA 10 100 k TJ = +125C 800 100 0 100 VIN = 4.3 V 900 VOUT − Output Voltage − V 5 VIN = 4.3 V VOUT = 3.3 V COUT = 1 µF TJ = 25°C 16 VDO − Dropout Voltage − mV VIN = 4.3 V VOUT = 3.3 V COUT = 1 µF Zo − Output Impedance − Ω 7 20 35 50 65 80 95 110 125 TJ − Junction Temperature − °C Figure 1. 8 Output Spectral Noise Density − µV/√Hz 3.0 TJ Junction Temperature ° C I OUT Output Current mA VDO − Dropout Voltage − mV 3.5 2.0 −40 −25 −10 5 20 35 50 65 80 95 110 125 80 VIN = 4.3 V VOUT = 3.3 V IOUT = 1 µF 4.0 3.366 3.168 0 4.5 VIN = 4.3 V 3.432 VDO Dropout Voltage mV VOUT Output Voltage V 3.465 VIN = 4.3 V 3.432 QUIESCENT CURRENT vs JUNCTION TEMPERATURE IGND − Ground Current − µ A 3.465 TPS715A33 OUTPUT VOLTAGE vs JUNCTION TEMPERATURE −40 −25 −10 5 20 35 50 65 80 95 110 125 2.5 2.0 1.5 1.0 0.5 0 0 100 200 300 400 VIN − Input Voltage − V TJ Junction Temperature ° C IOUT − Current Limit − mA Figure 7. Figure 8. Figure 9. 500 5 TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 TYPICAL CHARACTERISTICS (continued) LINE TRANSIENT RESPONSE 100 VIN = 4.3 V VOUT = 3.3 V COUT = 10 µF TJ = 25°C 80 70 60 VOUT = 3.3 V RL = 66 Ω COUT = 10 µF 7 IOUT = 1 mA 50 40 30 IOUT = 50 mA 20 6 VIN − Input Voltage − V 90 5 3 VIN 2 VOUT 10 0 10 100 1k 10k 100k 1M 10 M 0 f − Frequency − Hz Figure 10. 2 4 6 8 10 12 14 t − Time − ms 16 18 20 Figure 11. VOUT − Output Voltage − mV IOUT − Output Current − mA LOAD TRANSIENT RESPONSE V IN = 4.3 V 200 V OUT = 3.3 V COUT = 10 µF 0 −200 100 50 0 −0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 t − Time − ms Figure 13. 6 VOUT = 3.3 V IOUT = 50 mA COUT = 10 µF 100 50 0 −50 4 1 0 VIN − Input Voltage − V VOUT − Output Voltage − mV POWER UP / POWER DOWN 8 VOUT − Output Voltage − V PSRR − Power Supply Ripple Rejection − dB POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY 5.3 4.3 0 50 100 150 200 250 300 350 400 450 500 t − Time − ms Figure 12. TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 APPLICATION INFORMATION The TPS715Axx family of LDO regulators has been optimized for ultra low power applications such as the MSP430 microcontroller. Its ultralow supply current maximizes efficiency at light loads, and its high input voltage range makes it suitable for supplies such as unconditioned solar panels. VIN IN C1 0.1 µF TPS715A33 OUT GND VOUT 0.47 µF Figure 14. Typical Application Circuit (Fixed Voltage Version) External Capacitor Requirements Although not required, a 0.047-µF or larger input bypass capacitor, connected between IN and GND and located close to the device, is recommended to improve transient response and noise rejection of the power supply as a whole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated and if the device is located several inches from the power source. The TPS715Axx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. Any capacitor (including ceramic and tantalum) that is ≥ 0.47 µF properly stabilizes this loop. Power Dissipation and Junction Temperature To ensure reliable operation, worst-case junction temperature should not exceed 150°C. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or equal to PD(max). The maximum-power-dissipation limit is determined using Equation 1: T max T A P D(max) J R JA (1) where: • TJmax is the maximum allowable junction temperature. • RθJA is the thermal resistance junction-to-ambient for the package (see the Dissipation Rating table). • TA is the ambient temperature. The regulator dissipation is calculated using Equation 2: P D VIN VOUT I OUT (2) Power dissipation resulting from quiescent current is negligible. Regulator Protection The TPS715Axx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. The TPS715Axx features internal current limiting. During normal operation, the TPS715Axx limits output current to approximately 500 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. Take care not to exceed the power dissipation ratings of the package. 7 TPS715A01 TPS715A33 www.ti.com SBVS047A – MAY 2004 – REVISED DECEMBER 2004 Programming the TPS71501 Adjustable LDO Regulator The output voltage of the TPS715A01 adjustable regulator is programmed using an external resistor divider as shown in Figure 15. The output voltage is calculated using Equation 3: V OUT VREF 1 R1 R2 (3) where: • VREF = 1.205 V typ (the internal reference voltage) Resistors R1 and R2 should be chosen for approximately 1.5-µA divider current. Lower value resistors can be used for improved noise performance, but the solution consumes more power. Higher resistor values should be avoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificially increases/decreases the feedback voltage and thus erroneously decreases/increases VO. The recommended design procedure is to choose R2 = 1 MΩ to set the divider current at 1.5 µA, and then calculate R1 using Equation 4: V OUT R1 1 R2 V REF (4) TPS715A01 VIN OUTPUT VOLTAGE PROGRAMMING GUIDE IN 0.1 µF VOUT OUT R1 FB GND 0.47 µF OUTPUT VOLTAGE R1 R2 1.8 V 392 MΩ 806 kΩ 2.8 V 1.07 MΩ 806 kΩ 5.0 V 2.55 MΩ 806 kΩ R2 Figure 15. TPS715A01 Adjustable LDO Regulator Programming 8 PACKAGE OPTION ADDENDUM www.ti.com 16-May-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS715A01DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A01DRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A01DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A01DRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A33DRBR ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A33DRBRG4 ACTIVE SON DRB 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A33DRBT ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS715A33DRBTG4 ACTIVE SON DRB 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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