MSTM-SEC1 Simplified Control Timing Module 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com General Description US Headquarters: 630-851-4722 European Headquarters: +353-62-472221 The Connor-Winfield Stratum SEC1 (SDH Equipment Slave Clock - Option 1) Control Timing Module acts as a complete system clock module for SDH Slave Clock timing applications. The MSTM is designed for external control functions. Full external control input allows for selection and monitoring of any of four possible operating states: 1) Holdover; 2) External Reference #1; 3) External Reference #2; and 4) Free Run. Table 1 illustrates the control signal inputs and corresponding operational states. In the absence of External Control Inputs (A,B), the MSTM enters the Free Run mode and signals an External Alarm. The MSTM will enter other operating modes upon application of a proper control signal. Mode 1 operation (A=1, B=0) results in an output signal that is phase locked to the External Reference Input #1. Mode 2 operation (A=1, B=1) results in an output signal at or near the frequency as determined by the latest (last) lockedsignal input values and the holdover performance of the MSTM. Free Run ModeFree Run mode operation (A=0, B=0) is a guaranteed output of 4.6 ppm of the nominal frequency. Alarm signals are generated at the Alarm Output during Holdover and Free Run operation. Alarm Signals are also generated by loss-of-lock, loss of Reference, and a Tune-Limit indication from the PLL. A TuneLimit alarm signal indicates that the VCXO tuning voltage is approaching within 10% the limits of its lock capability and that the External Reference Input may be erroneous. A high level indicates an alarm condition. Real time indication of the operational mode is available at unique operating mode outputs on pins 1-4. Control loop filters effectively attenuate any reference jitter and smooth out phase transients. Absolute Maximum Rating Table 1 Symbol Parameter Minimum Nominal Maximum Units Notes VCC Power Supply Voltage (Vcc to Gnd) -0.5 - +7.0 Volts 1.0 VIN Input Voltage with respect to ground -0.5 - Vcc+0.5 Volts 1.0 TSTG Storage Temperature -65.0 - +150 °C 1.0 Notes Input and Output Characteristics Table 2 Symbol Parameter Minimum Nominal Maximum Units VIH High level input voltage (TTL Compatible) 2.0 - Vcc V VIL Low level input voltage (TTL Compatible) 0 - 0.8 V TIN Input signal transition time - - 250 nS CIN Input capacitance - - 15 pF COUT Output capacitance - 50 - pF VOH High level output voltage @ IOH = -8.0 mA, Vcc minimum 2.4 - - V VOL High level output voltage @ IOL = -8.0 mA, Vcc minimum - - 0.4 V THL Clock out transition time high-to-low, no load - 4.0 - nS TLH Clock out transition time low-to-high, no load - 4.0 - nS TRP Input 8 kHz reference signal positive pulse width 30 - - nS TRN Input 8 kHz reference signal negative pulse width 30 - - nS TOP Standard Operating Temperature 0 - 70 °C Operating Specifications Table 3 Parameter Specifications Frequency Range 16.384 MHz, 19.44 MHz Power Supply voltage 2.0 5 VDC (±5%) Supply Current 60 mA Typical at 16.384 MHz Timing Reference Inputs 8 kHz Jitter and Phase Tolerance ITU-T G813 7.3 Wander Generation ITU-T G813 7.1 Free Run Accuracy ±4.6 ppm Holdover Stability ±0.37 ppm Initial Offset 0.05 ppm Temperature 2.0 ppm Drift 0.01 ppm/day 3.0 Holdover History 40 seconds Pull-in / Hold-in Range ±4.6 ppm Minimum Lock Time TBD TVL Alarm 1 = WARNING: Reference nearing operational limit Preliminary Data Sheet #: TM029 4.0 Page 2 of 16 5.0 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Control Inputs & Operational States Table 4 Control Input A B 0 Operational Mode 0 1 0 External Reference #1 0 1 External Reference #2 1 1 REF 1 REF 2 Holdover Free Run PLL_TVL Alarm Output Free Run (Default) 0 0 0 1 0 1 Normal Tune Limit LOR + LOL 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 Normal Tune Limit LOR + LOL 0 0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 1 1 Holdover 0 0 1 0 0 1 NOTES: 1.0 Operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability. 2.0 Consult factory for other output frequencies. 3.0 Holdover stability is the cumulative fractional frequency offset containing Initial Offset, Temperature, and Drift components as described by ITU-T G.813. 4.0 Pull-in range is the minimum frequency deviation on the reference inputs to the timing module that can be overcome to pull itself into synchronization with the reference. 5.0 A ‘1’ level indicates unit is within the extreme 10% of its operating range tracking the reference (~11ppm). Consult factory for use as a reference qualifier. Pin Assignment Block Diagram Figure 1 Figure 2 EX REF 1 EX REF 2 2:1 MUX Phase Comparator Lock and Detection PLL TVL Free Run Hold Over Alarm Out Sync Out Free Run CNTL A CNTL B 2:4 MUX Ref #1 DAC Filters DAC Tuning Voltage Monitor FIFO SEC VCTCXO Ref #2 Hold Over PLL TVL Preliminary Data Sheet #: TM029 Page 3 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Pin Description Table 5 Pin # Pin Name Pin Information 1 Holdover Output. High when the control inputs select Holdover 2 REF 1 Output. High when the control inputs select EX REF 1 3 REF2 Output. High when the control inputs select EX REF2 4 Free Run Output. High when the control inputs selects Free Run 5 Gnd Ground 6 Alarm_Out Output. =1,If (Free Run + Holdover + LOR + LOL + PLL_TVL) 7 Control A Mode control input 8 Control B Mode control input 9 PLL_TVL Tuning Voltage Alarm. =1 If Capture Range Near 10% of Extreme (~11ppm) 10 Gnd Ground 11 SYNC_OUT Synchronized output 12 Gnd Ground 13 N/C No connection 14 Gnd Ground 15 Ex REF 2 External Reference #2 Input (8 kHz) 16 Gnd Ground 17 Ex REF 1 Input. External Reference #1 Input (8 kHz) 18 +5 Vdc +5 Volt DC supply Preliminary Data Sheet #: TM029 Page 4 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Typical Application Figure 3 g BITS System Signal Input Select Line Card 1 Timing Card #1 S A B CW’s SCG 2000/4000 MUX A MUX B CW’s STM/MSTM module Y Y Clock out S RCV Line Card N Timing Card #2 S A A B MUX MUX CW’s STM/MSTM module Y CW’s SCG 2000/4000 Y B Clock out RCV S System Select Typical System Test Set-up Figure 4 G P S or LO R AN T im in g S o u r c e T h is d e v ic e s u p p lie s s y s te m tim e in f o rm a t io n . It c a n b e th o u g h t o f a s s u p p ly in g " a b s o lu te tim e " re fe re n c e in f o rm a t io n S a m p le M T IE D a t a fo r S T M - S 3 / M S T M - S 3 1 .0 E - 6 P o s s ib le C h o i c e s In c lu d e S ta n fo rd R e s e a rc h M o d e l: F S 7 0 0 T ru e tim e M o d e l X X X T y p i c a l r e s p o n s e - 3 0 0 0 s e c o n d t e s t - J it t e r a p p lie d ( 2 U I @ 1 0 H z) re f d a t e A P R 2 2 1 9 9 8 k dh M T IE ( s 1 0 0 .0 E - 9 10 MHz M T IE 1 0 .0 E - 9 1 2 4 4 - 5 .2 M a s k ( A ) 1 2 4 4 - 5 .2 M a s k ( B ) 1 2 4 4 - 5 .6 M a s k G R 2 5 3 - 5 . 4 . 4 .3 . 2 1 .0 E - 9 1 0 0 .0 E - 3 1 .0 E + 0 1 0 .0 E + 0 1 0 0 .0 E + 0 O b s e r v a t io n T im e ( s ) 1 .0 E + 3 1 0 .0 E + 3 C o p y rig h t 1 9 9 8 C o n n o r - W in f ie ld a ll r ig h t s re s e r v e d T a r g e t S y s te m U n d e r T e s t A r b itr a r y W a v e fo r m G e n e ra to r [N o i s e S o u rc e ] S a m p l e W a n d e r G e n e r a t io n (T D E V ) f o r S T M / M S T M - S 3 1 .0 E - 6 T y p ic a l r e s p o n s e - 3 0 0 0 s e c o n d te s t - J itt e r a p p l ie d ( 2 U I @ re f d a te A P R 2 2 1 9 9 8 10 H z) k dh 1 0 0 .0 E - 9 1 0 .0 E - 9 TD E V (s e c DS-1 Line Card OC-48 Line Card OC-3 Line Card . . . . ... OC-12 Line Card M T IE , T D E V , W a n d e r T r a n s f e r , a n d W a n d e r G e n e r a tio n P l o ts Line Card Noise Modulation Input 10 MHz E x te r n a l R e fe re n c e In p u t S ta n d a rd s C o m p lia n c e D o c u m e n ts C lo c k o r B IT S lo g ic le v e l c lo c k in p u t ( T T L , C M O S , e tc .) Timing Card A r b itr a r y W a v e fo r m G e n e ra to r D S 1 ra te R Z (1 .5 4 4 M H z ), E 1 ra te R Z o r 8 k H z c lo c k R Z w ith n o is e m o d u la tio n Timing Card E x te r n a l R e fe re n c e In p u t T D EV G R 1 2 4 4 - F ig 5 . 1 1 .0 E - 9 G R 1 2 4 4 - F ig 5 - 3 1 0 0 .0 E - 1 2 1 0 .0 E - 3 1 0 0 .0 E - 3 1 .0 E + 0 In te g r a t io n D S 1 r a te [1 .5 4 4 M H z ] B IT S B ip o la r 1 0 .0 E + 0 T im e (s e c ) 1 0 0 .0 E + 0 1 .0 E + 3 C o p y r ig h t 1 9 9 8 C o n n o r - W in f ie ld a lll rig h t s r e s e r v e d T im e -s ta m p e d e n s e m b le b a s e d o n a b s o lu te tim e re fe re n c e (1 0 M H z in p u t) 10 MHz P h a s e E rro r d a ta o u t p u t D S -1 , O C -3 , O C - 1 2 e le c tric a l o r o p tic a l s ig n a ls 10 MHz T e k tro n ix S J300E E x te r n a l R e fe re n c e In p u t HP 53310A M o d u la tio n A n a ly z e r / T im e I n te rv a l A n a ly z e r W a n d e r A n a ly z e r d a ta ( IE E E -4 8 8 ) E x te r n a l R e fe re n c e In p u t IE E E -4 8 8 C o n tro lle r P la t fo rm fo r s o f tw a re H P 5 3 3 0 5 A P h a s e A n a ly z e r H P E 1748A S ync M e a s u re m e n t T e k t ro n ix W a n d e r A n a ly z e r T E K T R O N IX S J 3 0 0 E Preliminary Data Sheet #: TM029 Page 5 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Typical Calibrated Wander Transfer TDEV Figure 5 10000 TDEV (ns) 1000 100 TDEV (ns) GR1244, Fig 5.3 10 10000 1000 100 10 0.01 0.1 1 1 Integration Time (Sec.) Typical Wander Generation MTIE Figure 6 1000 G R 1 2 4 4 , F ig 5 .2 (A ) G R 1 2 4 4 , F ig 5 .2 (B ) G R 2 5 3 -5 .4 .4 .3 .2 , F ig 5 .1 7 100 1000000 100000 10000 1000 100 10 1 10 0.1 MTIE (ns) M T IE (n s ) O b s e r v a tio n T im e (s e c .) Preliminary Data Sheet #: TM029 Page 6 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Typical Wander Generation TDEV Figure 7 100 T D E V (n s) G R 1244, F ig 5.1 TDEV (ns) 10 1 10000 1000 100 10 1 0.1 0 .1 In te g ra tio n T im e (s e c .) 1µ µs Phase Transient TIE Figure 8 1200 1000 TIE (ns) 800 600 400 200 0 -200 0 1 2 3 4 5 6 7 8 9 10 Time (sec) Preliminary Data Sheet #: TM029 Page 7 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Typical Phase Transient MTIE Figure 9 10000 MTIE (ns) 1000 G R -2 5 3 , F i g . 5 -1 9 M T I E (n s) 100 10 1 0 .0 1 0 .1 1 10 100 1000 O b s e rv a tio n T im e (s e c ) Entry Into Hold Over Figure 10 10000 MTIE (ns) 1000 100 10 G R -1 2 4 4 O b je c t ive , F ig . 5 -8 G R -1 2 4 4 R e q u ire m e n t , F ig . 5 -8 Ty p ic a l M TIE 1 0.001 0.01 0.1 1 10 100 O b se r v a ti o n T i m e (se c o n d s) Preliminary Data Sheet #: TM029 Page 8 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Return from Hold Over Figure 11 10000 MTIE (ns) 1000 100 10 G R -1 2 4 4 R e q u ire m e n t , F ig . 5 -7 M TIE (n s ) Ty p ic a l M TIE 1 0.001 0.01 0.1 1 10 100 O b se rv a ti o n T i m e (se c . ) Preliminary Data Sheet #: TM029 Page 9 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice MSTM-S3-TR Mode Indicator Delay Figure 12 Change in Operational Mode Operational Mode Indicator ∆tm 2 msec <∆ tm < 4.125 msec Tuning Voltage Limit Alarm Timing Diagram Figure 13 TVL Limit High Frequency Sync_Out (Nominal Frequency) TVL Limit Low Frequency TVL Alarm & Alarm Out ∆t 0 < ∆ t < 2.125 msec *The DAC is updated only when the output changes level. The maximum update rate is 8 kHz Preliminary Data Sheet #: TM029 Page 10 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Loss of Reference Timing Diagram Figure 14 External Reference Input Alarm tAon tAoff 2 msec < tAon < 6.125 msec 0 msec < tAoff < 2.125 msec Solder Clearance Figure 16 .020" MAX. .020" .030" PIN LAND ALL SOLDER AND/OR WIRE TAGS SHALL NOT EXTEND MORE THAN .020" BELOW PC BOARD BOTTOM SURFACE Preliminary Data Sheet #: TM029 Page 11 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice MECHANICAL OUTLINE: The mechanical outline of the MSTM-S3-TR is shown in Figure 17. The board space required is 2” x 2”. The pins are .040” in diameter and are .150” in length. The unit is spaced off the PCB by .030” shoulders on the pins. Due to the height of the device it is recommended to have heat sensitive devices away where the air flow might not be blocked. GROUND AND POWER SUPPLY LINES: Power specifications will vary depending primarily on the temperature range. At wider temperature ranges starting at 0 to 70 deg. C., an ovenized oscillator, OCXO, will be incorporated. The turn-on current for an OCXO requires a peak current of about .4A for about a minute. The steady state current will the vary from 50-150 mA depending on the temperature. It is suggested to plan for the peak current in the power and ground traces pin 18 and pin 5. The other four ground pins 10, 12, 14, and 16 are intended for signal grounds. PAD ARRAY AND PAD SPACING: The pins are arranged in a dual-in-line configuration as shown in Figure 16. There is .2” space between the pins in-line and each line is POWER SUPPLY REGULATION: separated by 1.6”. See Figures 17 & 18 and Table Good power supply regulation is recommended 6. for the MSTM-S3-TR The internal oscillators are regulated to operate from 4.75 - 5.25 volts. Large jumps within this range may still produce varying PAD CONSTRUCTION: degrees of wander. If the host system is subject to The recommended pad construction is shown in large voltage jumps due to hot-swapping and the Figure 18. For the pin diameter of .040” a hole like, it is suggested that there be some form of diameter of .055” is suggested for ease of insertion external regulation such as a DC/DC converter. and rework. A pad diameter of .150” is also suggested for support. This leaves a spacing of .050” between the pads which is sufficient for most SOLDERING RECOMMENDATIONS: signal lines to pass through. Due to the sensitive nature of this part, hand soldering or wave soldering of the pins is recommended after reflow processes. SOLDER MASK: A solder mask is recommended to cover most the top pad to avoid excessive solder underneath the shoulder of the pin to avoid rework damage. WASHING RECOMMENDATIONS: See Table 6 and Figure 19. The MSTM-S3-TR is not in a hermetic enclosure. It is recommended that the leads be hand cleaned after soldering. Do not completely immerse the module. VIA KEEP OUT AREA: It is recommended that there be no vias or feed throughs underneath the main body of the module MODULE BAKEOUT: between the pins. It is suggested that the traces in Do not bakeout the MSTM-S3-TR this area be kept to a minimum and protected by a layer of solder mask. See Figure 18. Preliminary Data Sheet #: TM029 Page 12 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Package Dimensions Characteristic Measurements Figure 17 Table 6 1.600 [40.64 mm] 0.200 [5.08 mm] 0.200 [5.08 mm] 2.000 [50.80 mm] 0.200 [5.08 mm] 0.555 [14.10 mm] 2.000 [50.80 mm] 0.585 [14.86 mm] Maximum Height 0.200 [5.08 mm] 0.045 [1.14 mm] 0.078 [1.98 mm] 0.040 [1.02 mm] Characteristic Item Measurement (inches) Pad to Pad Spacing 0.200 Solder pad top O.D. 0.150 Solder pad top I.D. 0.055 Solder pad bottom O.D. 0.150 Solder pad bottom I.D. 0.055 Solder mask top dia. 0.070 Solder mask bottom dia. 0.155 Pin row to row spacing 1.600 0.120 [3.05 mm] Recommended Footprint Dimensions Side Assembly View Figure 18 Figure 19 2.000 1.600 Pin #18 0.200 Pin #1 2.000 I.D. Ø0.055 Finished Hole TOP SIDE SOLDER RESIST (OVER PAD) PCB 0.200 O.D. Ø0.150 Copper Pad SIDE VIEW Via Keepout Area BOTTOM SIDE SOLDER RESIST (UP TO PAD) 0.200 Preliminary Data Sheet #: TM029 Page 13 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Preliminary Data Sheet #: TM029 Page 14 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Revision Revision Date Note P00 7/27/01 Preliminary Release P01 8/01/01 Added POR figure and Tri-state pin P02 9/07/01 Added power supply voltage to Table 3 Preliminary Data Sheet #: TM029 Page 15 of 16 Rev: P02 Date: 09/07/01 © Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice 2111 Comprehensive Drive Aurora, Illinois 60505 Phone: 630- 851- 4722 Fax: 630- 851- 5040 www.conwin.com