CYRUSTEK ES51999

ES51999
4 3/4 and 5 3/4 A/D AUTO
Features
Description
y External crystal oscillator
The ES51999 is a 44,000/440,000-count
dual-slope analog-to-digital converter
(ADC) with X10 functions. The
ES51999 also include frequency and
duty cycle measurement. The conversion
rate
and
resolution
can
be
selected/decided
by
external
microprocessor. In additional, other
functions are also provided for low
battery detection, on chip buzzer driving,
and I/O port with microprocessor.
4MHz: count up to 44,000 counts
(input range: ±440mV)
10MHz: count up to 440,000 counts
(input range: ±440mV)
y Four selectable conversion rates:
20, 10, 5, 2 conversion/sec
y On chip resistance switches for range
Changing.
y Voltage (DC/AC), current(DC/AC), resistor,
diode, frequency and duty cycle measurement
y 400mV independent input
y on chip OP amp’ for AC/DC conversion
y Auto zeroing function
y X10 function
y I/O port for microprocessor
y 400MHz Frequency counter and 1MHz duty
cycle measurement
y On chip buzzer driving: 2KHz
y Single 5V DC power supply (V+ to V-)
y Low battery detection
y SLEEP mode
y 64-pin QFP
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Absolute Maximum Ratings
Characteristic
Rating
Positive Supply Voltage
(V+ to AGND)
Negative Supply Voltage
(V- to AGND)
Analog I/O Voltage
Digital I/O Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Lead Temperature
(soldering, 10sec)
3.5V
-3.5V
((V-) - 0.5V) to ((V+) + 0.5V)
((V-) - 0.5V) to ((V+) + 0.5V)
800mW
0°C to 70°C
-25°C to 125°C
270°C
Electrical Characteristics
TA=25°C, DGND=AGND=0V
Symbol Parameter
Test Condition
V+
VI(V+)
I(GND)
Zero
NLV1
REV1
NLV10
REV10
V12
LBATT
TCRF
Positive Power Supply
Negative Power Supply
Operation
Supply Current
Supply Current of DGND
to VZero Input Reading
Nonlinearity (Voltage x1)
Rollover Error
(Voltage x1)
Nonlinearity
(Voltage x10)
Rollover Error
(Voltage x10)
Band Gap Voltage
Reference
Low Battery Detection
Reference Voltage (V12)
Temperature Coefficient
Normal power on (V+ to V-)
Min.
Typ. Max. Unit
2.3
-2.3
-
2.5
-2.5
1.0
2.7
-2.7
1.7
V
V
mA
5
10
-
mA
∆V between DGND and V- is 0.2V
1 MΩ input resistor, null to zero
by uP.
Best case straight line
1 MΩ input resistor
-0
0
+0
count
-0.01
-0.01
-
0.01
0.01
%F.S.
%F.S.
Best case straight line
-0.1
-
0.1
%F.S.
1 MΩ input resistor
-0.1
-
0.1
%F.S.
100 kΩ between V12 and AGND
-1.31
-1.23
-1.10
V
LBATT to V12
100 kΩ between V12 and AGND
(0°C to 70°C)
-60
-
0
50
60
-
mV
ppm/°C
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Pin configuration
QFP-64pin
L
B
A
T VV
T + +
A
G
N
D
A
G
N
D
O
S
D
C
G
N V V4
D- - M
60
CAZ
RAZ
50
ES51999
Symbol
1
CAZ
2
RAZ
3
CINT
4
BUF
5
BUFX10
6
Cref7
Cref+
9
IVSH
10
IVSL
11
TEST5
12
ACVL
13
ACVH
14
ADI
15
ADO
Continued on next page
5
10
15
45
40
35
20
25
30
OSC2
OSC1
BUZOUT
BUZIN
NC
FREQ
NC
NC
NC
NC
NC
NC
NC
VR
VRH
NC
NC
NC
NC
O O V V V V N S N V N VN
VR R R R R C G C R C 4 C
S 1 5 4 3 2
N 1
0
0
G
D
m
Pin Description
Pin No.
55
1
CINT
BUF
BUFX10
CrefCref+
NC
IVSH
IVSL
TEST5
ACVL
ACVH
ADI
ADO
NC
OVX
OVH
NC
S
C
L
K
S
T
A
TVE
UC O
S C C
Type Description
O
O
O
O
O
I/O
I/O
I
I
I/O
O
O
I
O
Auto-zero capacitor connection
Auto-zero resistance connection
Integration capacitor connection
Integration resistor connection output
Integration resistor connection output
Negative connection for reference capacitor
Positive connection for reference capacito
High current measurement input
Low current measurement input
Test Pin
Negative output of AC to DC converter
Positive output of AC to DC converter.
Negative input of internal AC to DC OpAmp
Output of internal AC to DC OpAmp.
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Pin No.
Symbol
17
18
20
21
22
23
24
25
27
29
31
37
38
46
48
49
OVX
OVH
OVSG
OR1
VR5
VR4
VR3
VR2
SGND
VR1
V400m
VRH
VR
FREQ
BUZIN
BUZOUT
Type Description
I
I
I
O
O
O
O
O
G
I
I
O
O
I
I
O
50
51
52
53
OSC1
OSC2
EOC
VCC
I
O
O
I
54
STATUS
I/O
55
56
57
58
59
SCLK
OSC4M
VVDGND
I
I
P
P
G
Input high voltage for resistance measurement.
Output connection for resistance measurement.
Sense low voltage for resistance measurement.
Reference resistor connection for 399.9Ω range.
Voltage measurement ÷ 10000 attenuator (4000V.)
Voltage measurement ÷ 1000 attenuator (400.0V.)
Voltage measurement ÷ 100 attenuator (40.00V.)
Voltage measurement ÷ 10 attenuator (4.000V.)
Signal Ground.
Measurement input.
400mV independent input.
Output of band-gap voltage reference. Typically -1.2V
Reference input voltage connection. Typically -200mV
Frequency counter input, offset to V-/2
Enables the buzzer. Low action.
Outputs a 2KHz audio frequency signal for driving piezoelectric buzzer
when BUZIN is low.
Crystal oscillator input connection.
Crystal oscillator output connection.
End of conversion indicator
The high level of digital I/O signals, which is connected to VCC pin of
microprocessor.
ES51966 sends current status to microprocessor or receives controlled
status from microprocessor.
Clock input from microprocessor.
Crystal oscillator selection. NC for 4MHz; connect to V- for 10MHz.
Negative supply voltage, connected to cathode of battery typically..
Negative supply voltage, connected to cathode of battery typically.
Digital Ground ( Output of on-chip DC-DC converter ),
VDGND = ( V+ - V- ) / 2
Analog Ground
Analog Ground
Positive supply voltage
Positive supply voltage
Low battery voltage detection
60
AGND
G
61
AGND
G
62
V+
P
63
V+
P
64
LBATT
I
Pin No. :
8 , 16 , 19 , 26 , 28 , 30 , 32-36 , No connected
39-45 , 47
P: Power,
G: Ground,
I: Input,
4
O: Output
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Operation `Mode
(1) Digital Interface between ES51999 and Microprocessor
The EOC, SCLK and STATUS of the ES51999 are used as digital communicating
interface between ES51999 and microprocessor. The STATUS pin is bi-directional, and
the others are unilateral: EOC is from ES51999 to microprocessor and SCLK is from
microprocessor to ES51999. The timing and data of the communication are as follows:
mode 1: ES51999 receives controlled status from microprocessor.
Force A/D entering into AZ phase
t6
t1
SCLK(I)
t7
START
t2
t3
t4
t5
t5
t8
B C
E
t9
status
STATUS(I/O)
A
(VCC)
(V-)
END
F
D
Timing of the above figure:
t1 (1040 ~ 4096) T
t2 512 T
t3 (4 ~ 256) T
t4 > 4 T
t5 (16 ~ 1024) T
(VCC)
(V-)
(T = 0.25µs)
t6
t7
t8
t9
(32 ~ 512) T
(520 ~ 1020) T
(0 ~ 256) T
520 T
Note: 1. At START:
After time A, ES51999 enter into AZ phase. And at the same time, STATUS is
changed from output pin to input pin with a 3uA pull low current provided by
ES51999 internally. Then microprocessor can send control status to STATUS. It
is suggested that micro-processor begins to drive STATUS between B and C.
2. At END:
The microprocessor stopped driving STATUS between D and E, and ES51999
will begin to drive STATUS after F.
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3. The detail timing between SCLK and STATUS is as follow:
(32 ~ 512)T
with 30 ~ 70% duty cycle
SCLK
(VCC)
(V-)
STATUS
(VCC)
(V-)
S0
S1
Sn-1
Sn
S14
Serial Data Format (STATUS):
F0
0
F1
1
F2
2
C2
AC
ZERO
8
9
10
(All defaults are ‘0’)
Q0
3
Q1
4
Q2
5
C0
6
PEAK
11
PHCAL
12
X10
13
SLEEP
14
C1
7
F0, F1, F2 measurement selection.
F0
0
0
0
0
1
1
1
F1
0
0
1
1
0
0
1
F2
0
1
0
1
0
1
0
Measurement
Voltage2
Voltage with frequency3
Current2
Current with frequency3
Resistance
Diode
Frequency and duty cycle1
1
In Frequency and duty cycle measurement, ES51999 measures both the
frequency and duty cycle of the input signal FREQ (pin 45) simultaneously.
2
In Voltage/Current measurement, only voltage/current is measured.
3
In Voltage/Current with frequency measurement, the frequency of FREQ is
also measured in addition to voltage/current. Detailed descriptions of these
measurement modes, please see the following sections.
Q0, Q1, Q2
Q0
0
0
0
0
1
1
1
1
range selection.
Q1 Q2
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
V1
440mV
4.4V
44V
440V
4400V
A1
IVSH (pin 9)4
IVSL (pin 10) 4
Ω1
420Ω
4.2KΩ
42KΩ
420KΩ
4.2MΩ
42MΩ
F2 3
40Hz
400Hz
4KHz
40KHz
400KHz
4MHz
40MHz
400MHz
1
When oscillator is 4MHz, voltage/current can be counted up to 44,000, and resistance
can be counted up to 42,000.
When oscillator is 10MHz, voltage/current can be counted up to 440,000, and resistance
can be counted to 420,000.
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4 3/4 and 5 3/4 A/D AUTO
2
Frequency measurement could only be counted up to 40,000 regardless the oscillator
frequency.
3
In 40Hz range, ES51999 can count from 0.5Hz to 40Hz; in 400Hz range, it can count
from 2.5Hz to 400Hz; in 4000Hz, it can count from 25Hz to 4000Hz.
4
In Current measurement, two input pins (IVSH and IVSL) are provided and can be
selected by Q2.
C0, C1, C2 In voltage (F[0:2] = “000”) and current (“010”) measurement, C0 & C1
are used for conversion rate selection:
C0
0
0
1
1
C1
1
0
0
1
Conversion/sec
20
10
5
2
Conversion period
50ms
100ms
200ms
500ms
10, 5, and 2 conversion/sec are 50Hz rejection, while 2 conversion/sec is
60Hz rejection.
In resistance measurement, the conversion period is:
C0
0
0
1
1
C1
1
0
0
1
Conversion period
70ms
140ms
280ms
700ms
In frequency and duty cycle (F[0:2] = “110”) measurement, only C0 is used
for conversion period selection. When the range is from 40Hz to 4000Hz, the
conversion periods are not selectable (see the description in Frequency and
duty cycle measurement); and when the range is from 40KHz to 400MHz, the
conversion period is decided by C0:
C0
0
1
Conversion period
110ms
1.1s
In voltage/current with frequency mode (F[0:2] = “001” and “011”), the
conversion period is fixed at 110ms, and C0, C1 & C2 decide the range of the
frequency measurement:
C0
0
1
1
1
1
C1
0
0
1
1
C2
0
1
0
1
Range
40KHz
400KHz
4MHz
40MHz
400MHz
AC ‘L’ for DC; ‘H’ for AC in Voltage/Current measurement. If not in voltage or
current measurement, this bit will be ignored.
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4 3/4 and 5 3/4 A/D AUTO
ZERO ‘H’ for zero calibration.
X10 ‘H’ for X10 function.
SLEEP ‘H’ for DMM in sleep mode.
mode 2: ES51999 sends the status and counts ( counter from DINT ) to uP.
one conversion period
t0
(VCC)
(V-)
EOC(O)
t2
t1
(VCC)
(V-)
SCLK(I)
(VCC)
(V-)
status & counts
STATUS(O)
t0 is at least 5ms and t1 must be (32 ~ 512)T, where T = 0.25µs.
t2 is the time from the rising edge of EOC to the last data been transferred. t2 is no
more than 4.9ms. That is, all results must be transferred within 4.9ms from the
rising edge of EOC.
The detail timing between SCLK and STATUS is as follow:
(32 ~ 512)T
with 30 ~ 70% duty cycle
SCLK
(VCC)
(V-)
STATUS
(VCC)
(V-)
S0
S1
Sn-1
Sn
Sfinal
Serial Data Format (STATUS):
- Voltage (“000”), current (“010”), resistance (“100”) and diode (“101”)
measurement
SIGN
0
0
1
BATT
2
D0<0:19> (20 bits)
3 ~ 22
SIGN ‘H’ for negative; ‘L’ for positive. In AC, Ω and diode measurement, this bit
can be ignored.
BATT ‘H’ for battery-low indication.
D0<0:19> Conversion results (magnitude). The format is binary code. LSB outputs
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4 3/4 and 5 3/4 A/D AUTO
first. When oscillator is 4MHz, D0<0:19> is up to 44,000 counts. When oscillator
is 10MHz, if the conversion rate is 20/sec, it counts to 220,000; if the conversion
rate is not 20/sec, it counts to 440,000.
- Voltage/current with frequency (“001” & “011”) measurement:
SIGN
0
0
1
BATT
2
D0<0:19> (20 bits)
3 ~ 22
D1<0:17> (18 bits)
23 ~ 40
SIGN For voltage/current measurement. ‘H’ for negative; ‘L’ for positive. In AC, Ω
and diode measurement, this bit can be ignored.
BATT ‘H’ for battery-low indication.
D0<0:19> Conversion result of voltage or current measurement.
D1<0:17> Conversion result of frequency measurement.
- Frequency (“110”) measurement:
OL
0
UL
1
BATT
2
D0<0:19> (20 bits)
3 ~ 22
D1<0:17> (18 bits)
23 ~ 40
D2<0:5> (6 bits)
41 ~ 46
OL Overflow when in 40, 400 and 4000Hz ranges.
UL Underflow when in 40, 400 and 4000Hz ranges.
BATT ‘H’ for battery-low indication.
D0<0:19>, D1<0:17>, D2<0:5> Please see the description in frequency and duty
cycle measurement.
(2) Dual Slope A/D—four phases timing
The ES51999’s measurement cycle contains four phases, ZI, AZ, INT, and DINT.
The timing will be changed as conversion rate changed. There are some examples as
follow, and the others are alike.
ES51999 is a dual-slope analog-to-digital converter (ADC). Figure 2.1 is a
structure of dual-slope integrator. Its measurement cycle has two distinct phases: input
signal integration (INT) phase and reference voltage integration (DINT) phase.
In INT phase, the input signal is integrated for a fixed time period, then A/D enters
DINT phase in which an opposite polarity constant reference voltage is integrated until
the integrator output voltage becomes to zero. Since both the time for input signal
integration and the reference voltage are fixed, the de-integration time is proportional to
the input signal. Hence, we can define the mathematical equation about input signal,
reference voltage integration (see Figure 2.1):
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4 3/4 and 5 3/4 A/D AUTO
TINT
1
1
V IN (t )dt =
× V REF × TDINT
∫
0
Buf × C int
Buf × C int
where, V IN (t ) = input signal
V REF = reference voltage
T INT = integration time (fixed)
TDINT = de-integration time (proportional to V IN (t ) )
If V IN (t ) is a constant, we can rewrite above equation:
TDINT =
T INT
× V IN
V REF
Besides the INT phase and DINT phase, ES51999 exploits auto zero (AZ) phase and zero
integration (ZI) phase to achieve accurate measurement. In AZ phase, the system offset is
stored. The offset error will be eliminated in DINT phase. Thus a higher accuracy could
be obtained. In ZI phase, the internal status will be recovered quickly to that of zero input.
Thus the succeeding measurements won’t be disturbed by current measurement
especially in case of overload.
Cint
input
signal
Buf
reference
voltage
Raz
integrator
output
integrator output
integrator output
input signal > 0
integration
time
different
input
fixed slope
different
input
fixed slope
Fixed
Variable
integration deintegration
time
time
Fixed
Variable
integration deintegration
time
time
Figure 2.1
input signal < 0
integration
time
the structure of dual-slope integrator and its output waveform.
As mentioned above, the measurement cycle of ES51999 contains four phases:
(1) auto zero phase (AZ)
(2) input signal integration phase (INT)
(3) reference voltage integration phase (DINT)
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4 3/4 and 5 3/4 A/D AUTO
(4) zero integration phase (ZI)
Normally, the time ratios of these four phases, AZ, INT, DINT and ZI to the entire
measurement cycle are 20%, 20%, 44% and 16% respectively. However the actual
duration of each phase depends on conversion rate. The time of each conversion rate are
shown in the table below in which voltage/current (without PEAK HOLD or frequency),
and diode measurement use this conversion time.
C[0:1]
01
00
10
11
CR (times/sec)
20
10
5
2
ZI (ms)
8
16
32
80
AZ (ms)
10
20
40
100
INT (ms)
10
20
40
100
DINT (ms)
22
44
88
220
Note: Vref = -200 mV.
(3) Component Value Selection for ADC
For various application requirements on conversion rate and input full range, we
suggest nominal values for external components of ADC in Figure 2.1 to obtain better
performance. Under default condition with operating clock = 4 MHz:
(1) conversion rate = 10 times/sec
(2) reference voltage = -200 mV
(3) input signal full scale = 440 mV (sensitivity = 10 uV)
we suggest that Cint = 33 nF, Buf = 200 kΩ, BufX10=20K
If a user selects a different conversion rate rather than default, the integration capacitor
Cint value must be changed according to the following rule for better performance:
Cint × (conversion rate) = (33 nF) × (10 times/sec).
It is important that the actual Cint value should be no less than the nominal value. A
smaller Cint reduces the input full range. However a larger Cint might have weaker noise
immunity than the suggested one.
A user could enlarge the input full range by changing reference voltage (Vref) and the
amount of integration resistor (Buf and Raz). For example, if Vref, Buf and Raz are
enlarged as twice than the default values then the input full range becomes 880 mV. The
input full range can be enlarged up to 1.1V (2.5 times than the default case). We list
general rules in below which might be helpful in determining component values.
Buf / (reference voltage) = 200 kΩ / (-200 mV)
(4) Voltage Measurement
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4 3/4 and 5 3/4 A/D AUTO
DC/AC voltage measurement
A re-configurable voltage divider provides a suitable full-scale range voltage
measurement mode. The following table summarizes the full-scale ranges in each
configuration.
Configuration
VR1
VR2
VR3
VR3
VR5
Full Scale Range
440.00mV
4.4000V
44.000V
440.00V
4400.0V
Divider Ratio
1
1/10
1/100
1/1000
1/10000
Resister Connection
R2 / (R1+R2)
R3 / (R1+R3)
R4 / (R1+R4)
R5 / (R1+R5)
In configuration VR1, the full range is 440mV, and the voltage inputs from V400m pin to
prevent the influence of noise when floating. In other configurations, the voltage inputs
from VR1 pin.
Pin 19 to 23 are used for AC measurement. Figure 4.1 is the AC-to-DC circuit. ACto-DC circuit extracts the AC part of the voltage (ADO - TEST5). ADC then converts the
voltage of (ACVH – ACVL) to acquire the AC value of input voltage. Variable resistor
5KΩ is used to adjust the DC offset. Light shielding for diode D1 and D2 is required to
prevent leakage current. This circuit works properly only when the input voltage is
sinusoidal. If the input is not sinusoidal (e.g., square waves), a true RMS-to-DC
converter chip will be needed to obtain the correct true RMS value of input signal.
If ADO and ADI short directly, ADI is the divided voltage of the input signal.
Therefore, it can be used for oscillator display.
AGND
OVSG
100
1K
10K
101K
1.11M
D2 0.47u
D1
15K 1u
10K
1u
15K
0.1u
88M
OR1
VR5
VR4
VR3
VR2
ADO
ADI
ACVH
ACVL
TEST5
V
R
1
V
R
5K
10M
-100mV
Voltage input
Figure 4.1 AC-to-DC circuit
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4 3/4 and 5 3/4 A/D AUTO
The measurement of true RMS using ES636
If ES636 is used for true RMS measurement, the suggested application circuit is shown
in Figure 4.2. When ES636 is used for true RMS, ADO and ADI pin short together,
TEST5 pin keeps floating, and ACVL pin connects to SGND. And the OVSG pin short
to AGND through a switch.
Connect Pin 2 to –Vs for normal operation,
or connect it to +Vs for sleep mode
ACV
+Vs
-Vs
Cav
14
200
2
13
-Vs
3
4
ES636
1
+Vs
ACVL
ACVH
12
5
11
10
6
9
7
8
100
1K
10K
101K
1.11M
OVSG
OR1
VR5
VR4
VR3
VR2
150
470K
+Vs
500K
ADI
ADO
-Vs
Figure 4.2 AC-to-DC circuit using ES636
(5) Diode Measurement
Diode measurement mode shares the same configuration with 4.4000V
voltage mode. The range select bits Q0, Q1 and Q2 are not active in this
mode.
(6) Current measurement
Current measurement has three mode. The following table summarizes the full scale
range of each mode.
Mode
Range Selection
Full scale
uA
IVSL/IVSH
440.00uA/4400.0uA
mA
IVSL/IVSH
44.000mA/440.00mA
10A
IVSH
44.000A
*Operation Mode is based on application circuit .
*Range selection : IVSL ( Q0,Q1,Q2 ) = ( 0,0,0 )
IVSH ( Q0,Q1,Q2 ) = ( 0,0,1 )
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(7) Multiplying by 10 (X10) Function
ES51999 includes X10 function. In X10 function mode, the output will be increasing
tenfold. But the input range will be reduced to ±44mV. For example, if X10 function is
enabled and the input is 10mV, output will be 10,000 counts, rather than 1,000 counts. To
achieve X10 function, the integration resistor is 20KΩ, not 200KΩ at INT phase, and
remains 200 kΩ at DINT phase. Because the resistor (20KΩ) requires exactly 1/10 of
200K
BUF
BUFX10
VR
18K
Figure 5.1 X10 function
integration resistor (200KΩ), a variable resistor Rx is used to compensate these two
resisters.
Resistor scheme of AZ/INT/DINT phases
In ES51999, an on-chip resistor is used for AZ mode. The internal chip is about 10 kΩ.
The connection is shown in the following Figure 5.2.
ES51999
CINT(5)
CAZ(6)
200K
Rx
20K
BUF(7)
A
BUFX10(8)
B
RAZ(9)
C
10K
Figure 5.2 Resistor scheme of AZ phase
The status of switches A, B and C are described in the following table.
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ES51999
4 3/4 and 5 3/4 A/D AUTO
X10 function is OFF
switch INT phase DINT phase AZ phase
A
ON
ON
ON
B
OFF
OFF
ON
C
OFF
OFF
ON
X10 function is ON
INT phase DINT phase AZ phase
OFF
ON
ON
ON
OFF
ON
OFF
OFF
ON
In AZ phase, all the switches is ON, the effective resistor is all the resistors in parallel.
The effective resistor is therefore less than 10 kΩ. If X10 function is never used, the
matching between 200 kΩ and (Rx + 20 kΩ) is not necessary. In this situration, (Rx + 20
kΩ) can be replaced by a resistor about 20 kΩ, or simply omitted.
(8) ZERO Calibration
In ES51999, the inherent delay of the OPAMP will introduce a few counts to the output.
The method to prevent this problem is zero calibration. When zero calibration is ON,
ES51999 shorts the input to SGND internally. uP needs to save the results of zero input.
After zero calibration is OFF, the result of zero input is then deducte from the counts of
the following measurements.
Zero calibration can be enabled on any measurement. When the ZERO bit is set by
uP, ES51999 begins to execute zero calibration. ES51999 stops executing zero
calibration until the ZERO bit is reset by uP.
In voltage/current/diode/capacitance measurement, the de-integration voltage is fixed,
therefore zero calibration needs only be enabled once. The results could be used for all
the following voltage/current/diode/capacitance measurement. However, in resistance
measurement, the de-integration voltage is not fixed, and varies with the resistance to be
measured. That is, zero calibration must be re-done if the resistance to be measured
changes. For convenience, the result of zero input in voltage measurement could be used
in resistance measurement.
(9)Frequency and duty cycle
When F[0:2] = “110”, ES51999 calculates frequency and duty cycle of FREQ at the same
time. However, some more computations are required to obtain both the results. There
are three output data at this measurement: D0, D1, and D2 which can be obtained from
the serial output.
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ES51999
4 3/4 and 5 3/4 A/D AUTO
▪ 40Hz range:
Frequency =
(D2+1)×106
5×(150,950+D1)
,
Duty cycle =
100×D0
%
150950+D1
Duty cycle =
100×D0
%
150,950+D1
▪ 400Hz range
Frequency =
(D2+1)×106
150,950+D1
,
▪ 4000Hz range
(D2+1)×107
100×D0
%
,
Duty cycle =
150,950+D1
150,950+D1
▪ 40KHz to 400MHz range (D2 is not needed.)
when C[0] = 0
D0
%
Frequency = 10×D1 ,
Duty cycle =
200
when C[0] = 1
D0
%
Frequency = D1 ,
Duty cycle =
200
ES51999 can measure frequency from 0.5Hz to 409.6MHz. For each range, the
measurable frequencies and resolution are shown in the following table:
Frequency =
Range
40Hz
400Hz
4000Hz
40KHz
400KHz
4MHz
40MHz
400MHz
Measured frequency range
0.5Hz ~ 40Hz
2.5Hz ~ 400Hz
25Hz ~ 4000Hz
0 ~ 40.96KHz
0 ~ 409.6KHz
0 ~ 4.096MHz
0 ~ 40.96MHz
0 ~ 409.6MHz
Resolutions
0.001Hz
0.01Hz
0.1Hz
1Hz
10Hz
100Hz
1KHz
10KHz
At 40/400/4000Hz, if the input frequency is less than its measurable range, it’s underflow,
and UL will set to ‘H’. At the same ranges, if the input frequency is greater than its
measurable range, it’s overflow, and OL will set to ‘H’. When UL or OL occur, the data
D0, D1, and D2 will not be correct, please ignore them. At 40KHz ~ 400MHz ranges, OL
and UL are always ‘L’, but it’s overflow when the output counts is 40,960.
At different range, the conversion time is different. At 40/400/4000Hz, the conversion
time is according to the input frequency. At other ranges, the conversion time is fixed at
110ms or 1.1s with C[0] = 0 or 1, respectively.
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Range
40Hz
400Hz
4000Hz
40KHz
400KHz
4MHz
40MHz
400MHz
Conversion time
C[0] = 0
C[0] = 1
0.8s ~ 2s
0.16s ~ 0.4s
0.16s ~ 0.4s
110ms
1.1s
110ms
1.1s
110ms
1.1s
110ms
1.1s
110ms
1.1s
(10)Voltage/Current Measurement with Frequency Counter
When F[0:2] = “001” or “011”, ES51999 measures frequency of input together with
voltage/current. At this measurement mode, voltage (or current) input is VR1/400mV (or
IVSH/IVSL), and frequency input is FREQ. Q[0:2] is the range of voltage/current
measurement, and C[0:2] is the range of frequency measurement. Only 40K to 400MHz
ranges are selectable here. Unlike frequency measurement (F[0:2] = “110”), duty cycle is
not measured in this mode. The conversion time is fixed at 110ms. Voltage/current can
count up to 54,000 (or 540,000 when 10MHz OSC is used). AC and PEAK can still be
active. D0 is the output of voltage/current, and (10×D1) is the result of frequency.
(11) SLEEP mode
If SLEEP bit is set ‘H’ by uP, ES51999 enters sleep mode. In sleep mode, if SCLK keeps
low, all the circuit is shut down, and the supply current is about 0.1uA. If SCLK is high
in sleep mode, only the oscillator is active to prepare for the following re-power
operation.
(12) Digital Signals Rising and Falling times
The digital signals include EOC, SCLK, and STATUS, and those rising and falling times
are defined as follow:
EOC and STATUS are output to microprocessor:
V+
V-
(V-)+2.1V
(V-)+0.8V
tro
17
tfo
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ES51999
4 3/4 and 5 3/4 A/D AUTO
SCLK and STATUS are input from microprocessor:
Vcc
Vss
(V-)+2.1V
(V-)+0.8V
tfi
tri
Note: Vss = V-
Symbol
tro
tfo
tri
tfi
Condition
A/D to uP
A/D to uP
uP to A/D
uP to A/D
Min
-
18
Max
20
20
20
20
Units
ns
ns
ns
ns
07/07/06
ES51999
4 3/4 and 5 3/4 A/D AUTO
Testing Circuit
820K
5V
Regulator
9V
+
0.1u
900
uA
uA
mA
90
mA
0.47u
10A
0.99
SGN
0.01
10A
V-
AGND
V-
LBATT
IVSH
IVSL
5K
10K
1u
15K + 0.1u
1u
ACVH
D2 0.47u 88M
100K
ADO
15K
OSC1
BUZOUT
1.5K
PTC
Zener 6V
220pF
TEST5
ACVL
ADI
BUZIN
ES51999
100K
Cref+
4.7u2
+
+
8051
serial
OSC2
BUF
18K
470n
100K
10u
0.1u
4.7u
Vss Vc
VCC
EOC
CAZ
RAZ
BUFX10
Cref-
+
+
0.1u
OSC4M
SCLK
STATUS
33n
CINT
200K
5K
C R
DGND
V+
V+
mA
D1
+
AGND
9
+
7.5V
180K
uA
Vc
OVX
100
OVH
FREQ
NC
5.6V
V-
200 2.2u
1.5K
PTC
NC+
NCNC
NC
NC
VR
VRH
NC
91K
20K
+
1u
NC
NC
OVSG
100
OR1
1K
VR5
10K
VR4
101K
VR3
1.11M
NC
V400m
VR1
NC
SGND
VR2
19
100K
10M
07/07/06
ES51999
4 3/4 and 5 3/4 A/D AUTO
Note:
1.In PEAK mode, the wire of SCLK STATUS EOC must be shielded to prevent
from the noise.
2.For the X10 feature, the BuffX10 resistor must be precisely adjusted to a tenth
part of the Buffer resistor or the additional error will rice. (Rbuff = 10 RbuffX10)
3.If use the AC-to-DC circuit as above schematic, the reading out will get a minus
sign. Please ignore the minus sign instead of displaying. And the polarity of diode
must not be changed.
4.The Zener Diodes are used for IC protection, and MUST be soldered on PCB first
before soldering IC.
1. Tantalum capacitor
2. Tantalum capacitor
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ES51999
4 3/4 and 5 3/4 A/D AUTO
Package
64 pins QFP package size
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07/07/06