PTH12040 12 Vin single output DC-DC CONVERTERS • • • • • • • • • • • POLA Non-isolated 1 NEW Product 50 A output current (5) 12 V input voltage (8 Vdc to 14 Vdc) Wide-output voltage adjust (0.8 Vdc to 5.5 Vdc) Auto-track™ sequencing* Margin up/down controls Efficiencies up 96% Output ON/OFF inhibit Differential remote sense Programmable Under-Voltage Lockout (UVLO) Point-of-Load-Alliance (POLA) compatible Available RoHS compliant The PTH12040 is a next generation series of non-isolated dc-dc converters offering some of the most advanced POL features available in the industry. The primary new feature provides for sequencing between multiple modules, a function, which is becoming a necessity for powering advanced silicon including DSP’s, FPGA’s and ASIC’s requiring controlled power-up and power-down Other industry leading features include margin up/down controls and efficiencies up to 96%. The PTH12040 has an input voltage of 8 Vdc to 14 Vdc and offers a wide 0.8 Vdc to 5.5 Vdc output voltage range with up to 50 A output current, which allows for maximum design flexibility and a pathway for future upgrades. 2 YEAR WARRANTY All specifications are typical at nominal input, full load at 25 °C unless otherwise stated Cin = 1000 µF, Cout = 660 µF OUTPUT SPECIFICATIONS EMC CHARACTERISTICS Voltage adjustability (See Note Setpoint accuracy (See Note 1) 0.8-5.5 Vdc ±2.0% Vo Line regulation ±5 mV typ. Load regulation ±5 mV typ. Total regulation (See Note 1) Minimum load Ripple and noise Transient response (See Note 4) Margin adjustment SPECIFICATIONS ±3.0% Vo 0A 20 MHz bandwidth 15 mV typ. 70 µs recovery time Overshoot/undershoot 150 mV (See Note 7) ±5.0% Vo Electrostatic discharge Conducted immunity Radiated immunity EN61000-4-2, IEC801-2 EN61000-4-6 EN61000-4-3 GENERAL SPECIFICATIONS Efficiency See Table on page 2 Insulation voltage Non-isolated Switching frequency 1.05 kHz Approvals and standards EN60950 UL/cUL60950 Material flammability Dimensions UL94V-0 (L x W x H) INPUT SPECIFICATIONS 51.94 x 26.54 x 9.07 mm 2.045 x 1.045 x 0.357 in Weight 17 g (60 oz) Input voltage range (See Note 3) 8-14 Vdc Input standby current (See Note 2) 35 mA typ. Remote ON/OFF (See Note 1) Positive logic ENVIRONMENTAL SPECIFICATIONS Undervoltage lockout + Pin 8 open (See Note 8) 6.6-7.5 V typ. Thermal performance Track input current Pin 18 (See Note 7) MTBF -0.13 mA MSL (‘Z’ suffix only) 96% max. Telcordia SR-332 Operating ambient, temperature Non-operating JEDEC J-STD-020C 2,500,00 hours -40 ºC to +85 ºC -40 ºC to +125 ºC Level 3 PROTECTION Overcurrent International Safety Standard Approvals Auto reset Thermal 95 A Auto recovery UL/cUL CAN/CSA-C22.2 No. 60950 File No. E174104 TÜV Product Service (EN60950) Certificate No. B 04 06 38572 044 CB Report and Certificate to IEC60950, Certificate No. US/8292/UL *Auto-track™ is a trade mark of Texas Instruments File Name: pth12040w.pdf Rev (03): 19 Dec 2005 PTH12040 12 Vin single output DC-DC CONVERTERS POLA Non-isolated 2 For the most current data and application support visit www.artesyn.com/powergroup/products.htm NEW Product OUTPUT POWER (MAX.) INPUT VOLTAGE OUTPUT VOLTAGE OUTPUT CURRENT (MIN.) OUTPUT CURRENT (MAX.) EFFICIENCY (MAX.) LINE LOAD MODEL NUMBER (9.10) 275 W 8-14 Vdc 0.8-5.5 Vdc 0A 50 A 96% ±5 mV ±5 mV PTH12040W Part Number System with Options REGULATION PTH12040WAS Product Family Point of Load Alliance Compatible Mounting Option (9) D = Horizontal Through-Hole (Matte Sn) H = Horizontal Through-Hole (Sn/Pb) S = Surface-Mount (63/37 Sn/Pb pin solder material) Z = Surface-Mount (96.5/3.0/0.5 Sn/Ag/Cu pin solder material) Input Voltage 12 = 12 V Output Current 04 = 50 A Pin Option A = Through-Hole Std. Pin Length (0.140”) A = Surface-Mount Tin/Lead Solder Ball Mechanical Package Always 0 Output Voltage Code W = Wide Output Voltage Adjustment of the PTH12040W Series The ultra-wide output voltage trim range offers major advantages to users who select the PTH12040W. It is no longer necessary to purchase a variety of modules in order to cover different output voltages. The output voltage can be trimmed in a range of 0.8 Vdc to 5.5 Vdc. When the PTH12040W converter leaves the factory the output has been adjusted to the default voltage of 0.8 V. EFFICIENCY TABLE (IO = 35 A) OUTPUT VOLTAGE EFFICIENCY Vo = 5.0 V 96% Vo = 3.3 V 95% Vo = 2.5 V 93% Vo = 2.0 V 92% Vo = 1.8 V 91% Vo = 1.5 V 90% Vo = 1.2 V 88% Vo = 1.0 V 86% Vo = 0.8 V 82% Notes 1 The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/ºC or better temperature stability. 2 This control pin has an internal pull-up to 5 V nominal. If it is left opencircuit the module will operate when input power is applied. A small lowleakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application note. For further information, consult Application Note 193. 3 A 1000 µF input capacitor is required for proper operation. The capacitor must be rated for a minimum of 300 mA rms of ripple current. 4 This is with a 1 A/µs loadstep, 50 to 100% Iomax. Io = 680 µF 5 See Figures 1 and 2 for safe operating curves. 6 When the set-point voltage is adjusted higher than 3.6 V, a 10 V minimum input voltage is recommended. 7 A small low-leakage (<100 nA) MOSFET is recommended to control this pin. The opencircuit voltage is less than 1 Vdc. 8 These are the default voltages. The y may be adjusted using the ‘UVLO Prog’ control input. Consult Application Note No. 193 for further information. 9 To order Pb-free (RoHS compatible) surface-mount parts replace the mounting option ‘S’ with ‘Z’, e.g. PTH12040WAZ. To order Pb-free (RoHS compatible) through-hole parts replace the mounting option ‘H’ with ‘D’, e.g. PTH12040WAD. 10 NOTICE: Some models do not support all options. Please contact your local Artesyn representative or use the on-line model number search tool at http://www.artesyn.com/powergroup/products.htm to find a suitable alternative. File Name: pth12040w.pdf Rev (03): 19 Dec 2005 PTH12040 12 Vin single output DC-DC CONVERTERS POLA Non-isolated 3 For the most current data and application support visit www.artesyn.com/powergroup/products.htm TEMPERATURE (ºC) 80 70 60 Nat conv 100 LFM 200 LFM 400 LFM 50 40 30 TEMPERATURE (ºC) 90 20 0 10 20 30 40 90 80 70 60 50 40 30 20 10 0 Nat conv 100 LFM 200 LFM 400 LFM 0 50 10 OUTPUT CURRENT (A) 20 30 40 Figure 2 - Safe Operating Area Vin = 12 V, Output Voltage = 1.2 V (See Note A) 100 19 20 Margin up Margin Down 18 Track +Sense 2 90 Vin 15 80 Vout 5.0V 3.3V 70 2.5V Inhibit GND 1.8V 7 3 60 1.2V 0.8V 50 Ci 560uF (Required) 40 10 20 30 40 Vo 12 Vo 6 8 11 9 4 Vin 0 50 OUTPUT CURRENT (A) Figure 1 - Safe Operating Area Vin = 12 V, Output Voltage = 3.3 V (See Note A) EFFICIENCY (%) NEW Product UVLO 1 -Sense GND 5 10 13 14 Vo Adj 16 17 Rset 1% 0.05W Co2 330uF Co1 330uF 50 OUTPUT CURRENT (A) Figure 3 - Efficiency vs Load Current Figure 4 - Standard Application Vin = 12 V (See Note B) Notes A SOA curves represent the conditions at which internal components are within the Artesyn derating guidelines. B Characteristic data has been developed from actual products tested at 25 °C. This data is considered typical data for the converter. File Name: pth12040w.pdf Rev (03): 19 Dec 2005 5 PTH12040 12 Vin single output DC-DC CONVERTERS POLA Non-isolated 4 For the most current data and application support visit www.artesyn.com/powergroup/products.htm NEW Product 2.045 (51.94) 0.060 (1.52) 1.875 (47.62) 0.375 (9.52) 0.375 (9.52) 0.125 (3.17) 6 Places 0.140 (3.55) 0.375 (9.52) 0.060 (1.52) ø0.040 (1.02) 20 Places 17 0.925 (23.49) 0.125 (3.17) 3 Places 16 18 15 14 13 12 11 10 9 8 PIN CONNECTIONS 19 20 Lowest Component 1.045 (26.54) 2 1 3 0.375 (9.52) 0.250 (6.35) 2 Places 4 6 5 0.010 MIN. (0.25) Bottom side Clearance 7 0.375 (9.52) 0.357 (9.07) MAX. SIDE VIEW TOP VIEW Dimensions in Inches (mm) Tolerances (unless otherwise specified) 2 Places ±0.030 (±0.76) 3 Places ±0.010 (±0.25) FUNCTION 1 Ground 2 Vin 3 Ground 4 Vin 5 Ground 6 Vin 7 Inhibit* 8 UVLO Programming 9 Vout 10 Ground 11 Vs+ 12 Vout 13 Ground 14 Vs- 15 Vout 16 Ground 17 Adjust 18 Track 19 Margin Up* 20 Margin Down* Host Board 0.125 (3.17) 0.375 (9.52) PIN NO. Figure 5 - Plated Through-Hole Mechanical Drawing 2.045 (51.94) 0.060 (1.52) 1.875 (47.62) 0.375 (9.52) 0.375 (9.52) 0.125 (3.17) 6 Places 0.370 (9.40) MAX. 0.375 (9.52) 0.060 (1.52) 17 0.925 (23.49) 0.125 (3.17) 3 Places 15 14 13 16 18 12 11 10 9 After solder reflow on customer board 8 Solder Ball ø0.040 (1.02) 20 Places 19 1.045 (26.54) 20 1 2 3 0.375 (9.52) 0.250 (6.35) 2 Places Dimensions in Inches (mm) Tolerances (unless otherwise specified) 2 Places ±0.030 (±0.76) 3 Places ±0.010 (±0.25) 4 0.375 (9.52) 6 5 7 0.125 (3.17) 0.375 (9.52) SIDE VIEW *Denotes negative logic: Open = Normal operation Ground = Function active TOP VIEW Figure 6 - Surface-Mount Mechanical Drawing Datasheet © Artesyn Technologies® 2005 The information and specifications contained in this datasheet are believed to be correct at time of publication. However, Artesyn Technologies accepts no responsibility for consequences arising from printing errors or inaccuracies. The information and specifications contained or described herein are subject to change in any manner at any time without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein. Please consult our website for the following items: Application Note www.artesyn.com File Name: pth12040w.pdf Rev (03): 19 Dec 2005